drm/nouveau: match U/DP script against SOR link
[safe/jmp/linux-2.6] / drivers / watchdog / iTCO_wdt.c
index 44bc6aa..69de871 100644 (file)
@@ -40,7 +40,7 @@
 
 /* Module and version information */
 #define DRV_NAME       "iTCO_wdt"
-#define DRV_VERSION    "1.05"
+#define DRV_VERSION    "1.06"
 #define PFX            DRV_NAME ": "
 
 /* Includes */
@@ -115,8 +115,37 @@ enum iTCO_chipsets {
        TCO_3420,       /* 3420 */
        TCO_3450,       /* 3450 */
        TCO_EP80579,    /* EP80579 */
-       TCO_CPTD,       /* CPT Desktop */
-       TCO_CPTM,       /* CPT Mobile */
+       TCO_CPT1,       /* Cougar Point */
+       TCO_CPT2,       /* Cougar Point Desktop */
+       TCO_CPT3,       /* Cougar Point Mobile */
+       TCO_CPT4,       /* Cougar Point */
+       TCO_CPT5,       /* Cougar Point */
+       TCO_CPT6,       /* Cougar Point */
+       TCO_CPT7,       /* Cougar Point */
+       TCO_CPT8,       /* Cougar Point */
+       TCO_CPT9,       /* Cougar Point */
+       TCO_CPT10,      /* Cougar Point */
+       TCO_CPT11,      /* Cougar Point */
+       TCO_CPT12,      /* Cougar Point */
+       TCO_CPT13,      /* Cougar Point */
+       TCO_CPT14,      /* Cougar Point */
+       TCO_CPT15,      /* Cougar Point */
+       TCO_CPT16,      /* Cougar Point */
+       TCO_CPT17,      /* Cougar Point */
+       TCO_CPT18,      /* Cougar Point */
+       TCO_CPT19,      /* Cougar Point */
+       TCO_CPT20,      /* Cougar Point */
+       TCO_CPT21,      /* Cougar Point */
+       TCO_CPT22,      /* Cougar Point */
+       TCO_CPT23,      /* Cougar Point */
+       TCO_CPT24,      /* Cougar Point */
+       TCO_CPT25,      /* Cougar Point */
+       TCO_CPT26,      /* Cougar Point */
+       TCO_CPT27,      /* Cougar Point */
+       TCO_CPT28,      /* Cougar Point */
+       TCO_CPT29,      /* Cougar Point */
+       TCO_CPT30,      /* Cougar Point */
+       TCO_CPT31,      /* Cougar Point */
 };
 
 static struct {
@@ -173,8 +202,37 @@ static struct {
        {"3420", 2},
        {"3450", 2},
        {"EP80579", 2},
-       {"CPT Desktop", 2},
-       {"CPT Mobile", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
+       {"Cougar Point", 2},
        {NULL, 0}
 };
 
@@ -259,8 +317,37 @@ static struct pci_device_id iTCO_wdt_pci_tbl[] = {
        { ITCO_PCI_DEVICE(0x3b14,                               TCO_3420)},
        { ITCO_PCI_DEVICE(0x3b16,                               TCO_3450)},
        { ITCO_PCI_DEVICE(0x5031,                               TCO_EP80579)},
-       { ITCO_PCI_DEVICE(0x1c42,                               TCO_CPTD)},
-       { ITCO_PCI_DEVICE(0x1c43,                               TCO_CPTM)},
+       { ITCO_PCI_DEVICE(0x1c41,                               TCO_CPT1)},
+       { ITCO_PCI_DEVICE(0x1c42,                               TCO_CPT2)},
+       { ITCO_PCI_DEVICE(0x1c43,                               TCO_CPT3)},
+       { ITCO_PCI_DEVICE(0x1c44,                               TCO_CPT4)},
+       { ITCO_PCI_DEVICE(0x1c45,                               TCO_CPT5)},
+       { ITCO_PCI_DEVICE(0x1c46,                               TCO_CPT6)},
+       { ITCO_PCI_DEVICE(0x1c47,                               TCO_CPT7)},
+       { ITCO_PCI_DEVICE(0x1c48,                               TCO_CPT8)},
+       { ITCO_PCI_DEVICE(0x1c49,                               TCO_CPT9)},
+       { ITCO_PCI_DEVICE(0x1c4a,                               TCO_CPT10)},
+       { ITCO_PCI_DEVICE(0x1c4b,                               TCO_CPT11)},
+       { ITCO_PCI_DEVICE(0x1c4c,                               TCO_CPT12)},
+       { ITCO_PCI_DEVICE(0x1c4d,                               TCO_CPT13)},
+       { ITCO_PCI_DEVICE(0x1c4e,                               TCO_CPT14)},
+       { ITCO_PCI_DEVICE(0x1c4f,                               TCO_CPT15)},
+       { ITCO_PCI_DEVICE(0x1c50,                               TCO_CPT16)},
+       { ITCO_PCI_DEVICE(0x1c51,                               TCO_CPT17)},
+       { ITCO_PCI_DEVICE(0x1c52,                               TCO_CPT18)},
+       { ITCO_PCI_DEVICE(0x1c53,                               TCO_CPT19)},
+       { ITCO_PCI_DEVICE(0x1c54,                               TCO_CPT20)},
+       { ITCO_PCI_DEVICE(0x1c55,                               TCO_CPT21)},
+       { ITCO_PCI_DEVICE(0x1c56,                               TCO_CPT22)},
+       { ITCO_PCI_DEVICE(0x1c57,                               TCO_CPT23)},
+       { ITCO_PCI_DEVICE(0x1c58,                               TCO_CPT24)},
+       { ITCO_PCI_DEVICE(0x1c59,                               TCO_CPT25)},
+       { ITCO_PCI_DEVICE(0x1c5a,                               TCO_CPT26)},
+       { ITCO_PCI_DEVICE(0x1c5b,                               TCO_CPT27)},
+       { ITCO_PCI_DEVICE(0x1c5c,                               TCO_CPT28)},
+       { ITCO_PCI_DEVICE(0x1c5d,                               TCO_CPT29)},
+       { ITCO_PCI_DEVICE(0x1c5e,                               TCO_CPT30)},
+       { ITCO_PCI_DEVICE(0x1c5f,                               TCO_CPT31)},
        { 0, },                 /* End of list */
 };
 MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl);
@@ -304,8 +391,8 @@ static struct platform_device *iTCO_wdt_platform_device;
 #define WATCHDOG_HEARTBEAT 30  /* 30 sec default heartbeat */
 static int heartbeat = WATCHDOG_HEARTBEAT;  /* in seconds */
 module_param(heartbeat, int, 0);
-MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. "
-       "(2<heartbeat<39 (TCO v1) or 613 (TCO v2), default="
+MODULE_PARM_DESC(heartbeat, "Watchdog timeout in seconds. "
+       "5..76 (TCO v1) or 3..614 (TCO v2), default="
                                __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
 
 static int nowayout = WATCHDOG_NOWAYOUT;
@@ -436,8 +523,13 @@ static int iTCO_wdt_keepalive(void)
        /* Reload the timer by writing to the TCO Timer Counter register */
        if (iTCO_wdt_private.iTCO_version == 2)
                outw(0x01, TCO_RLD);
-       else if (iTCO_wdt_private.iTCO_version == 1)
+       else if (iTCO_wdt_private.iTCO_version == 1) {
+               /* Reset the timeout status bit so that the timer
+                * needs to count down twice again before rebooting */
+               outw(0x0008, TCO1_STS); /* write 1 to clear bit */
+
                outb(0x01, TCO_RLD);
+       }
 
        spin_unlock(&iTCO_wdt_private.io_lock);
        return 0;
@@ -450,6 +542,11 @@ static int iTCO_wdt_set_heartbeat(int t)
        unsigned int tmrval;
 
        tmrval = seconds_to_ticks(t);
+
+       /* For TCO v1 the timer counts down twice before rebooting */
+       if (iTCO_wdt_private.iTCO_version == 1)
+               tmrval /= 2;
+
        /* from the specs: */
        /* "Values of 0h-3h are ignored and should not be attempted" */
        if (tmrval < 0x04)
@@ -506,6 +603,8 @@ static int iTCO_wdt_get_timeleft(int *time_left)
                spin_lock(&iTCO_wdt_private.io_lock);
                val8 = inb(TCO_RLD);
                val8 &= 0x3f;
+               if (!(inw(TCO1_STS) & 0x0008))
+                       val8 += (inb(TCOv1_TMR) & 0x3f);
                spin_unlock(&iTCO_wdt_private.io_lock);
 
                *time_left = (val8 * 6) / 10;
@@ -745,9 +844,9 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
                        TCOBASE);
 
        /* Clear out the (probably old) status */
-       outb(8, TCO1_STS);      /* Clear the Time Out Status bit */
-       outb(2, TCO2_STS);      /* Clear SECOND_TO_STS bit */
-       outb(4, TCO2_STS);      /* Clear BOOT_STS bit */
+       outw(0x0008, TCO1_STS); /* Clear the Time Out Status bit */
+       outw(0x0002, TCO2_STS); /* Clear SECOND_TO_STS bit */
+       outw(0x0004, TCO2_STS); /* Clear BOOT_STS bit */
 
        /* Make sure the watchdog is not running */
        iTCO_wdt_stop();
@@ -757,8 +856,7 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
        if (iTCO_wdt_set_heartbeat(heartbeat)) {
                iTCO_wdt_set_heartbeat(WATCHDOG_HEARTBEAT);
                printk(KERN_INFO PFX
-                       "heartbeat value must be 2 < heartbeat < 39 (TCO v1) "
-                               "or 613 (TCO v2), using %d\n", heartbeat);
+                       "timeout value out of range, using %d\n", heartbeat);
        }
 
        ret = misc_register(&iTCO_wdt_miscdev);