/*
- * xilinxfb.c
- *
- * Xilinx TFT LCD frame buffer driver
+ * Xilinx TFT frame buffer driver
*
* Author: MontaVista Software, Inc.
* source@mvista.com
*
- * 2002-2007 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is licensed
- * "as is" without any warranty of any kind, whether express or implied.
+ * 2002-2007 (c) MontaVista Software, Inc.
+ * 2007 (c) Secret Lab Technologies, Ltd.
+ * 2009 (c) Xilinx Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
*/
/*
* Geert Uytterhoeven.
*/
+#include <linux/device.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/version.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-
-#include <asm/io.h>
-#include <syslib/virtex_devices.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
+#include <linux/io.h>
+#include <linux/xilinxfb.h>
+#include <linux/slab.h>
+#include <asm/dcr.h>
#define DRIVER_NAME "xilinxfb"
-#define DRIVER_DESCRIPTION "Xilinx TFT LCD frame buffer driver"
+
/*
* Xilinx calls it "PLB TFT LCD Controller" though it can also be used for
- * the VGA port on the Xilinx ML40x board. This is a hardware display controller
- * for a 640x480 resolution TFT or VGA screen.
+ * the VGA port on the Xilinx ML40x board. This is a hardware display
+ * controller for a 640x480 resolution TFT or VGA screen.
*
* The interface to the framebuffer is nice and simple. There are two
* control registers. The first tells the LCD interface where in memory
* the frame buffer is (only the 11 most significant bits are used, so
* don't start thinking about scrolling). The second allows the LCD to
* be turned on or off as well as rotated 180 degrees.
+ *
+ * In case of direct PLB access the second control register will be at
+ * an offset of 4 as compared to the DCR access where the offset is 1
+ * i.e. REG_CTRL. So this is taken care in the function
+ * xilinx_fb_out_be32 where it left shifts the offset 2 times in case of
+ * direct PLB access.
*/
#define NUM_REGS 2
#define REG_FB_ADDR 0
*/
#define BYTES_PER_PIXEL 4
#define BITS_PER_PIXEL (BYTES_PER_PIXEL * 8)
-#define XRES 640
-#define YRES 480
-#define XRES_VIRTUAL 1024
-#define YRES_VIRTUAL YRES
-#define LINE_LENGTH (XRES_VIRTUAL * BYTES_PER_PIXEL)
-#define FB_SIZE (YRES_VIRTUAL * LINE_LENGTH)
#define RED_SHIFT 16
#define GREEN_SHIFT 8
#define PALETTE_ENTRIES_NO 16 /* passed to fb_alloc_cmap() */
/*
+ * Default xilinxfb configuration
+ */
+static struct xilinxfb_platform_data xilinx_fb_default_pdata = {
+ .xres = 640,
+ .yres = 480,
+ .xvirt = 1024,
+ .yvirt = 480,
+};
+
+/*
* Here are the default fb_fix_screeninfo and fb_var_screeninfo structures
*/
-static struct fb_fix_screeninfo xilinx_fb_fix __initdata = {
+static struct fb_fix_screeninfo xilinx_fb_fix = {
.id = "Xilinx",
.type = FB_TYPE_PACKED_PIXELS,
.visual = FB_VISUAL_TRUECOLOR,
- .smem_len = FB_SIZE,
- .line_length = LINE_LENGTH,
.accel = FB_ACCEL_NONE
};
-static struct fb_var_screeninfo xilinx_fb_var __initdata = {
- .xres = XRES,
- .yres = YRES,
- .xres_virtual = XRES_VIRTUAL,
- .yres_virtual = YRES_VIRTUAL,
-
+static struct fb_var_screeninfo xilinx_fb_var = {
.bits_per_pixel = BITS_PER_PIXEL,
.red = { RED_SHIFT, 8, 0 },
.activate = FB_ACTIVATE_NOW
};
+
+#define PLB_ACCESS_FLAG 0x1 /* 1 = PLB, 0 = DCR */
+
struct xilinxfb_drvdata {
struct fb_info info; /* FB driver info record */
- u32 regs_phys; /* phys. address of the control registers */
- u32 __iomem *regs; /* virt. address of the control registers */
+ phys_addr_t regs_phys; /* phys. address of the control
+ registers */
+ void __iomem *regs; /* virt. address of the control
+ registers */
+
+ dcr_host_t dcr_host;
+ unsigned int dcr_len;
- unsigned char __iomem *fb_virt; /* virt. address of the frame buffer */
+ void *fb_virt; /* virt. address of the frame buffer */
dma_addr_t fb_phys; /* phys. address of the frame buffer */
+ int fb_alloced; /* Flag, was the fb memory alloced? */
+
+ u8 flags; /* features of the driver */
u32 reg_ctrl_default;
container_of(_info, struct xilinxfb_drvdata, info)
/*
- * The LCD controller has DCR interface to its registers, but all
- * the boards and configurations the driver has been tested with
- * use opb2dcr bridge. So the registers are seen as memory mapped.
- * This macro is to make it simple to add the direct DCR access
- * when it's needed.
+ * The XPS TFT Controller can be accessed through PLB or DCR interface.
+ * To perform the read/write on the registers we need to check on
+ * which bus its connected and call the appropriate write API.
*/
-#define xilinx_fb_out_be32(driverdata, offset, val) \
- out_be32(driverdata->regs + offset, val)
+static void xilinx_fb_out_be32(struct xilinxfb_drvdata *drvdata, u32 offset,
+ u32 val)
+{
+ if (drvdata->flags & PLB_ACCESS_FLAG)
+ out_be32(drvdata->regs + (offset << 2), val);
+ else
+ dcr_write(drvdata->dcr_host, offset, val);
+
+}
static int
xilinx_fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
.fb_imageblit = cfb_imageblit,
};
-/* === The device driver === */
+/* ---------------------------------------------------------------------
+ * Bus independent setup/teardown
+ */
-static int
-xilinxfb_drv_probe(struct device *dev)
+static int xilinxfb_assign(struct device *dev,
+ struct xilinxfb_drvdata *drvdata,
+ unsigned long physaddr,
+ struct xilinxfb_platform_data *pdata)
{
- struct platform_device *pdev;
- struct xilinxfb_platform_data *pdata;
- struct xilinxfb_drvdata *drvdata;
- struct resource *regs_res;
- int retval;
-
- if (!dev)
- return -EINVAL;
-
- pdev = to_platform_device(dev);
- pdata = pdev->dev.platform_data;
-
- if (pdata == NULL) {
- printk(KERN_ERR "Couldn't find platform data.\n");
- return -EFAULT;
+ int rc;
+ int fbsize = pdata->xvirt * pdata->yvirt * BYTES_PER_PIXEL;
+
+ if (drvdata->flags & PLB_ACCESS_FLAG) {
+ /*
+ * Map the control registers in if the controller
+ * is on direct PLB interface.
+ */
+ if (!request_mem_region(physaddr, 8, DRIVER_NAME)) {
+ dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
+ physaddr);
+ rc = -ENODEV;
+ goto err_region;
+ }
+
+ drvdata->regs_phys = physaddr;
+ drvdata->regs = ioremap(physaddr, 8);
+ if (!drvdata->regs) {
+ dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
+ physaddr);
+ rc = -ENODEV;
+ goto err_map;
+ }
}
- drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
- if (!drvdata) {
- printk(KERN_ERR "Couldn't allocate device private record\n");
- return -ENOMEM;
- }
- dev_set_drvdata(dev, drvdata);
-
- /* Map the control registers in */
- regs_res = platform_get_resource(pdev, IORESOURCE_IO, 0);
- if (!regs_res || (regs_res->end - regs_res->start + 1 < 8)) {
- printk(KERN_ERR "Couldn't get registers resource\n");
- retval = -EFAULT;
- goto failed1;
- }
-
- if (!request_mem_region(regs_res->start, 8, DRIVER_NAME)) {
- printk(KERN_ERR
- "Couldn't lock memory region at 0x%08X\n",
- regs_res->start);
- retval = -EBUSY;
- goto failed1;
+ /* Allocate the framebuffer memory */
+ if (pdata->fb_phys) {
+ drvdata->fb_phys = pdata->fb_phys;
+ drvdata->fb_virt = ioremap(pdata->fb_phys, fbsize);
+ } else {
+ drvdata->fb_alloced = 1;
+ drvdata->fb_virt = dma_alloc_coherent(dev, PAGE_ALIGN(fbsize),
+ &drvdata->fb_phys, GFP_KERNEL);
}
- drvdata->regs = (u32 __iomem*) ioremap(regs_res->start, 8);
- drvdata->regs_phys = regs_res->start;
- /* Allocate the framebuffer memory */
- drvdata->fb_virt = dma_alloc_coherent(dev, PAGE_ALIGN(FB_SIZE),
- &drvdata->fb_phys, GFP_KERNEL);
if (!drvdata->fb_virt) {
- printk(KERN_ERR "Could not allocate frame buffer memory\n");
- retval = -ENOMEM;
- goto failed2;
+ dev_err(dev, "Could not allocate frame buffer memory\n");
+ rc = -ENOMEM;
+ if (drvdata->flags & PLB_ACCESS_FLAG)
+ goto err_fbmem;
+ else
+ goto err_region;
}
/* Clear (turn to black) the framebuffer */
- memset_io((void *) drvdata->fb_virt, 0, FB_SIZE);
+ memset_io((void __iomem *)drvdata->fb_virt, 0, fbsize);
/* Tell the hardware where the frame buffer is */
xilinx_fb_out_be32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
/* Turn on the display */
- if (pdata->rotate_screen) {
- drvdata->reg_ctrl_default = REG_CTRL_ENABLE | REG_CTRL_ROTATE;
- } else {
- drvdata->reg_ctrl_default = REG_CTRL_ENABLE;
- }
- xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
+ drvdata->reg_ctrl_default = REG_CTRL_ENABLE;
+ if (pdata->rotate_screen)
+ drvdata->reg_ctrl_default |= REG_CTRL_ROTATE;
+ xilinx_fb_out_be32(drvdata, REG_CTRL,
+ drvdata->reg_ctrl_default);
/* Fill struct fb_info */
drvdata->info.device = dev;
- drvdata->info.screen_base = drvdata->fb_virt;
+ drvdata->info.screen_base = (void __iomem *)drvdata->fb_virt;
drvdata->info.fbops = &xilinxfb_ops;
drvdata->info.fix = xilinx_fb_fix;
drvdata->info.fix.smem_start = drvdata->fb_phys;
- drvdata->info.pseudo_palette = drvdata->pseudo_palette;
-
- if (fb_alloc_cmap(&drvdata->info.cmap, PALETTE_ENTRIES_NO, 0) < 0) {
- printk(KERN_ERR "Fail to allocate colormap (%d entries)\n",
- PALETTE_ENTRIES_NO);
- retval = -EFAULT;
- goto failed3;
- }
+ drvdata->info.fix.smem_len = fbsize;
+ drvdata->info.fix.line_length = pdata->xvirt * BYTES_PER_PIXEL;
+ drvdata->info.pseudo_palette = drvdata->pseudo_palette;
drvdata->info.flags = FBINFO_DEFAULT;
- xilinx_fb_var.height = pdata->screen_height_mm;
- xilinx_fb_var.width = pdata->screen_width_mm;
drvdata->info.var = xilinx_fb_var;
+ drvdata->info.var.height = pdata->screen_height_mm;
+ drvdata->info.var.width = pdata->screen_width_mm;
+ drvdata->info.var.xres = pdata->xres;
+ drvdata->info.var.yres = pdata->yres;
+ drvdata->info.var.xres_virtual = pdata->xvirt;
+ drvdata->info.var.yres_virtual = pdata->yvirt;
+
+ /* Allocate a colour map */
+ rc = fb_alloc_cmap(&drvdata->info.cmap, PALETTE_ENTRIES_NO, 0);
+ if (rc) {
+ dev_err(dev, "Fail to allocate colormap (%d entries)\n",
+ PALETTE_ENTRIES_NO);
+ goto err_cmap;
+ }
/* Register new frame buffer */
- if (register_framebuffer(&drvdata->info) < 0) {
- printk(KERN_ERR "Could not register frame buffer\n");
- retval = -EINVAL;
- goto failed4;
+ rc = register_framebuffer(&drvdata->info);
+ if (rc) {
+ dev_err(dev, "Could not register frame buffer\n");
+ goto err_regfb;
+ }
+
+ if (drvdata->flags & PLB_ACCESS_FLAG) {
+ /* Put a banner in the log (for DEBUG) */
+ dev_dbg(dev, "regs: phys=%lx, virt=%p\n", physaddr,
+ drvdata->regs);
}
+ /* Put a banner in the log (for DEBUG) */
+ dev_dbg(dev, "fb: phys=%llx, virt=%p, size=%x\n",
+ (unsigned long long)drvdata->fb_phys, drvdata->fb_virt, fbsize);
return 0; /* success */
-failed4:
+err_regfb:
fb_dealloc_cmap(&drvdata->info.cmap);
-failed3:
- dma_free_coherent(dev, PAGE_ALIGN(FB_SIZE), drvdata->fb_virt,
- drvdata->fb_phys);
+err_cmap:
+ if (drvdata->fb_alloced)
+ dma_free_coherent(dev, PAGE_ALIGN(fbsize), drvdata->fb_virt,
+ drvdata->fb_phys);
+ else
+ iounmap(drvdata->fb_virt);
/* Turn off the display */
xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
- iounmap(drvdata->regs);
-failed2:
- release_mem_region(regs_res->start, 8);
+err_fbmem:
+ if (drvdata->flags & PLB_ACCESS_FLAG)
+ iounmap(drvdata->regs);
-failed1:
+err_map:
+ if (drvdata->flags & PLB_ACCESS_FLAG)
+ release_mem_region(physaddr, 8);
+
+err_region:
kfree(drvdata);
dev_set_drvdata(dev, NULL);
- return retval;
+ return rc;
}
-static int
-xilinxfb_drv_remove(struct device *dev)
+static int xilinxfb_release(struct device *dev)
{
- struct xilinxfb_drvdata *drvdata;
-
- if (!dev)
- return -ENODEV;
-
- drvdata = (struct xilinxfb_drvdata *) dev_get_drvdata(dev);
+ struct xilinxfb_drvdata *drvdata = dev_get_drvdata(dev);
#if !defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_LOGO)
xilinx_fb_blank(VESA_POWERDOWN, &drvdata->info);
fb_dealloc_cmap(&drvdata->info.cmap);
- dma_free_coherent(dev, PAGE_ALIGN(FB_SIZE), drvdata->fb_virt,
- drvdata->fb_phys);
+ if (drvdata->fb_alloced)
+ dma_free_coherent(dev, PAGE_ALIGN(drvdata->info.fix.smem_len),
+ drvdata->fb_virt, drvdata->fb_phys);
+ else
+ iounmap(drvdata->fb_virt);
/* Turn off the display */
xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
- iounmap(drvdata->regs);
- release_mem_region(drvdata->regs_phys, 8);
+ /* Release the resources, as allocated based on interface */
+ if (drvdata->flags & PLB_ACCESS_FLAG) {
+ iounmap(drvdata->regs);
+ release_mem_region(drvdata->regs_phys, 8);
+ } else
+ dcr_unmap(drvdata->dcr_host, drvdata->dcr_len);
kfree(drvdata);
dev_set_drvdata(dev, NULL);
return 0;
}
+/* ---------------------------------------------------------------------
+ * OF bus binding
+ */
+
+static int __devinit
+xilinxfb_of_probe(struct of_device *op, const struct of_device_id *match)
+{
+ const u32 *prop;
+ u32 *p;
+ u32 tft_access;
+ struct xilinxfb_platform_data pdata;
+ struct resource res;
+ int size, rc, start;
+ struct xilinxfb_drvdata *drvdata;
+
+ /* Copy with the default pdata (not a ptr reference!) */
+ pdata = xilinx_fb_default_pdata;
+
+ dev_dbg(&op->dev, "xilinxfb_of_probe(%p, %p)\n", op, match);
-static struct device_driver xilinxfb_driver = {
- .name = DRIVER_NAME,
- .bus = &platform_bus_type,
+ /* Allocate the driver data region */
+ drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
+ if (!drvdata) {
+ dev_err(&op->dev, "Couldn't allocate device private record\n");
+ return -ENOMEM;
+ }
- .probe = xilinxfb_drv_probe,
- .remove = xilinxfb_drv_remove
+ /*
+ * To check whether the core is connected directly to DCR or PLB
+ * interface and initialize the tft_access accordingly.
+ */
+ p = (u32 *)of_get_property(op->node, "xlnx,dcr-splb-slave-if", NULL);
+ tft_access = p ? *p : 0;
+
+ /*
+ * Fill the resource structure if its direct PLB interface
+ * otherwise fill the dcr_host structure.
+ */
+ if (tft_access) {
+ drvdata->flags |= PLB_ACCESS_FLAG;
+ rc = of_address_to_resource(op->node, 0, &res);
+ if (rc) {
+ dev_err(&op->dev, "invalid address\n");
+ goto err;
+ }
+ } else {
+ res.start = 0;
+ start = dcr_resource_start(op->node, 0);
+ drvdata->dcr_len = dcr_resource_len(op->node, 0);
+ drvdata->dcr_host = dcr_map(op->node, start, drvdata->dcr_len);
+ if (!DCR_MAP_OK(drvdata->dcr_host)) {
+ dev_err(&op->dev, "invalid DCR address\n");
+ goto err;
+ }
+ }
+
+ prop = of_get_property(op->node, "phys-size", &size);
+ if ((prop) && (size >= sizeof(u32)*2)) {
+ pdata.screen_width_mm = prop[0];
+ pdata.screen_height_mm = prop[1];
+ }
+
+ prop = of_get_property(op->node, "resolution", &size);
+ if ((prop) && (size >= sizeof(u32)*2)) {
+ pdata.xres = prop[0];
+ pdata.yres = prop[1];
+ }
+
+ prop = of_get_property(op->node, "virtual-resolution", &size);
+ if ((prop) && (size >= sizeof(u32)*2)) {
+ pdata.xvirt = prop[0];
+ pdata.yvirt = prop[1];
+ }
+
+ if (of_find_property(op->node, "rotate-display", NULL))
+ pdata.rotate_screen = 1;
+
+ dev_set_drvdata(&op->dev, drvdata);
+ return xilinxfb_assign(&op->dev, drvdata, res.start, &pdata);
+
+ err:
+ kfree(drvdata);
+ return -ENODEV;
+}
+
+static int __devexit xilinxfb_of_remove(struct of_device *op)
+{
+ return xilinxfb_release(&op->dev);
+}
+
+/* Match table for of_platform binding */
+static struct of_device_id xilinxfb_of_match[] __devinitdata = {
+ { .compatible = "xlnx,xps-tft-1.00.a", },
+ { .compatible = "xlnx,plb-tft-cntlr-ref-1.00.a", },
+ { .compatible = "xlnx,plb-dvi-cntlr-ref-1.00.c", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, xilinxfb_of_match);
+
+static struct of_platform_driver xilinxfb_of_driver = {
+ .owner = THIS_MODULE,
+ .name = DRIVER_NAME,
+ .match_table = xilinxfb_of_match,
+ .probe = xilinxfb_of_probe,
+ .remove = __devexit_p(xilinxfb_of_remove),
+ .driver = {
+ .name = DRIVER_NAME,
+ },
};
+
+/* ---------------------------------------------------------------------
+ * Module setup and teardown
+ */
+
static int __init
xilinxfb_init(void)
{
- /*
- * No kernel boot options used,
- * so we just need to register the driver
- */
- return driver_register(&xilinxfb_driver);
+ return of_register_platform_driver(&xilinxfb_of_driver);
}
static void __exit
xilinxfb_cleanup(void)
{
- driver_unregister(&xilinxfb_driver);
+ of_unregister_platform_driver(&xilinxfb_of_driver);
}
module_init(xilinxfb_init);
module_exit(xilinxfb_cleanup);
MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
-MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
+MODULE_DESCRIPTION("Xilinx TFT frame buffer driver");
MODULE_LICENSE("GPL");
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff