*
* Author: Hannu Mallat <hmallat@cc.hut.fi>
*
- * Copyright © 1999 Hannu Mallat
+ * Copyright © 1999 Hannu Mallat
* All rights reserved
*
* Created : Thu Sep 23 18:17:43 1999, hmallat
* driver by Ilario Nardinocchi, which in turn is based on skeletonfb.
*
* TODO:
- * - support for 16/32 bpp needs fixing (funky bootup penguin)
* - multihead support (basically need to support an array of fb_infos)
* - support other architectures (PPC, Alpha); does the fact that the VGA
* core can be accessed only thru I/O (not memory mapped) complicate
*
* Version history:
*
- * 0.1.4 (released 2002-05-28) ported over to new fbdev api by James Simmons
+ * 0.1.4 (released 2002-05-28) ported over to new fbdev api by James Simmons
*
- * 0.1.3 (released 1999-11-02) added Attila's panning support, code
- * reorg, hwcursor address page size alignment
- * (for mmaping both frame buffer and regs),
- * and my changes to get rid of hardcoded
- * VGA i/o register locations (uses PCI
- * configuration info now)
- * 0.1.2 (released 1999-10-19) added Attila Kesmarki's bug fixes and
- * improvements
- * 0.1.1 (released 1999-10-07) added Voodoo3 support by Harold Oga.
- * 0.1.0 (released 1999-10-06) initial version
+ * 0.1.3 (released 1999-11-02) added Attila's panning support, code
+ * reorg, hwcursor address page size alignment
+ * (for mmaping both frame buffer and regs),
+ * and my changes to get rid of hardcoded
+ * VGA i/o register locations (uses PCI
+ * configuration info now)
+ * 0.1.2 (released 1999-10-19) added Attila Kesmarki's bug fixes and
+ * improvements
+ * 0.1.1 (released 1999-10-07) added Voodoo3 support by Harold Oga.
+ * 0.1.0 (released 1999-10-06) initial version
*
*/
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/interrupt.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/pci.h>
-#include <linux/nvram.h>
#include <asm/io.h>
-#include <linux/timer.h>
-#include <linux/spinlock.h>
#include <video/tdfx.h>
-#undef TDFXFB_DEBUG
-#ifdef TDFXFB_DEBUG
-#define DPRINTK(a,b...) printk(KERN_DEBUG "fb: %s: " a, __FUNCTION__ , ## b)
+#define DPRINTK(a, b...) pr_debug("fb: %s: " a, __func__ , ## b)
+
+#ifdef CONFIG_MTRR
+#include <asm/mtrr.h>
#else
-#define DPRINTK(a,b...)
+/* duplicate asm/mtrr.h defines to work on archs without mtrr */
+#define MTRR_TYPE_WRCOMB 1
+
+static inline int mtrr_add(unsigned long base, unsigned long size,
+ unsigned int type, char increment)
+{
+ return -ENODEV;
+}
+static inline int mtrr_del(int reg, unsigned long base,
+ unsigned long size)
+{
+ return -ENODEV;
+}
#endif
#define BANSHEE_MAX_PIXCLOCK 270000
#define VOODOO5_MAX_PIXCLOCK 350000
static struct fb_fix_screeninfo tdfx_fix __devinitdata = {
- .id = "3Dfx",
.type = FB_TYPE_PACKED_PIXELS,
.visual = FB_VISUAL_PSEUDOCOLOR,
.ypanstep = 1,
/*
* Driver data
*/
-static int nopan = 0;
-static int nowrap = 1; // not implemented (yet)
-static char *mode_option __devinitdata = NULL;
+static int nopan;
+static int nowrap = 1; /* not implemented (yet) */
+static int hwcursor = 1;
+static char *mode_option __devinitdata;
+/* mtrr option */
+static int nomtrr __devinitdata;
/* -------------------------------------------------------------------------
- * Hardware-specific funcions
+ * Hardware-specific funcions
* ------------------------------------------------------------------------- */
-#ifdef VGA_REG_IO
-static inline u8 vga_inb(struct tdfx_par *par, u32 reg)
-{
- return inb(reg);
-}
-
-static inline void vga_outb(struct tdfx_par *par, u32 reg, u8 val)
-{
- outb(val, reg);
-}
-#else
static inline u8 vga_inb(struct tdfx_par *par, u32 reg)
{
return inb(par->iobase + reg - 0x300);
}
+
static inline void vga_outb(struct tdfx_par *par, u32 reg, u8 val)
{
outb(val, par->iobase + reg - 0x300);
}
-#endif
static inline void gra_outb(struct tdfx_par *par, u32 idx, u8 val)
{
vga_outb(par, GRA_I, idx);
+ wmb();
vga_outb(par, GRA_D, val);
+ wmb();
}
static inline void seq_outb(struct tdfx_par *par, u32 idx, u8 val)
{
vga_outb(par, SEQ_I, idx);
+ wmb();
vga_outb(par, SEQ_D, val);
+ wmb();
}
static inline u8 seq_inb(struct tdfx_par *par, u32 idx)
{
vga_outb(par, SEQ_I, idx);
+ mb();
return vga_inb(par, SEQ_D);
}
static inline void crt_outb(struct tdfx_par *par, u32 idx, u8 val)
{
vga_outb(par, CRT_I, idx);
+ wmb();
vga_outb(par, CRT_D, val);
+ wmb();
}
static inline u8 crt_inb(struct tdfx_par *par, u32 idx)
{
vga_outb(par, CRT_I, idx);
+ mb();
return vga_inb(par, CRT_D);
}
static inline void vga_enable_palette(struct tdfx_par *par)
{
vga_inb(par, IS1_R);
+ mb();
vga_outb(par, ATT_IW, 0x20);
}
{
/* Note: The Voodoo3's onboard FIFO has 32 slots. This loop
* won't quit if you ask for more. */
- while ((tdfx_inl(par, STATUS) & 0x1f) < size - 1) ;
+ while ((tdfx_inl(par, STATUS) & 0x1f) < size - 1)
+ cpu_relax();
}
-
+
static int banshee_wait_idle(struct fb_info *info)
{
struct tdfx_par *par = info->par;
banshee_make_room(par, 1);
tdfx_outl(par, COMMAND_3D, COMMAND_3D_NOP);
- while (1) {
- i = (tdfx_inl(par, STATUS) & STATUS_BUSY) ? 0 : i + 1;
- if (i == 3)
- break;
- }
+ do {
+ if ((tdfx_inl(par, STATUS) & STATUS_BUSY) == 0)
+ i++;
+ } while (i < 3);
+
return 0;
}
* Set the color of a palette entry in 8bpp mode
*/
static inline void do_setpalentry(struct tdfx_par *par, unsigned regno, u32 c)
-{
+{
banshee_make_room(par, 2);
tdfx_outl(par, DACADDR, regno);
+ /* read after write makes it working */
+ tdfx_inl(par, DACADDR);
tdfx_outl(par, DACDATA, c);
}
* Estimate value of n that produces target frequency
* with current m and k
*/
- int n_estimated = (freq * (m + 2) * (1 << k) / fref) - 2;
+ int n_estimated = ((freq * (m + 2) << k) / fref) - 2;
/* Search neighborhood of estimated n */
- for (n = max(0, n_estimated - 1);
- n <= min(255, n_estimated + 1); n++) {
+ for (n = max(0, n_estimated);
+ n <= min(255, n_estimated + 1);
+ n++) {
/*
* Calculate PLL freqency with current m, k and
* estimated n
*/
- int f = fref * (n + 2) / (m + 2) / (1 << k);
+ int f = (fref * (n + 2) / (m + 2)) >> k;
int error = abs(f - freq);
/*
n = best_n;
m = best_m;
k = best_k;
- *freq_out = fref * (n + 2) / (m + 2) / (1 << k);
+ *freq_out = (fref * (n + 2) / (m + 2)) >> k;
return (n << 8) | (m << 2) | k;
}
vga_enable_palette(par);
vga_enable_video(par);
- banshee_make_room(par, 11);
+ banshee_make_room(par, 9);
tdfx_outl(par, VGAINIT0, reg->vgainit0);
tdfx_outl(par, DACMODE, reg->dacmode);
tdfx_outl(par, VIDDESKSTRIDE, reg->stride);
- tdfx_outl(par, HWCURPATADDR, 0);
+ tdfx_outl(par, HWCURPATADDR, reg->curspataddr);
tdfx_outl(par, VIDSCREENSIZE, reg->screensize);
tdfx_outl(par, VIDDESKSTART, reg->startaddr);
tdfx_outl(par, MISCINIT0, reg->miscinit0);
banshee_make_room(par, 8);
- tdfx_outl(par, SRCBASE, reg->srcbase);
- tdfx_outl(par, DSTBASE, reg->dstbase);
+ tdfx_outl(par, SRCBASE, reg->startaddr);
+ tdfx_outl(par, DSTBASE, reg->startaddr);
tdfx_outl(par, COMMANDEXTRA_2D, 0);
tdfx_outl(par, CLIP0MIN, 0);
tdfx_outl(par, CLIP0MAX, 0x0fff0fff);
static unsigned long do_lfb_size(struct tdfx_par *par, unsigned short dev_id)
{
- u32 draminit0;
- u32 draminit1;
+ u32 draminit0 = tdfx_inl(par, DRAMINIT0);
+ u32 draminit1 = tdfx_inl(par, DRAMINIT1);
u32 miscinit1;
-
- int num_chips;
+ int num_chips = (draminit0 & DRAMINIT0_SGRAM_NUM) ? 8 : 4;
int chip_size; /* in MB */
- u32 lfbsize;
- int has_sgram;
-
- draminit0 = tdfx_inl(par, DRAMINIT0);
- draminit1 = tdfx_inl(par, DRAMINIT1);
-
- num_chips = (draminit0 & DRAMINIT0_SGRAM_NUM) ? 8 : 4;
+ int has_sgram = draminit1 & DRAMINIT1_MEM_SDRAM;
if (dev_id < PCI_DEVICE_ID_3DFX_VOODOO5) {
/* Banshee/Voodoo3 */
- has_sgram = draminit1 & DRAMINIT1_MEM_SDRAM;
chip_size = 2;
- if (has_sgram)
- chip_size = (draminit0 & DRAMINIT0_SGRAM_TYPE) ? 2 : 1;
+ if (has_sgram && !(draminit0 & DRAMINIT0_SGRAM_TYPE))
+ chip_size = 1;
} else {
/* Voodoo4/5 */
has_sgram = 0;
- chip_size = 1 << ((draminit0 & DRAMINIT0_SGRAM_TYPE_MASK) >> DRAMINIT0_SGRAM_TYPE_SHIFT);
+ chip_size = draminit0 & DRAMINIT0_SGRAM_TYPE_MASK;
+ chip_size = 1 << (chip_size >> DRAMINIT0_SGRAM_TYPE_SHIFT);
}
- lfbsize = num_chips * chip_size * 1024 * 1024;
/* disable block writes for SDRAM */
miscinit1 = tdfx_inl(par, MISCINIT1);
banshee_make_room(par, 1);
tdfx_outl(par, MISCINIT1, miscinit1);
- return lfbsize;
+ return num_chips * chip_size * 1024l * 1024;
}
/* ------------------------------------------------------------------------- */
DPRINTK("xoffset not supported\n");
return -EINVAL;
}
+ var->yoffset = 0;
- /* Banshee doesn't support interlace, but Voodoo4/5 and probably Voodoo3 do. */
- /* no direct information about device id now? use max_pixclock for this... */
+ /*
+ * Banshee doesn't support interlace, but Voodoo4/5 and probably
+ * Voodoo3 do.
+ * no direct information about device id now?
+ * use max_pixclock for this...
+ */
if (((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) &&
(par->max_pixclock < VOODOO3_MAX_PIXCLOCK)) {
DPRINTK("interlace not supported\n");
var->transp.length = 0;
switch (var->bits_per_pixel) {
case 8:
- var->red.length = var->green.length = var->blue.length = 8;
+ var->red.length = 8;
+ var->red.offset = 0;
+ var->green = var->red;
+ var->blue = var->red;
break;
case 16:
var->red.offset = 11;
var->red.length = var->green.length = var->blue.length = 8;
break;
}
- var->height = var->width = -1;
+ var->width = -1;
+ var->height = -1;
var->accel_flags = FB_ACCELF_TEXT;
static int tdfxfb_set_par(struct fb_info *info)
{
struct tdfx_par *par = info->par;
- u32 hdispend, hsyncsta, hsyncend, htotal;
+ u32 hdispend = info->var.xres;
+ u32 hsyncsta = hdispend + info->var.right_margin;
+ u32 hsyncend = hsyncsta + info->var.hsync_len;
+ u32 htotal = hsyncend + info->var.left_margin;
u32 hd, hs, he, ht, hbs, hbe;
u32 vd, vs, ve, vt, vbs, vbe;
struct banshee_reg reg;
int fout, freq;
- u32 wd, cpp;
-
- par->baseline = 0;
+ u32 wd;
+ u32 cpp = (info->var.bits_per_pixel + 7) >> 3;
memset(®, 0, sizeof(reg));
- cpp = (info->var.bits_per_pixel + 7) / 8;
reg.vidcfg = VIDCFG_VIDPROC_ENABLE | VIDCFG_DESK_ENABLE |
VIDCFG_CURS_X11 |
/* PLL settings */
freq = PICOS2KHZ(info->var.pixclock);
- reg.dacmode = 0;
reg.vidcfg &= ~VIDCFG_2X;
- hdispend = info->var.xres;
- hsyncsta = hdispend + info->var.right_margin;
- hsyncend = hsyncsta + info->var.hsync_len;
- htotal = hsyncend + info->var.left_margin;
-
if (freq > par->max_pixclock / 2) {
freq = freq > par->max_pixclock ? par->max_pixclock : freq;
reg.dacmode |= DACMODE_2X;
htotal >>= 1;
}
- hd = wd = (hdispend >> 3) - 1;
+ wd = (hdispend >> 3) - 1;
+ hd = wd;
hs = (hsyncsta >> 3) - 1;
he = (hsyncend >> 3) - 1;
ht = (htotal >> 3) - 1;
hbe = ht;
if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
- vbs = vd = (info->var.yres << 1) - 1;
+ vd = (info->var.yres << 1) - 1;
vs = vd + (info->var.lower_margin << 1);
ve = vs + (info->var.vsync_len << 1);
- vbe = vt = ve + (info->var.upper_margin << 1) - 1;
+ vt = ve + (info->var.upper_margin << 1) - 1;
+ reg.screensize = info->var.xres | (info->var.yres << 13);
+ reg.vidcfg |= VIDCFG_HALF_MODE;
+ reg.crt[0x09] = 0x80;
} else {
- vbs = vd = info->var.yres - 1;
+ vd = info->var.yres - 1;
vs = vd + info->var.lower_margin;
ve = vs + info->var.vsync_len;
- vbe = vt = ve + info->var.upper_margin - 1;
+ vt = ve + info->var.upper_margin - 1;
+ reg.screensize = info->var.xres | (info->var.yres << 12);
+ reg.vidcfg &= ~VIDCFG_HALF_MODE;
}
+ vbs = vd;
+ vbe = vt;
/* this is all pretty standard VGA register stuffing */
reg.misc[0x00] = 0x0f |
info->var.xres < 480 ? 0x60 :
info->var.xres < 768 ? 0xe0 : 0x20);
- reg.gra[0x00] = 0x00;
- reg.gra[0x01] = 0x00;
- reg.gra[0x02] = 0x00;
- reg.gra[0x03] = 0x00;
- reg.gra[0x04] = 0x00;
reg.gra[0x05] = 0x40;
reg.gra[0x06] = 0x05;
reg.gra[0x07] = 0x0f;
reg.att[0x0e] = 0x0e;
reg.att[0x0f] = 0x0f;
reg.att[0x10] = 0x41;
- reg.att[0x11] = 0x00;
reg.att[0x12] = 0x0f;
- reg.att[0x13] = 0x00;
- reg.att[0x14] = 0x00;
reg.seq[0x00] = 0x03;
reg.seq[0x01] = 0x01; /* fixme: clkdiv2? */
((vs & 0x100) >> 6) |
((vd & 0x100) >> 7) |
((vt & 0x100) >> 8);
- reg.crt[0x08] = 0x00;
- reg.crt[0x09] = 0x40 | ((vbs & 0x200) >> 4);
- reg.crt[0x0a] = 0x00;
- reg.crt[0x0b] = 0x00;
- reg.crt[0x0c] = 0x00;
- reg.crt[0x0d] = 0x00;
- reg.crt[0x0e] = 0x00;
- reg.crt[0x0f] = 0x00;
+ reg.crt[0x09] |= 0x40 | ((vbs & 0x200) >> 4);
reg.crt[0x10] = vs;
reg.crt[0x11] = (ve & 0x0f) | 0x20;
reg.crt[0x12] = vd;
reg.crt[0x13] = wd;
- reg.crt[0x14] = 0x00;
reg.crt[0x15] = vbs;
reg.crt[0x16] = vbe + 1;
reg.crt[0x17] = 0xc3;
VGAINIT0_EXTSHIFTOUT;
reg.vgainit1 = tdfx_inl(par, VGAINIT1) & 0x1fffff;
+ if (hwcursor)
+ reg.curspataddr = info->fix.smem_len;
+
reg.cursloc = 0;
reg.cursc0 = 0;
reg.cursc1 = 0xffffff;
reg.stride = info->var.xres * cpp;
- reg.startaddr = par->baseline * reg.stride;
- reg.srcbase = reg.startaddr;
- reg.dstbase = reg.startaddr;
-
- /* PLL settings */
- freq = PICOS2KHZ(info->var.pixclock);
+ reg.startaddr = info->var.yoffset * reg.stride
+ + info->var.xoffset * cpp;
- reg.dacmode &= ~DACMODE_2X;
- reg.vidcfg &= ~VIDCFG_2X;
- if (freq > par->max_pixclock / 2) {
- freq = freq > par->max_pixclock ? par->max_pixclock : freq;
- reg.dacmode |= DACMODE_2X;
- reg.vidcfg |= VIDCFG_2X;
- }
reg.vidpll = do_calc_pll(freq, &fout);
#if 0
reg.mempll = do_calc_pll(..., &fout);
reg.gfxpll = do_calc_pll(..., &fout);
#endif
- if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
- reg.screensize = info->var.xres | (info->var.yres << 13);
- reg.vidcfg |= VIDCFG_HALF_MODE;
- reg.crt[0x09] |= 0x80;
- } else {
- reg.screensize = info->var.xres | (info->var.yres << 12);
- reg.vidcfg &= ~VIDCFG_HALF_MODE;
- }
if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
reg.vidcfg |= VIDCFG_INTERLACE;
reg.miscinit0 = tdfx_inl(par, MISCINIT0);
do_write_regs(info, ®);
/* Now change fb_fix_screeninfo according to changes in par */
- info->fix.line_length =
- info->var.xres * ((info->var.bits_per_pixel + 7) >> 3);
+ info->fix.line_length = reg.stride;
info->fix.visual = (info->var.bits_per_pixel == 8)
? FB_VISUAL_PSEUDOCOLOR
: FB_VISUAL_TRUECOLOR;
}
/* A handy macro shamelessly pinched from matroxfb */
-#define CNVT_TOHW(val, width) ((((val)<<(width))+0x7FFF-(val))>>16)
+#define CNVT_TOHW(val, width) ((((val) << (width)) + 0x7FFF - (val)) >> 16)
static int tdfxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
unsigned blue, unsigned transp,
if (regno >= info->cmap.len || regno > 255)
return 1;
+ /* grayscale works only partially under directcolor */
+ if (info->var.grayscale) {
+ /* grayscale = 0.30*R + 0.59*G + 0.11*B */
+ blue = (red * 77 + green * 151 + blue * 28) >> 8;
+ green = blue;
+ red = blue;
+ }
+
switch (info->fix.visual) {
case FB_VISUAL_PSEUDOCOLOR:
- rgbcol =(((u32)red & 0xff00) << 8) |
- (((u32)green & 0xff00) << 0) |
- (((u32)blue & 0xff00) >> 8);
+ rgbcol = (((u32)red & 0xff00) << 8) |
+ (((u32)green & 0xff00) << 0) |
+ (((u32)blue & 0xff00) >> 8);
do_setpalentry(par, regno, rgbcol);
break;
/* Truecolor has no hardware color palettes. */
static int tdfxfb_blank(int blank, struct fb_info *info)
{
struct tdfx_par *par = info->par;
- u32 dacmode, state = 0, vgablank = 0;
+ int vgablank = 1;
+ u32 dacmode = tdfx_inl(par, DACMODE);
- dacmode = tdfx_inl(par, DACMODE);
+ dacmode &= ~(BIT(1) | BIT(3));
switch (blank) {
case FB_BLANK_UNBLANK: /* Screen: On; HSync: On, VSync: On */
- state = 0;
vgablank = 0;
break;
case FB_BLANK_NORMAL: /* Screen: Off; HSync: On, VSync: On */
- state = 0;
- vgablank = 1;
break;
case FB_BLANK_VSYNC_SUSPEND: /* Screen: Off; HSync: On, VSync: Off */
- state = BIT(3);
- vgablank = 1;
+ dacmode |= BIT(3);
break;
case FB_BLANK_HSYNC_SUSPEND: /* Screen: Off; HSync: Off, VSync: On */
- state = BIT(1);
- vgablank = 1;
+ dacmode |= BIT(1);
break;
case FB_BLANK_POWERDOWN: /* Screen: Off; HSync: Off, VSync: Off */
- state = BIT(1) | BIT(3);
- vgablank = 1;
+ dacmode |= BIT(1) | BIT(3);
break;
}
- dacmode &= ~(BIT(1) | BIT(3));
- dacmode |= state;
banshee_make_room(par, 1);
tdfx_outl(par, DACMODE, dacmode);
if (vgablank)
struct fb_info *info)
{
struct tdfx_par *par = info->par;
- u32 addr;
+ u32 addr = var->yoffset * info->fix.line_length;
- if (nopan || var->xoffset || (var->yoffset > var->yres_virtual))
- return -EINVAL;
- if ((var->yoffset + var->yres > var->yres_virtual && nowrap))
+ if (nopan || var->xoffset)
return -EINVAL;
- addr = var->yoffset * info->fix.line_length;
banshee_make_room(par, 1);
tdfx_outl(par, VIDDESKSTART, addr);
- info->var.xoffset = var->xoffset;
- info->var.yoffset = var->yoffset;
return 0;
}
struct tdfx_par *par = info->par;
u32 bpp = info->var.bits_per_pixel;
u32 stride = info->fix.line_length;
- u32 fmt= stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
+ u32 fmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
int tdfx_rop;
u32 dx = rect->dx;
u32 dy = rect->dy;
dx = 0;
}
-
if (area->sx <= area->dx) {
- //-X
+ /* -X */
blitcmd |= BIT(14);
sx += area->width - 1;
dx += area->width - 1;
}
if (area->sy <= area->dy) {
- //-Y
+ /* -Y */
blitcmd |= BIT(15);
sy += area->height - 1;
dy += area->height - 1;
u32 dstbase = 0;
if (image->depth != 1) {
- //banshee_make_room(par, 6 + ((size + 3) >> 2));
- //srcfmt = stride | ((bpp+((bpp==8) ? 0 : 8)) << 13) | 0x400000;
+#ifdef BROKEN_CODE
+ banshee_make_room(par, 6 + ((size + 3) >> 2));
+ srcfmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13) |
+ 0x400000;
+#else
cfb_imageblit(info, image);
+#endif
return;
}
banshee_make_room(par, 9);
tdfx_outl(par, DSTBASE, dstbase);
tdfx_outl(par, SRCXY, 0);
tdfx_outl(par, DSTXY, dx | (dy << 16));
- tdfx_outl(par, COMMAND_2D, COMMAND_2D_H2S_BITBLT | (TDFX_ROP_COPY << 24));
+ tdfx_outl(par, COMMAND_2D,
+ COMMAND_2D_H2S_BITBLT | (TDFX_ROP_COPY << 24));
tdfx_outl(par, SRCFORMAT, srcfmt);
tdfx_outl(par, DSTFORMAT, dstfmt);
tdfx_outl(par, DSTSIZE, image->width | (image->height << 16));
fifo_free = 31;
banshee_make_room(par, fifo_free);
}
- tdfx_outl(par, LAUNCH_2D, *(u32*)chardata);
+ tdfx_outl(par, LAUNCH_2D, *(u32 *)chardata);
chardata += 4;
}
/* Send the leftovers now */
banshee_make_room(par, 3);
- i = size % 4;
- switch (i) {
+ switch (size % 4) {
case 0:
break;
case 1:
tdfx_outl(par, LAUNCH_2D, *chardata);
break;
case 2:
- tdfx_outl(par, LAUNCH_2D, *(u16*)chardata);
+ tdfx_outl(par, LAUNCH_2D, *(u16 *)chardata);
break;
case 3:
tdfx_outl(par, LAUNCH_2D,
- *(u16*)chardata | ((chardata[3]) << 24));
+ *(u16 *)chardata | (chardata[3] << 24));
break;
}
}
#endif /* CONFIG_FB_3DFX_ACCEL */
-#ifdef TDFX_HARDWARE_CURSOR
static int tdfxfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
{
struct tdfx_par *par = info->par;
- unsigned long flags;
+ u32 vidcfg;
+
+ if (!hwcursor)
+ return -EINVAL; /* just to force soft_cursor() call */
+
+ /* Too large of a cursor or wrong bpp :-( */
+ if (cursor->image.width > 64 ||
+ cursor->image.height > 64 ||
+ cursor->image.depth > 1)
+ return -EINVAL;
+
+ vidcfg = tdfx_inl(par, VIDPROCCFG);
+ if (cursor->enable)
+ tdfx_outl(par, VIDPROCCFG, vidcfg | VIDCFG_HWCURSOR_ENABLE);
+ else
+ tdfx_outl(par, VIDPROCCFG, vidcfg & ~VIDCFG_HWCURSOR_ENABLE);
/*
* If the cursor is not be changed this means either we want the
if (!cursor->set)
return 0;
- /* Too large of a cursor :-( */
- if (cursor->image.width > 64 || cursor->image.height > 64)
- return -ENXIO;
-
- /*
- * If we are going to be changing things we should disable
- * the cursor first
- */
- if (info->cursor.enable) {
- spin_lock_irqsave(&par->DAClock, flags);
- info->cursor.enable = 0;
- del_timer(&(par->hwcursor.timer));
- tdfx_outl(par, VIDPROCCFG, par->hwcursor.disable);
- spin_unlock_irqrestore(&par->DAClock, flags);
- }
-
- /* Disable the Cursor */
- if ((cursor->set && FB_CUR_SETCUR) && !cursor->enable)
- return 0;
-
/* fix cursor color - XFree86 forgets to restore it properly */
- if (cursor->set && FB_CUR_SETCMAP) {
- struct fb_cmap cmap = cursor->image.cmap;
+ if (cursor->set & FB_CUR_SETCMAP) {
+ struct fb_cmap cmap = info->cmap;
+ u32 bg_idx = cursor->image.bg_color;
+ u32 fg_idx = cursor->image.fg_color;
unsigned long bg_color, fg_color;
- cmap.len = 2; /* Voodoo 3+ only support 2 color cursors */
- fg_color = ((cmap.red[cmap.start] << 16) |
- (cmap.green[cmap.start] << 8) |
- (cmap.blue[cmap.start]));
- bg_color = ((cmap.red[cmap.start + 1] << 16) |
- (cmap.green[cmap.start + 1] << 8) |
- (cmap.blue[cmap.start + 1]));
- fb_copy_cmap(&cmap, &info->cursor.image.cmap);
- spin_lock_irqsave(&par->DAClock, flags);
+ fg_color = (((u32)cmap.red[fg_idx] & 0xff00) << 8) |
+ (((u32)cmap.green[fg_idx] & 0xff00) << 0) |
+ (((u32)cmap.blue[fg_idx] & 0xff00) >> 8);
+ bg_color = (((u32)cmap.red[bg_idx] & 0xff00) << 8) |
+ (((u32)cmap.green[bg_idx] & 0xff00) << 0) |
+ (((u32)cmap.blue[bg_idx] & 0xff00) >> 8);
banshee_make_room(par, 2);
tdfx_outl(par, HWCURC0, bg_color);
tdfx_outl(par, HWCURC1, fg_color);
- spin_unlock_irqrestore(&par->DAClock, flags);
}
- if (cursor->set && FB_CUR_SETPOS) {
- int x, y;
+ if (cursor->set & FB_CUR_SETPOS) {
+ int x = cursor->image.dx;
+ int y = cursor->image.dy - info->var.yoffset;
- x = cursor->image.dx;
- y = cursor->image.dy;
- y -= info->var.yoffset;
- info->cursor.image.dx = x;
- info->cursor.image.dy = y;
x += 63;
y += 63;
- spin_lock_irqsave(&par->DAClock, flags);
banshee_make_room(par, 1);
tdfx_outl(par, HWCURLOC, (y << 16) + x);
- spin_unlock_irqrestore(&par->DAClock, flags);
- }
-
- /* Not supported so we fake it */
- if (cursor->set && FB_CUR_SETHOT) {
- info->cursor.hot.x = cursor->hot.x;
- info->cursor.hot.y = cursor->hot.y;
}
-
- if (cursor->set && FB_CUR_SETSHAPE) {
+ if (cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
/*
* Voodoo 3 and above cards use 2 monochrome cursor patterns.
* The reason is so the card can fetch 8 words at a time
* This reduces the number of times for access to draw the
* cursor for each screen refresh.
* Each pattern is a bitmap of 64 bit wide and 64 bit high
- * (total of 8192 bits or 1024 Kbytes). The two patterns are
+ * (total of 8192 bits or 1024 bytes). The two patterns are
* stored in such a way that pattern 0 always resides in the
* lower half (least significant 64 bits) of a 128 bit word
* and pattern 1 the upper half. If you examine the data of
* (128 bits) which is the maximum cursor width times two for
* the two monochrome patterns.
*/
- u8 *cursorbase = (u8 *)info->cursor.image.data;
- char *bitmap = (char *)cursor->image.data;
- char *mask = (char *)cursor->mask;
- int i, j, k, h = 0;
-
- for (i = 0; i < 64; i++) {
- if (i < cursor->image.height) {
- j = (cursor->image.width + 7) >> 3;
- k = 8 - j;
-
- for (; j > 0; j--) {
- /* Pattern 0. Copy the cursor bitmap to it */
- fb_writeb(*bitmap, cursorbase + h);
- bitmap++;
- /* Pattern 1. Copy the cursor mask to it */
- fb_writeb(*mask, cursorbase + h + 8);
- mask++;
- h++;
- }
- for (; k > 0; k--) {
- fb_writeb(0, cursorbase + h);
- fb_writeb(~0, cursorbase + h + 8);
- h++;
- }
- } else {
- fb_writel(0, cursorbase + h);
- fb_writel(0, cursorbase + h + 4);
- fb_writel(~0, cursorbase + h + 8);
- fb_writel(~0, cursorbase + h + 12);
- h += 16;
+ u8 __iomem *cursorbase = info->screen_base + info->fix.smem_len;
+ u8 *bitmap = (u8 *)cursor->image.data;
+ u8 *mask = (u8 *)cursor->mask;
+ int i;
+
+ fb_memset(cursorbase, 0, 1024);
+
+ for (i = 0; i < cursor->image.height; i++) {
+ int h = 0;
+ int j = (cursor->image.width + 7) >> 3;
+
+ for (; j > 0; j--) {
+ u8 data = *mask ^ *bitmap;
+ if (cursor->rop == ROP_COPY)
+ data = *mask & *bitmap;
+ /* Pattern 0. Copy the cursor mask to it */
+ fb_writeb(*mask, cursorbase + h);
+ mask++;
+ /* Pattern 1. Copy the cursor bitmap to it */
+ fb_writeb(data, cursorbase + h + 8);
+ bitmap++;
+ h++;
}
+ cursorbase += 16;
}
}
- /* Turn the cursor on */
- cursor->enable = 1;
- info->cursor = *cursor;
- mod_timer(&par->hwcursor.timer, jiffies + HZ / 2);
- spin_lock_irqsave(&par->DAClock, flags);
- banshee_make_room(par, 1);
- tdfx_outl(par, VIDPROCCFG, par->hwcursor.enable);
- spin_unlock_irqrestore(&par->DAClock, flags);
return 0;
}
-#endif
static struct fb_ops tdfxfb_ops = {
.owner = THIS_MODULE,
.fb_blank = tdfxfb_blank,
.fb_pan_display = tdfxfb_pan_display,
.fb_sync = banshee_wait_idle,
+ .fb_cursor = tdfxfb_cursor,
#ifdef CONFIG_FB_3DFX_ACCEL
.fb_fillrect = tdfxfb_fillrect,
.fb_copyarea = tdfxfb_copyarea,
struct fb_info *info;
int err, lpitch;
- if ((err = pci_enable_device(pdev))) {
- printk(KERN_WARNING "tdfxfb: Can't enable pdev: %d\n", err);
+ err = pci_enable_device(pdev);
+ if (err) {
+ printk(KERN_ERR "tdfxfb: Can't enable pdev: %d\n", err);
return err;
}
return -ENOMEM;
default_par = info->par;
+ info->fix = tdfx_fix;
/* Configure the default fb_fix_screeninfo first */
switch (pdev->device) {
case PCI_DEVICE_ID_3DFX_BANSHEE:
- strcat(tdfx_fix.id, " Banshee");
+ strcpy(info->fix.id, "3Dfx Banshee");
default_par->max_pixclock = BANSHEE_MAX_PIXCLOCK;
break;
case PCI_DEVICE_ID_3DFX_VOODOO3:
- strcat(tdfx_fix.id, " Voodoo3");
+ strcpy(info->fix.id, "3Dfx Voodoo3");
default_par->max_pixclock = VOODOO3_MAX_PIXCLOCK;
break;
case PCI_DEVICE_ID_3DFX_VOODOO5:
- strcat(tdfx_fix.id, " Voodoo5");
+ strcpy(info->fix.id, "3Dfx Voodoo5");
default_par->max_pixclock = VOODOO5_MAX_PIXCLOCK;
break;
}
- tdfx_fix.mmio_start = pci_resource_start(pdev, 0);
- tdfx_fix.mmio_len = pci_resource_len(pdev, 0);
- if (!request_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len,
+ info->fix.mmio_start = pci_resource_start(pdev, 0);
+ info->fix.mmio_len = pci_resource_len(pdev, 0);
+ if (!request_mem_region(info->fix.mmio_start, info->fix.mmio_len,
"tdfx regbase")) {
- printk(KERN_WARNING "tdfxfb: Can't reserve regbase\n");
+ printk(KERN_ERR "tdfxfb: Can't reserve regbase\n");
goto out_err;
}
default_par->regbase_virt =
- ioremap_nocache(tdfx_fix.mmio_start, tdfx_fix.mmio_len);
+ ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len);
if (!default_par->regbase_virt) {
- printk("fb: Can't remap %s register area.\n", tdfx_fix.id);
+ printk(KERN_ERR "fb: Can't remap %s register area.\n",
+ info->fix.id);
goto out_err_regbase;
}
- tdfx_fix.smem_start = pci_resource_start(pdev, 1);
- if (!(tdfx_fix.smem_len = do_lfb_size(default_par, pdev->device))) {
- printk("fb: Can't count %s memory.\n", tdfx_fix.id);
+ info->fix.smem_start = pci_resource_start(pdev, 1);
+ info->fix.smem_len = do_lfb_size(default_par, pdev->device);
+ if (!info->fix.smem_len) {
+ printk(KERN_ERR "fb: Can't count %s memory.\n", info->fix.id);
goto out_err_regbase;
}
- if (!request_mem_region(tdfx_fix.smem_start,
+ if (!request_mem_region(info->fix.smem_start,
pci_resource_len(pdev, 1), "tdfx smem")) {
- printk(KERN_WARNING "tdfxfb: Can't reserve smem\n");
+ printk(KERN_ERR "tdfxfb: Can't reserve smem\n");
goto out_err_regbase;
}
- info->screen_base = ioremap_nocache(tdfx_fix.smem_start,
- tdfx_fix.smem_len);
+ info->screen_base = ioremap_nocache(info->fix.smem_start,
+ info->fix.smem_len);
if (!info->screen_base) {
- printk("fb: Can't remap %s framebuffer.\n", tdfx_fix.id);
+ printk(KERN_ERR "fb: Can't remap %s framebuffer.\n",
+ info->fix.id);
goto out_err_screenbase;
}
if (!request_region(pci_resource_start(pdev, 2),
pci_resource_len(pdev, 2), "tdfx iobase")) {
- printk(KERN_WARNING "tdfxfb: Can't reserve iobase\n");
+ printk(KERN_ERR "tdfxfb: Can't reserve iobase\n");
goto out_err_screenbase;
}
- printk("fb: %s memory = %dK\n", tdfx_fix.id, tdfx_fix.smem_len >> 10);
+ printk(KERN_INFO "fb: %s memory = %dK\n", info->fix.id,
+ info->fix.smem_len >> 10);
+
+ default_par->mtrr_handle = -1;
+ if (!nomtrr)
+ default_par->mtrr_handle =
+ mtrr_add(info->fix.smem_start, info->fix.smem_len,
+ MTRR_TYPE_WRCOMB, 1);
- tdfx_fix.ypanstep = nopan ? 0 : 1;
- tdfx_fix.ywrapstep = nowrap ? 0 : 1;
+ info->fix.ypanstep = nopan ? 0 : 1;
+ info->fix.ywrapstep = nowrap ? 0 : 1;
info->fbops = &tdfxfb_ops;
- info->fix = tdfx_fix;
info->pseudo_palette = default_par->palette;
info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
#ifdef CONFIG_FB_3DFX_ACCEL
- info->flags |= FBINFO_HWACCEL_FILLRECT |
+ info->flags |= FBINFO_HWACCEL_FILLRECT |
FBINFO_HWACCEL_COPYAREA |
FBINFO_HWACCEL_IMAGEBLIT |
FBINFO_READS_FAST;
#endif
+ /* reserve 8192 bits for cursor */
+ /* the 2.4 driver says PAGE_MASK boundary is not enough for Voodoo4 */
+ if (hwcursor)
+ info->fix.smem_len = (info->fix.smem_len - 1024) &
+ (PAGE_MASK << 1);
if (!mode_option)
mode_option = "640x480@60";
goto out_err_iobase;
if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
- printk(KERN_WARNING "tdfxfb: Can't allocate color map\n");
+ printk(KERN_ERR "tdfxfb: Can't allocate color map\n");
goto out_err_iobase;
}
if (register_framebuffer(info) < 0) {
- printk("tdfxfb: can't register framebuffer\n");
+ printk(KERN_ERR "tdfxfb: can't register framebuffer\n");
fb_dealloc_cmap(&info->cmap);
goto out_err_iobase;
}
return 0;
out_err_iobase:
+ if (default_par->mtrr_handle >= 0)
+ mtrr_del(default_par->mtrr_handle, info->fix.smem_start,
+ info->fix.smem_len);
release_mem_region(pci_resource_start(pdev, 2),
pci_resource_len(pdev, 2));
out_err_screenbase:
if (info->screen_base)
iounmap(info->screen_base);
- release_mem_region(tdfx_fix.smem_start, pci_resource_len(pdev, 1));
+ release_mem_region(info->fix.smem_start, pci_resource_len(pdev, 1));
out_err_regbase:
/*
* Cleanup after anything that was remapped/allocated.
*/
if (default_par->regbase_virt)
iounmap(default_par->regbase_virt);
- release_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len);
+ release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
out_err:
framebuffer_release(info);
return -ENXIO;
}
#ifndef MODULE
-static void tdfxfb_setup(char *options)
+static void __init tdfxfb_setup(char *options)
{
char *this_opt;
nopan = 1;
} else if (!strcmp(this_opt, "nowrap")) {
nowrap = 1;
+ } else if (!strncmp(this_opt, "hwcursor=", 9)) {
+ hwcursor = simple_strtoul(this_opt + 9, NULL, 0);
+#ifdef CONFIG_MTRR
+ } else if (!strncmp(this_opt, "nomtrr", 6)) {
+ nomtrr = 1;
+#endif
} else {
mode_option = this_opt;
}
struct tdfx_par *par = info->par;
unregister_framebuffer(info);
+ if (par->mtrr_handle >= 0)
+ mtrr_del(par->mtrr_handle, info->fix.smem_start,
+ info->fix.smem_len);
iounmap(par->regbase_virt);
iounmap(info->screen_base);
MODULE_DESCRIPTION("3Dfx framebuffer device driver");
MODULE_LICENSE("GPL");
+module_param(hwcursor, int, 0644);
+MODULE_PARM_DESC(hwcursor, "Enable hardware cursor "
+ "(1=enable, 0=disable, default=1)");
+module_param(mode_option, charp, 0);
+MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'");
+#ifdef CONFIG_MTRR
+module_param(nomtrr, bool, 0);
+MODULE_PARM_DESC(nomtrr, "Disable MTRR support (default: enabled)");
+#endif
+
module_init(tdfxfb_init);
module_exit(tdfxfb_exit);
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff