/*
* Copyright (c) 2000-2004 by David Brownell
- *
+ *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
-
-#ifdef CONFIG_USB_DEBUG
- #define DEBUG
-#else
- #undef DEBUG
-#endif
-
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/dmapool.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/unaligned.h>
+#ifdef CONFIG_PPC_PS3
+#include <asm/firmware.h>
+#endif
/*-------------------------------------------------------------------------*/
* 2002-08-06 Handling for bulk and interrupt transfers is mostly shared;
* only scheduling is different, no arbitrary limitations.
* 2002-07-25 Sanity check PCI reads, mostly for better cardbus support,
- * clean up HC run state handshaking.
+ * clean up HC run state handshaking.
* 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts
* 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other
* missing pieces: enabling 64bit dma, handoff from BIOS/SMM.
module_param (park, uint, S_IRUGO);
MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
+/* for flakey hardware, ignore overcurrent indicators */
+static int ignore_oc = 0;
+module_param (ignore_oc, bool, S_IRUGO);
+MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
+
#define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
/*-------------------------------------------------------------------------*/
* before driver shutdown. But it also seems to be caused by bugs in cardbus
* bridge shutdown: shutting down the bridge before the devices using it.
*/
-static int handshake (void __iomem *ptr, u32 mask, u32 done, int usec)
+static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
+ u32 mask, u32 done, int usec)
{
u32 result;
do {
- result = readl (ptr);
+ result = ehci_readl(ehci, ptr);
if (result == ~(u32)0) /* card removed */
return -ENODEV;
result &= mask;
/* force HC to halt state from unknown (EHCI spec section 2.3) */
static int ehci_halt (struct ehci_hcd *ehci)
{
- u32 temp = readl (&ehci->regs->status);
+ u32 temp = ehci_readl(ehci, &ehci->regs->status);
/* disable any irqs left enabled by previous code */
- writel (0, &ehci->regs->intr_enable);
+ ehci_writel(ehci, 0, &ehci->regs->intr_enable);
if ((temp & STS_HALT) != 0)
return 0;
- temp = readl (&ehci->regs->command);
+ temp = ehci_readl(ehci, &ehci->regs->command);
temp &= ~CMD_RUN;
- writel (temp, &ehci->regs->command);
- return handshake (&ehci->regs->status, STS_HALT, STS_HALT, 16 * 125);
+ ehci_writel(ehci, temp, &ehci->regs->command);
+ return handshake (ehci, &ehci->regs->status,
+ STS_HALT, STS_HALT, 16 * 125);
}
/* put TDI/ARC silicon into EHCI mode */
u32 tmp;
reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + 0x68);
- tmp = readl (reg_ptr);
+ tmp = ehci_readl(ehci, reg_ptr);
tmp |= 0x3;
- writel (tmp, reg_ptr);
+ ehci_writel(ehci, tmp, reg_ptr);
}
/* reset a non-running (STS_HALT == 1) controller */
static int ehci_reset (struct ehci_hcd *ehci)
{
int retval;
- u32 command = readl (&ehci->regs->command);
+ u32 command = ehci_readl(ehci, &ehci->regs->command);
command |= CMD_RESET;
dbg_cmd (ehci, "reset", command);
- writel (command, &ehci->regs->command);
+ ehci_writel(ehci, command, &ehci->regs->command);
ehci_to_hcd(ehci)->state = HC_STATE_HALT;
ehci->next_statechange = jiffies;
- retval = handshake (&ehci->regs->command, CMD_RESET, 0, 250 * 1000);
+ retval = handshake (ehci, &ehci->regs->command,
+ CMD_RESET, 0, 250 * 1000);
if (retval)
return retval;
#endif
/* wait for any schedule enables/disables to take effect */
- temp = readl (&ehci->regs->command) << 10;
+ temp = ehci_readl(ehci, &ehci->regs->command) << 10;
temp &= STS_ASS | STS_PSS;
- if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
+ if (handshake (ehci, &ehci->regs->status, STS_ASS | STS_PSS,
temp, 16 * 125) != 0) {
ehci_to_hcd(ehci)->state = HC_STATE_HALT;
return;
}
/* then disable anything that's still active */
- temp = readl (&ehci->regs->command);
+ temp = ehci_readl(ehci, &ehci->regs->command);
temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
- writel (temp, &ehci->regs->command);
+ ehci_writel(ehci, temp, &ehci->regs->command);
/* hardware can take 16 microframes to turn off ... */
- if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
+ if (handshake (ehci, &ehci->regs->status, STS_ASS | STS_PSS,
0, 16 * 125) != 0) {
ehci_to_hcd(ehci)->state = HC_STATE_HALT;
return;
/*-------------------------------------------------------------------------*/
-static void ehci_work(struct ehci_hcd *ehci, struct pt_regs *regs);
+static void ehci_work(struct ehci_hcd *ehci);
#include "ehci-hub.c"
#include "ehci-mem.c"
/* lost IAA irqs wedge things badly; seen with a vt8235 */
if (ehci->reclaim) {
- u32 status = readl (&ehci->regs->status);
-
+ u32 status = ehci_readl(ehci, &ehci->regs->status);
if (status & STS_IAA) {
ehci_vdbg (ehci, "lost IAA\n");
COUNT (ehci->stats.lost_iaa);
- writel (STS_IAA, &ehci->regs->status);
+ ehci_writel(ehci, STS_IAA, &ehci->regs->status);
ehci->reclaim_ready = 1;
}
}
/* stop async processing after it's idled a bit */
if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
- start_unlink_async (ehci, ehci->async);
+ start_unlink_async (ehci, ehci->async);
/* ehci could run by timer, without IRQs ... */
- ehci_work (ehci, NULL);
+ ehci_work (ehci);
spin_unlock_irqrestore (&ehci->lock, flags);
}
-#ifdef CONFIG_PCI
-
-/* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/...
- * off the controller (maybe it can boot from highspeed USB disks).
+/* On some systems, leaving remote wakeup enabled prevents system shutdown.
+ * The firmware seems to think that powering off is a wakeup event!
+ * This routine turns off remote wakeup and everything else, on all ports.
*/
-static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
+static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
{
- struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
-
- /* always say Linux will own the hardware */
- pci_write_config_byte(pdev, where + 3, 1);
-
- /* maybe wait a while for BIOS to respond */
- if (cap & (1 << 16)) {
- int msec = 5000;
-
- do {
- msleep(10);
- msec -= 10;
- pci_read_config_dword(pdev, where, &cap);
- } while ((cap & (1 << 16)) && msec);
- if (cap & (1 << 16)) {
- ehci_err(ehci, "BIOS handoff failed (%d, %08x)\n",
- where, cap);
- // some BIOS versions seem buggy...
- // return 1;
- ehci_warn (ehci, "continuing after BIOS bug...\n");
- /* disable all SMIs, and clear "BIOS owns" flag */
- pci_write_config_dword(pdev, where + 4, 0);
- pci_write_config_byte(pdev, where + 2, 0);
- } else
- ehci_dbg(ehci, "BIOS handoff succeeded\n");
- }
- return 0;
-}
+ int port = HCS_N_PORTS(ehci->hcs_params);
-#endif
+ while (port--)
+ ehci_writel(ehci, PORT_RWC_BITS,
+ &ehci->regs->port_status[port]);
+}
-/* Reboot notifiers kick in for silicon on any bus (not just pci, etc).
+/* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
* This forcibly disables dma and IRQs, helping kexec and other cases
* where the next system software may expect clean state.
*/
-static int
-ehci_reboot (struct notifier_block *self, unsigned long code, void *null)
+static void
+ehci_shutdown (struct usb_hcd *hcd)
{
- struct ehci_hcd *ehci;
+ struct ehci_hcd *ehci;
- ehci = container_of (self, struct ehci_hcd, reboot_notifier);
+ ehci = hcd_to_ehci (hcd);
(void) ehci_halt (ehci);
+ ehci_turn_off_all_ports(ehci);
/* make BIOS/etc use companion controller during reboot */
- writel (0, &ehci->regs->configured_flag);
- return 0;
+ ehci_writel(ehci, 0, &ehci->regs->configured_flag);
+
+ /* unblock posted writes */
+ ehci_readl(ehci, &ehci->regs->configured_flag);
}
static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
msleep(20);
}
+/*-------------------------------------------------------------------------*/
+
+/*
+ * ehci_work is called from some interrupts, timers, and so on.
+ * it calls driver completion functions, after dropping ehci->lock.
+ */
+static void ehci_work (struct ehci_hcd *ehci)
+{
+ timer_action_done (ehci, TIMER_IO_WATCHDOG);
+ if (ehci->reclaim_ready)
+ end_unlink_async (ehci);
+
+ /* another CPU may drop ehci->lock during a schedule scan while
+ * it reports urb completions. this flag guards against bogus
+ * attempts at re-entrant schedule scanning.
+ */
+ if (ehci->scanning)
+ return;
+ ehci->scanning = 1;
+ scan_async (ehci);
+ if (ehci->next_uframe != -1)
+ scan_periodic (ehci);
+ ehci->scanning = 0;
-/* called by khubd or root hub init threads */
+ /* the IO watchdog guards against hardware or driver bugs that
+ * misplace IRQs, and should let us run completely without IRQs.
+ * such lossage has been observed on both VT6202 and VT8235.
+ */
+ if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
+ (ehci->async->qh_next.ptr != NULL ||
+ ehci->periodic_sched != 0))
+ timer_action (ehci, TIMER_IO_WATCHDOG);
+}
-static int ehci_hc_reset (struct usb_hcd *hcd)
+static void ehci_stop (struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci (hcd);
- u32 temp;
- unsigned count = 256/4;
- spin_lock_init (&ehci->lock);
+ ehci_dbg (ehci, "stop\n");
- ehci->caps = hcd->regs;
- ehci->regs = hcd->regs + HC_LENGTH (readl (&ehci->caps->hc_capbase));
- dbg_hcs_params (ehci, "reset");
- dbg_hcc_params (ehci, "reset");
+ /* Turn off port power on all root hub ports. */
+ ehci_port_power (ehci, 0);
- /* cache this readonly data; minimize chip reads */
- ehci->hcs_params = readl (&ehci->caps->hcs_params);
+ /* no more interrupts ... */
+ del_timer_sync (&ehci->watchdog);
-#ifdef CONFIG_PCI
- if (hcd->self.controller->bus == &pci_bus_type) {
- struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
+ spin_lock_irq(&ehci->lock);
+ if (HC_IS_RUNNING (hcd->state))
+ ehci_quiesce (ehci);
- switch (pdev->vendor) {
- case PCI_VENDOR_ID_TDI:
- if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) {
- ehci->is_tdi_rh_tt = 1;
- tdi_reset (ehci);
- }
- break;
- case PCI_VENDOR_ID_AMD:
- /* AMD8111 EHCI doesn't work, according to AMD errata */
- if (pdev->device == 0x7463) {
- ehci_info (ehci, "ignoring AMD8111 (errata)\n");
- return -EIO;
- }
- break;
- case PCI_VENDOR_ID_NVIDIA:
- /* NVidia reports that certain chips don't handle
- * QH, ITD, or SITD addresses above 2GB. (But TD,
- * data buffer, and periodic schedule are normal.)
- */
- switch (pdev->device) {
- case 0x003c: /* MCP04 */
- case 0x005b: /* CK804 */
- case 0x00d8: /* CK8 */
- case 0x00e8: /* CK8S */
- if (pci_set_consistent_dma_mask(pdev,
- DMA_31BIT_MASK) < 0)
- ehci_warn (ehci, "can't enable NVidia "
- "workaround for >2GB RAM\n");
- break;
- }
- break;
- }
+ ehci_reset (ehci);
+ ehci_writel(ehci, 0, &ehci->regs->intr_enable);
+ spin_unlock_irq(&ehci->lock);
- /* optional debug port, normally in the first BAR */
- temp = pci_find_capability (pdev, 0x0a);
- if (temp) {
- pci_read_config_dword(pdev, temp, &temp);
- temp >>= 16;
- if ((temp & (3 << 13)) == (1 << 13)) {
- temp &= 0x1fff;
- ehci->debug = hcd->regs + temp;
- temp = readl (&ehci->debug->control);
- ehci_info (ehci, "debug port %d%s\n",
- HCS_DEBUG_PORT(ehci->hcs_params),
- (temp & DBGP_ENABLED)
- ? " IN USE"
- : "");
- if (!(temp & DBGP_ENABLED))
- ehci->debug = NULL;
- }
- }
+ /* let companion controllers work when we aren't */
+ ehci_writel(ehci, 0, &ehci->regs->configured_flag);
- temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params));
- } else
- temp = 0;
-
- /* EHCI 0.96 and later may have "extended capabilities" */
- while (temp && count--) {
- u32 cap;
-
- pci_read_config_dword (to_pci_dev(hcd->self.controller),
- temp, &cap);
- ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp);
- switch (cap & 0xff) {
- case 1: /* BIOS/SMM/... handoff */
- if (bios_handoff (ehci, temp, cap) != 0)
- return -EOPNOTSUPP;
- break;
- case 0: /* illegal reserved capability */
- ehci_warn (ehci, "illegal capability!\n");
- cap = 0;
- /* FALLTHROUGH */
- default: /* unknown */
- break;
- }
- temp = (cap >> 8) & 0xff;
- }
- if (!count) {
- ehci_err (ehci, "bogus capabilities ... PCI problems!\n");
- return -EIO;
- }
- if (ehci_is_TDI(ehci))
- ehci_reset (ehci);
-#endif
+ remove_companion_file(ehci);
+ remove_debug_files (ehci);
- ehci_port_power (ehci, 0);
+ /* root hub is shut down separately (first, when possible) */
+ spin_lock_irq (&ehci->lock);
+ if (ehci->async)
+ ehci_work (ehci);
+ spin_unlock_irq (&ehci->lock);
+ ehci_mem_cleanup (ehci);
- /* at least the Genesys GL880S needs fixup here */
- temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params);
- temp &= 0x0f;
- if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) {
- ehci_dbg (ehci, "bogus port configuration: "
- "cc=%d x pcc=%d < ports=%d\n",
- HCS_N_CC(ehci->hcs_params),
- HCS_N_PCC(ehci->hcs_params),
- HCS_N_PORTS(ehci->hcs_params));
-
-#ifdef CONFIG_PCI
- if (hcd->self.controller->bus == &pci_bus_type) {
- struct pci_dev *pdev;
-
- pdev = to_pci_dev(hcd->self.controller);
- switch (pdev->vendor) {
- case 0x17a0: /* GENESYS */
- /* GL880S: should be PORTS=2 */
- temp |= (ehci->hcs_params & ~0xf);
- ehci->hcs_params = temp;
- break;
- case PCI_VENDOR_ID_NVIDIA:
- /* NF4: should be PCC=10 */
- break;
- }
- }
+#ifdef EHCI_STATS
+ ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
+ ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
+ ehci->stats.lost_iaa);
+ ehci_dbg (ehci, "complete %ld unlink %ld\n",
+ ehci->stats.complete, ehci->stats.unlink);
#endif
- }
- /* force HC to halt state */
- return ehci_halt (ehci);
+ dbg_status (ehci, "ehci_stop completed",
+ ehci_readl(ehci, &ehci->regs->status));
}
-static int ehci_start (struct usb_hcd *hcd)
+/* one-time init, only for memory state */
+static int ehci_init(struct usb_hcd *hcd)
{
- struct ehci_hcd *ehci = hcd_to_ehci (hcd);
+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
u32 temp;
int retval;
u32 hcc_params;
- u8 sbrn = 0;
- int first;
-
- /* skip some things on restart paths */
- first = (ehci->watchdog.data == 0);
- if (first) {
- init_timer (&ehci->watchdog);
- ehci->watchdog.function = ehci_watchdog;
- ehci->watchdog.data = (unsigned long) ehci;
- }
+
+ spin_lock_init(&ehci->lock);
+
+ init_timer(&ehci->watchdog);
+ ehci->watchdog.function = ehci_watchdog;
+ ehci->watchdog.data = (unsigned long) ehci;
/*
* hw default: 1K periodic list heads, one per frame.
* periodic_size can shrink by USBCMD update if hcc_params allows.
*/
ehci->periodic_size = DEFAULT_I_TDPS;
- if (first && (retval = ehci_mem_init (ehci, GFP_KERNEL)) < 0)
+ if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
return retval;
/* controllers may cache some of the periodic schedule ... */
- hcc_params = readl (&ehci->caps->hcc_params);
- if (HCC_ISOC_CACHE (hcc_params)) // full frame cache
+ hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
+ if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
ehci->i_thresh = 8;
else // N microframes cached
- ehci->i_thresh = 2 + HCC_ISOC_THRES (hcc_params);
+ ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
ehci->reclaim = NULL;
ehci->reclaim_ready = 0;
ehci->next_uframe = -1;
- /* controller state: unknown --> reset */
-
- /* EHCI spec section 4.1 */
- if ((retval = ehci_reset (ehci)) != 0) {
- ehci_mem_cleanup (ehci);
- return retval;
- }
- writel (ehci->periodic_dma, &ehci->regs->frame_list);
-
-#ifdef CONFIG_PCI
- if (hcd->self.controller->bus == &pci_bus_type) {
- struct pci_dev *pdev;
- u16 port_wake;
-
- pdev = to_pci_dev(hcd->self.controller);
-
- /* Serial Bus Release Number is at PCI 0x60 offset */
- pci_read_config_byte(pdev, 0x60, &sbrn);
-
- /* port wake capability, reported by boot firmware */
- pci_read_config_word(pdev, 0x62, &port_wake);
- hcd->can_wakeup = (port_wake & 1) != 0;
-
- /* help hc dma work well with cachelines */
- retval = pci_set_mwi(pdev);
- if (retval)
- ehci_dbg(ehci, "unable to enable MWI - not fatal.\n");
- }
-#endif
-
/*
* dedicate a qh for the async ring head, since we couldn't unlink
* a 'real' qh without stopping the async schedule [4.8]. use it
* its dummy is used in hw_alt_next of many tds, to prevent the qh
* from automatically advancing to the next td after short reads.
*/
- if (first) {
- ehci->async->qh_next.qh = NULL;
- ehci->async->hw_next = QH_NEXT (ehci->async->qh_dma);
- ehci->async->hw_info1 = cpu_to_le32 (QH_HEAD);
- ehci->async->hw_token = cpu_to_le32 (QTD_STS_HALT);
- ehci->async->hw_qtd_next = EHCI_LIST_END;
- ehci->async->qh_state = QH_STATE_LINKED;
- ehci->async->hw_alt_next = QTD_NEXT (ehci->async->dummy->qtd_dma);
- }
- writel ((u32)ehci->async->qh_dma, &ehci->regs->async_next);
-
- /*
- * hcc_params controls whether ehci->regs->segment must (!!!)
- * be used; it constrains QH/ITD/SITD and QTD locations.
- * pci_pool consistent memory always uses segment zero.
- * streaming mappings for I/O buffers, like pci_map_single(),
- * can return segments above 4GB, if the device allows.
- *
- * NOTE: the dma mask is visible through dma_supported(), so
- * drivers can pass this info along ... like NETIF_F_HIGHDMA,
- * Scsi_Host.highmem_io, and so forth. It's readonly to all
- * host side drivers though.
- */
- if (HCC_64BIT_ADDR (hcc_params)) {
- writel (0, &ehci->regs->segment);
-#if 0
-// this is deeply broken on almost all architectures
- if (!dma_set_mask (hcd->self.controller, DMA_64BIT_MASK))
- ehci_info (ehci, "enabled 64bit DMA\n");
-#endif
- }
+ ehci->async->qh_next.qh = NULL;
+ ehci->async->hw_next = QH_NEXT(ehci->async->qh_dma);
+ ehci->async->hw_info1 = cpu_to_le32(QH_HEAD);
+ ehci->async->hw_token = cpu_to_le32(QTD_STS_HALT);
+ ehci->async->hw_qtd_next = EHCI_LIST_END;
+ ehci->async->qh_state = QH_STATE_LINKED;
+ ehci->async->hw_alt_next = QTD_NEXT(ehci->async->dummy->qtd_dma);
/* clear interrupt enables, set irq latency */
if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
* make problems: throughput reduction (!), data errors...
*/
if (park) {
- park = min (park, (unsigned) 3);
+ park = min(park, (unsigned) 3);
temp |= CMD_PARK;
temp |= park << 8;
}
- ehci_info (ehci, "park %d\n", park);
+ ehci_dbg(ehci, "park %d\n", park);
}
- if (HCC_PGM_FRAMELISTLEN (hcc_params)) {
+ if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
/* periodic schedule size can be smaller than default */
temp &= ~(3 << 2);
temp |= (EHCI_TUNE_FLS << 2);
case 0: ehci->periodic_size = 1024; break;
case 1: ehci->periodic_size = 512; break;
case 2: ehci->periodic_size = 256; break;
- default: BUG ();
+ default: BUG();
}
}
- // Philips, Intel, and maybe others need CMD_RUN before the
- // root hub will detect new devices (why?); NEC doesn't
- temp |= CMD_RUN;
- writel (temp, &ehci->regs->command);
- dbg_cmd (ehci, "init", temp);
-
- /* set async sleep time = 10 us ... ? */
-
- /*
- * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
- * are explicitly handed to companion controller(s), so no TT is
- * involved with the root hub. (Except where one is integrated,
- * and there's no companion controller unless maybe for USB OTG.)
- */
- if (first) {
- ehci->reboot_notifier.notifier_call = ehci_reboot;
- register_reboot_notifier (&ehci->reboot_notifier);
- }
-
- hcd->state = HC_STATE_RUNNING;
- writel (FLAG_CF, &ehci->regs->configured_flag);
- readl (&ehci->regs->command); /* unblock posted write */
-
- temp = HC_VERSION(readl (&ehci->caps->hc_capbase));
- ehci_info (ehci,
- "USB %x.%x %s, EHCI %x.%02x, driver %s\n",
- ((sbrn & 0xf0)>>4), (sbrn & 0x0f),
- first ? "initialized" : "restarted",
- temp >> 8, temp & 0xff, DRIVER_VERSION);
-
- writel (INTR_MASK, &ehci->regs->intr_enable); /* Turn On Interrupts */
-
- if (first)
- create_debug_files (ehci);
-
- return 0;
-}
-
-/* always called by thread; normally rmmod */
-
-static void ehci_stop (struct usb_hcd *hcd)
-{
- struct ehci_hcd *ehci = hcd_to_ehci (hcd);
-
- ehci_dbg (ehci, "stop\n");
-
- /* Turn off port power on all root hub ports. */
- ehci_port_power (ehci, 0);
-
- /* no more interrupts ... */
- del_timer_sync (&ehci->watchdog);
-
- spin_lock_irq(&ehci->lock);
- if (HC_IS_RUNNING (hcd->state))
- ehci_quiesce (ehci);
-
- ehci_reset (ehci);
- writel (0, &ehci->regs->intr_enable);
- spin_unlock_irq(&ehci->lock);
-
- /* let companion controllers work when we aren't */
- writel (0, &ehci->regs->configured_flag);
- unregister_reboot_notifier (&ehci->reboot_notifier);
-
- remove_debug_files (ehci);
-
- /* root hub is shut down separately (first, when possible) */
- spin_lock_irq (&ehci->lock);
- if (ehci->async)
- ehci_work (ehci, NULL);
- spin_unlock_irq (&ehci->lock);
- ehci_mem_cleanup (ehci);
-
-#ifdef EHCI_STATS
- ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
- ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
- ehci->stats.lost_iaa);
- ehci_dbg (ehci, "complete %ld unlink %ld\n",
- ehci->stats.complete, ehci->stats.unlink);
-#endif
-
- dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
-}
-
-static int ehci_get_frame (struct usb_hcd *hcd)
-{
- struct ehci_hcd *ehci = hcd_to_ehci (hcd);
- return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size;
-}
-
-/*-------------------------------------------------------------------------*/
-
-#ifdef CONFIG_PM
-
-/* suspend/resume, section 4.3 */
-
-/* These routines rely on the bus (pci, platform, etc)
- * to handle powerdown and wakeup, and currently also on
- * transceivers that don't need any software attention to set up
- * the right sort of wakeup.
- */
-
-static int ehci_suspend (struct usb_hcd *hcd, pm_message_t message)
-{
- struct ehci_hcd *ehci = hcd_to_ehci (hcd);
-
- if (time_before (jiffies, ehci->next_statechange))
- msleep (100);
-
-#ifdef CONFIG_USB_SUSPEND
- (void) usb_suspend_device (hcd->self.root_hub, message);
-#else
- usb_lock_device (hcd->self.root_hub);
- (void) ehci_hub_suspend (hcd);
- usb_unlock_device (hcd->self.root_hub);
-#endif
-
- // save (PCI) FLADJ in case of Vaux power loss
- // ... we'd only use it to handle clock skew
+ ehci->command = temp;
return 0;
}
-static int ehci_resume (struct usb_hcd *hcd)
+/* start HC running; it's halted, ehci_init() has been run (once) */
+static int ehci_run (struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci (hcd);
- unsigned port;
- struct usb_device *root = hcd->self.root_hub;
- int retval = -EINVAL;
-
- // maybe restore (PCI) FLADJ
+ int retval;
+ u32 temp;
+ u32 hcc_params;
- if (time_before (jiffies, ehci->next_statechange))
- msleep (100);
+ hcd->uses_new_polling = 1;
+ hcd->poll_rh = 0;
- /* If any port is suspended (or owned by the companion),
- * we know we can/must resume the HC (and mustn't reset it).
- */
- for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) {
- u32 status;
- port--;
- status = readl (&ehci->regs->port_status [port]);
- if (!(status & PORT_POWER))
- continue;
- if (status & (PORT_SUSPEND | PORT_OWNER)) {
- down (&hcd->self.root_hub->serialize);
- retval = ehci_hub_resume (hcd);
- up (&hcd->self.root_hub->serialize);
- break;
- }
- if (!root->children [port])
- continue;
- dbg_port (ehci, __FUNCTION__, port + 1, status);
- usb_set_device_state (root->children[port],
- USB_STATE_NOTATTACHED);
+ /* EHCI spec section 4.1 */
+ if ((retval = ehci_reset(ehci)) != 0) {
+ ehci_mem_cleanup(ehci);
+ return retval;
}
+ ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
+ ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
- /* Else reset, to cope with power loss or flush-to-storage
- * style "resume" having activated BIOS during reboot.
+ /*
+ * hcc_params controls whether ehci->regs->segment must (!!!)
+ * be used; it constrains QH/ITD/SITD and QTD locations.
+ * pci_pool consistent memory always uses segment zero.
+ * streaming mappings for I/O buffers, like pci_map_single(),
+ * can return segments above 4GB, if the device allows.
+ *
+ * NOTE: the dma mask is visible through dma_supported(), so
+ * drivers can pass this info along ... like NETIF_F_HIGHDMA,
+ * Scsi_Host.highmem_io, and so forth. It's readonly to all
+ * host side drivers though.
*/
- if (port == 0) {
- (void) ehci_halt (ehci);
- (void) ehci_reset (ehci);
- (void) ehci_hc_reset (hcd);
-
- /* emptying the schedule aborts any urbs */
- spin_lock_irq (&ehci->lock);
- if (ehci->reclaim)
- ehci->reclaim_ready = 1;
- ehci_work (ehci, NULL);
- spin_unlock_irq (&ehci->lock);
-
- /* restart; khubd will disconnect devices */
- retval = ehci_start (hcd);
-
- /* here we "know" root ports should always stay powered;
- * but some controllers may lose all power.
- */
- ehci_port_power (ehci, 1);
+ hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
+ if (HCC_64BIT_ADDR(hcc_params)) {
+ ehci_writel(ehci, 0, &ehci->regs->segment);
+#if 0
+// this is deeply broken on almost all architectures
+ if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK))
+ ehci_info(ehci, "enabled 64bit DMA\n");
+#endif
}
- return retval;
-}
-#endif
+ // Philips, Intel, and maybe others need CMD_RUN before the
+ // root hub will detect new devices (why?); NEC doesn't
+ ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
+ ehci->command |= CMD_RUN;
+ ehci_writel(ehci, ehci->command, &ehci->regs->command);
+ dbg_cmd (ehci, "init", ehci->command);
-/*-------------------------------------------------------------------------*/
+ /*
+ * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
+ * are explicitly handed to companion controller(s), so no TT is
+ * involved with the root hub. (Except where one is integrated,
+ * and there's no companion controller unless maybe for USB OTG.)
+ */
+ hcd->state = HC_STATE_RUNNING;
+ ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
+ ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
-/*
- * ehci_work is called from some interrupts, timers, and so on.
- * it calls driver completion functions, after dropping ehci->lock.
- */
-static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs)
-{
- timer_action_done (ehci, TIMER_IO_WATCHDOG);
- if (ehci->reclaim_ready)
- end_unlink_async (ehci, regs);
+ temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
+ ehci_info (ehci,
+ "USB %x.%x started, EHCI %x.%02x, driver %s%s\n",
+ ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
+ temp >> 8, temp & 0xff, DRIVER_VERSION,
+ ignore_oc ? ", overcurrent ignored" : "");
- /* another CPU may drop ehci->lock during a schedule scan while
- * it reports urb completions. this flag guards against bogus
- * attempts at re-entrant schedule scanning.
- */
- if (ehci->scanning)
- return;
- ehci->scanning = 1;
- scan_async (ehci, regs);
- if (ehci->next_uframe != -1)
- scan_periodic (ehci, regs);
- ehci->scanning = 0;
+ ehci_writel(ehci, INTR_MASK,
+ &ehci->regs->intr_enable); /* Turn On Interrupts */
- /* the IO watchdog guards against hardware or driver bugs that
- * misplace IRQs, and should let us run completely without IRQs.
- * such lossage has been observed on both VT6202 and VT8235.
+ /* GRR this is run-once init(), being done every time the HC starts.
+ * So long as they're part of class devices, we can't do it init()
+ * since the class device isn't created that early.
*/
- if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
- (ehci->async->qh_next.ptr != NULL ||
- ehci->periodic_sched != 0))
- timer_action (ehci, TIMER_IO_WATCHDOG);
+ create_debug_files(ehci);
+ create_companion_file(ehci);
+
+ return 0;
}
/*-------------------------------------------------------------------------*/
-static irqreturn_t ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs)
+static irqreturn_t ehci_irq (struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci (hcd);
- u32 status;
+ u32 status, pcd_status = 0;
int bh;
spin_lock (&ehci->lock);
- status = readl (&ehci->regs->status);
+ status = ehci_readl(ehci, &ehci->regs->status);
/* e.g. cardbus physical eject */
if (status == ~(u32) 0) {
}
/* clear (just) interrupts */
- writel (status, &ehci->regs->status);
- readl (&ehci->regs->command); /* unblock posted write */
+ ehci_writel(ehci, status, &ehci->regs->status);
+ ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */
bh = 0;
#ifdef EHCI_VERBOSE_DEBUG
}
/* remote wakeup [4.3.1] */
- if ((status & STS_PCD) && hcd->remote_wakeup) {
+ if (status & STS_PCD) {
unsigned i = HCS_N_PORTS (ehci->hcs_params);
+ pcd_status = status;
/* resume root hub? */
- status = readl (&ehci->regs->command);
- if (!(status & CMD_RUN))
- writel (status | CMD_RUN, &ehci->regs->command);
+ if (!(ehci_readl(ehci, &ehci->regs->command) & CMD_RUN))
+ usb_hcd_resume_root_hub(hcd);
while (i--) {
- status = readl (&ehci->regs->port_status [i]);
- if (status & PORT_OWNER)
+ int pstatus = ehci_readl(ehci,
+ &ehci->regs->port_status [i]);
+
+ if (pstatus & PORT_OWNER)
continue;
- if (!(status & PORT_RESUME)
+ if (!(pstatus & PORT_RESUME)
|| ehci->reset_done [i] != 0)
continue;
* stop that signaling.
*/
ehci->reset_done [i] = jiffies + msecs_to_jiffies (20);
- mod_timer (&hcd->rh_timer,
- ehci->reset_done [i] + 1);
ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
+ mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
}
}
/* PCI errors [4.15.2.4] */
if (unlikely ((status & STS_FATAL) != 0)) {
/* bogus "fatal" IRQs appear on some chips... why? */
- status = readl (&ehci->regs->status);
- dbg_cmd (ehci, "fatal", readl (&ehci->regs->command));
+ status = ehci_readl(ehci, &ehci->regs->status);
+ dbg_cmd (ehci, "fatal", ehci_readl(ehci,
+ &ehci->regs->command));
dbg_status (ehci, "fatal", status);
if (status & STS_HALT) {
ehci_err (ehci, "fatal error\n");
dead:
ehci_reset (ehci);
- writel (0, &ehci->regs->configured_flag);
+ ehci_writel(ehci, 0, &ehci->regs->configured_flag);
/* generic layer kills/unlinks all urbs, then
* uses ehci_stop to clean up the rest
*/
}
if (bh)
- ehci_work (ehci, regs);
+ ehci_work (ehci);
spin_unlock (&ehci->lock);
+ if (pcd_status & STS_PCD)
+ usb_hcd_poll_rh_status(hcd);
return IRQ_HANDLED;
}
/* bypass IAA if the hc can't care */
} else if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state) && ehci->reclaim)
- end_unlink_async (ehci, NULL);
+ end_unlink_async (ehci);
/* something else might have unlinked the qh by now */
if (qh->qh_state == QH_STATE_LINKED)
intr_deschedule (ehci, qh);
/* FALL THROUGH */
case QH_STATE_IDLE:
- qh_completions (ehci, qh, NULL);
+ qh_completions (ehci, qh);
break;
default:
ehci_dbg (ehci, "bogus qh %p state %d\n",
return;
}
+static int ehci_get_frame (struct usb_hcd *hcd)
+{
+ struct ehci_hcd *ehci = hcd_to_ehci (hcd);
+ return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) %
+ ehci->periodic_size;
+}
+
/*-------------------------------------------------------------------------*/
-static const struct hc_driver ehci_driver = {
- .description = hcd_name,
- .product_desc = "EHCI Host Controller",
- .hcd_priv_size = sizeof(struct ehci_hcd),
+#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
- /*
- * generic hardware linkage
- */
- .irq = ehci_irq,
- .flags = HCD_MEMORY | HCD_USB2,
+MODULE_DESCRIPTION (DRIVER_INFO);
+MODULE_AUTHOR (DRIVER_AUTHOR);
+MODULE_LICENSE ("GPL");
- /*
- * basic lifecycle operations
- */
- .reset = ehci_hc_reset,
- .start = ehci_start,
-#ifdef CONFIG_PM
- .suspend = ehci_suspend,
- .resume = ehci_resume,
+#ifdef CONFIG_PCI
+#include "ehci-pci.c"
+#define PCI_DRIVER ehci_pci_driver
#endif
- .stop = ehci_stop,
-
- /*
- * managing i/o requests and associated device resources
- */
- .urb_enqueue = ehci_urb_enqueue,
- .urb_dequeue = ehci_urb_dequeue,
- .endpoint_disable = ehci_endpoint_disable,
-
- /*
- * scheduling support
- */
- .get_frame_number = ehci_get_frame,
-
- /*
- * root hub support
- */
- .hub_status_data = ehci_hub_status_data,
- .hub_control = ehci_hub_control,
- .hub_suspend = ehci_hub_suspend,
- .hub_resume = ehci_hub_resume,
-};
-/*-------------------------------------------------------------------------*/
+#ifdef CONFIG_MPC834x
+#include "ehci-fsl.c"
+#define PLATFORM_DRIVER ehci_fsl_driver
+#endif
-/* EHCI 1.0 doesn't require PCI */
+#ifdef CONFIG_SOC_AU1200
+#include "ehci-au1xxx.c"
+#define PLATFORM_DRIVER ehci_hcd_au1xxx_driver
+#endif
-#ifdef CONFIG_PCI
+#ifdef CONFIG_PPC_PS3
+#include "ehci-ps3.c"
+#define PS3_SYSTEM_BUS_DRIVER ps3_ehci_sb_driver
+#endif
-/* PCI driver selection metadata; PCI hotplugging uses this */
-static const struct pci_device_id pci_ids [] = { {
- /* handle any USB 2.0 EHCI controller */
- PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x20), ~0),
- .driver_data = (unsigned long) &ehci_driver,
- },
- { /* end: all zeroes */ }
-};
-MODULE_DEVICE_TABLE (pci, pci_ids);
+#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
+ !defined(PS3_SYSTEM_BUS_DRIVER)
+#error "missing bus glue for ehci-hcd"
+#endif
-/* pci driver glue; this is a "new style" PCI driver module */
-static struct pci_driver ehci_pci_driver = {
- .name = (char *) hcd_name,
- .id_table = pci_ids,
+static int __init ehci_hcd_init(void)
+{
+ int retval = 0;
- .probe = usb_hcd_pci_probe,
- .remove = usb_hcd_pci_remove,
+ pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
+ hcd_name,
+ sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
+ sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
-#ifdef CONFIG_PM
- .suspend = usb_hcd_pci_suspend,
- .resume = usb_hcd_pci_resume,
+#ifdef PLATFORM_DRIVER
+ retval = platform_driver_register(&PLATFORM_DRIVER);
+ if (retval < 0)
+ return retval;
#endif
-};
-
-#endif /* PCI */
+#ifdef PCI_DRIVER
+ retval = pci_register_driver(&PCI_DRIVER);
+ if (retval < 0) {
+#ifdef PLATFORM_DRIVER
+ platform_driver_unregister(&PLATFORM_DRIVER);
+#endif
+ return retval;
+ }
+#endif
-#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
+#ifdef PS3_SYSTEM_BUS_DRIVER
+ if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
+ retval = ps3_system_bus_driver_register(
+ &PS3_SYSTEM_BUS_DRIVER);
+ if (retval < 0) {
+#ifdef PLATFORM_DRIVER
+ platform_driver_unregister(&PLATFORM_DRIVER);
+#endif
+#ifdef PCI_DRIVER
+ pci_unregister_driver(&PCI_DRIVER);
+#endif
+ return retval;
+ }
+ }
+#endif
-MODULE_DESCRIPTION (DRIVER_INFO);
-MODULE_AUTHOR (DRIVER_AUTHOR);
-MODULE_LICENSE ("GPL");
+ return retval;
+}
+module_init(ehci_hcd_init);
-static int __init init (void)
+static void __exit ehci_hcd_cleanup(void)
{
- if (usb_disabled())
- return -ENODEV;
-
- pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
- hcd_name,
- sizeof (struct ehci_qh), sizeof (struct ehci_qtd),
- sizeof (struct ehci_itd), sizeof (struct ehci_sitd));
-
- return pci_register_driver (&ehci_pci_driver);
+#ifdef PLATFORM_DRIVER
+ platform_driver_unregister(&PLATFORM_DRIVER);
+#endif
+#ifdef PCI_DRIVER
+ pci_unregister_driver(&PCI_DRIVER);
+#endif
+#ifdef PS3_SYSTEM_BUS_DRIVER
+ if (firmware_has_feature(FW_FEATURE_PS3_LV1))
+ ps3_system_bus_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
+#endif
}
-module_init (init);
+module_exit(ehci_hcd_cleanup);
-static void __exit cleanup (void)
-{
- pci_unregister_driver (&ehci_pci_driver);
-}
-module_exit (cleanup);