/*
- tm6000-core.c - driver for TM5600/TM6000 USB video capture devices
+ tm6000-core.c - driver for TM5600/TM6000/TM6010 USB video capture devices
Copyright (C) 2006-2007 Mauro Carvalho Chehab <mchehab@infradead.org>
#include <linux/kernel.h>
#include <linux/usb.h>
#include <linux/i2c.h>
-#include <linux/video_decoder.h>
#include "tm6000.h"
#include "tm6000-regs.h"
#include <media/v4l2-common.h>
#include <media/tuner.h>
-#ifdef HACK /* HACK */
-#include "tm6000-hack.c"
-#endif
-
#define USB_TIMEOUT 5*HZ /* ms */
int tm6000_read_write_usb (struct tm6000_core *dev, u8 req_type, u8 req,
for (i=0;i<len;i++) {
printk(" %02x",buf[i]);
}
- printk("\n");
+ printk("\n");
}
}
tm6000_read_write_usb (dev, USB_DIR_OUT | USB_TYPE_VENDOR,
req, value, index, NULL, 0);
}
+EXPORT_SYMBOL_GPL(tm6000_set_reg);
int tm6000_get_reg (struct tm6000_core *dev, u8 req, u16 value, u16 index)
{
return *buf;
}
+EXPORT_SYMBOL_GPL(tm6000_get_reg);
int tm6000_get_reg16 (struct tm6000_core *dev, u8 req, u16 value, u16 index)
{
return buf[1]|buf[0]<<8;
}
+int tm6000_get_reg32 (struct tm6000_core *dev, u8 req, u16 value, u16 index)
+{
+ int rc;
+ u8 buf[4];
+
+ rc=tm6000_read_write_usb (dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
+ value, index, buf, 4);
+
+ if (rc<0)
+ return rc;
+
+ return buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24;
+}
+
void tm6000_set_fourcc_format(struct tm6000_core *dev)
{
- if (dev->fourcc==V4L2_PIX_FMT_UYVY) {
- /* Sets driver to UYUV */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xc1, 0xd0);
+ if (dev->dev_type == TM6010) {
+ int val;
+
+ val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, 0) & 0xfc;
+ if (dev->fourcc == V4L2_PIX_FMT_UYVY)
+ tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, val);
+ else
+ tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, val | 1);
} else {
- /* Sets driver to YUV2 */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xc1, 0x90);
+ if (dev->fourcc == V4L2_PIX_FMT_UYVY)
+ tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
+ else
+ tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0x90);
}
}
int tm6000_init_analog_mode (struct tm6000_core *dev)
{
+ if (dev->dev_type == TM6010) {
+ int val;
+
+ /* Enable video */
+ val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, 0);
+ val |= 0x60;
+ tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, val);
+ val = tm6000_get_reg(dev,
+ TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0);
+ val &= ~0x40;
+ tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, val);
+
+ /* Init teletext */
+ tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
+ tm6000_set_reg(dev, TM6010_REQ07_R41_TELETEXT_VBI_CODE1, 0x27);
+ tm6000_set_reg(dev, TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55);
+ tm6000_set_reg(dev, TM6010_REQ07_R43_VBI_DATA_TYPE_LINE7, 0x66);
+ tm6000_set_reg(dev, TM6010_REQ07_R44_VBI_DATA_TYPE_LINE8, 0x66);
+ tm6000_set_reg(dev, TM6010_REQ07_R45_VBI_DATA_TYPE_LINE9, 0x66);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R46_VBI_DATA_TYPE_LINE10, 0x66);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R47_VBI_DATA_TYPE_LINE11, 0x66);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R48_VBI_DATA_TYPE_LINE12, 0x66);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R49_VBI_DATA_TYPE_LINE13, 0x66);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R4A_VBI_DATA_TYPE_LINE14, 0x66);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R4B_VBI_DATA_TYPE_LINE15, 0x66);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R4C_VBI_DATA_TYPE_LINE16, 0x66);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R4D_VBI_DATA_TYPE_LINE17, 0x66);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R4E_VBI_DATA_TYPE_LINE18, 0x66);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R4F_VBI_DATA_TYPE_LINE19, 0x66);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R50_VBI_DATA_TYPE_LINE20, 0x66);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x66);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R52_VBI_DATA_TYPE_LINE22, 0x66);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R53_VBI_DATA_TYPE_LINE23, 0x00);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R54_VBI_DATA_TYPE_RLINES, 0x00);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R56_VBI_LOOP_FILTER_I_GAIN, 0x00);
+ tm6000_set_reg(dev,
+ TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02);
+ tm6000_set_reg(dev, TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35);
+ tm6000_set_reg(dev, TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0);
+ tm6000_set_reg(dev, TM6010_REQ07_R5A_VBI_TELETEXT_DTO1, 0x11);
+ tm6000_set_reg(dev, TM6010_REQ07_R5B_VBI_TELETEXT_DTO0, 0x4c);
+ tm6000_set_reg(dev, TM6010_REQ07_R40_TELETEXT_VBI_CODE0, 0x01);
+ tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
+
+
+ /* Init audio */
+ tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x00);
+ tm6000_set_reg(dev, TM6010_REQ08_R02_A_FIX_GAIN_CTRL, 0x04);
+ tm6000_set_reg(dev, TM6010_REQ08_R03_A_AUTO_GAIN_CTRL, 0x00);
+ tm6000_set_reg(dev, TM6010_REQ08_R04_A_SIF_AMP_CTRL, 0xa0);
+ tm6000_set_reg(dev, TM6010_REQ08_R05_A_STANDARD_MOD, 0x05);
+ tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x06);
+ tm6000_set_reg(dev, TM6010_REQ08_R07_A_LEFT_VOL, 0x00);
+ tm6000_set_reg(dev, TM6010_REQ08_R08_A_RIGHT_VOL, 0x00);
+ tm6000_set_reg(dev, TM6010_REQ08_R09_A_MAIN_VOL, 0x08);
+ tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, 0x91);
+ tm6000_set_reg(dev, TM6010_REQ08_R0B_A_ASD_THRES1, 0x20);
+ tm6000_set_reg(dev, TM6010_REQ08_R0C_A_ASD_THRES2, 0x12);
+ tm6000_set_reg(dev, TM6010_REQ08_R0D_A_AMD_THRES, 0x20);
+ tm6000_set_reg(dev, TM6010_REQ08_R0E_A_MONO_THRES1, 0xf0);
+ tm6000_set_reg(dev, TM6010_REQ08_R0F_A_MONO_THRES2, 0x80);
+ tm6000_set_reg(dev, TM6010_REQ08_R10_A_MUTE_THRES1, 0xc0);
+ tm6000_set_reg(dev, TM6010_REQ08_R11_A_MUTE_THRES2, 0x80);
+ tm6000_set_reg(dev, TM6010_REQ08_R12_A_AGC_U, 0x12);
+ tm6000_set_reg(dev, TM6010_REQ08_R13_A_AGC_ERR_T, 0xfe);
+ tm6000_set_reg(dev, TM6010_REQ08_R14_A_AGC_GAIN_INIT, 0x20);
+ tm6000_set_reg(dev, TM6010_REQ08_R15_A_AGC_STEP_THR, 0x14);
+ tm6000_set_reg(dev, TM6010_REQ08_R16_A_AGC_GAIN_MAX, 0xfe);
+ tm6000_set_reg(dev, TM6010_REQ08_R17_A_AGC_GAIN_MIN, 0x01);
+ tm6000_set_reg(dev, TM6010_REQ08_R18_A_TR_CTRL, 0xa0);
+ tm6000_set_reg(dev, TM6010_REQ08_R19_A_FH_2FH_GAIN, 0x32);
+ tm6000_set_reg(dev, TM6010_REQ08_R1A_A_NICAM_SER_MAX, 0x64);
+ tm6000_set_reg(dev, TM6010_REQ08_R1B_A_NICAM_SER_MIN, 0x20);
+ tm6000_set_reg(dev, REQ_08_SET_GET_AVREG_BIT, 0x1c, 0x00);
+ tm6000_set_reg(dev, REQ_08_SET_GET_AVREG_BIT, 0x1d, 0x00);
+ tm6000_set_reg(dev, TM6010_REQ08_R1E_A_GAIN_DEEMPH_OUT, 0x13);
+ tm6000_set_reg(dev, TM6010_REQ08_R1F_A_TEST_INTF_SEL, 0x00);
+ tm6000_set_reg(dev, TM6010_REQ08_R20_A_TEST_PIN_SEL, 0x00);
+ tm6000_set_reg(dev, TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3);
+ tm6000_set_reg(dev, TM6010_REQ08_R06_A_SOUND_MOD, 0x00);
+ tm6000_set_reg(dev, TM6010_REQ08_R01_A_INIT, 0x80);
- /* Enables soft reset */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x3f, 0x01);
-
- if (dev->scaler) {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xc0, 0x20);
} else {
- /* Enable Hfilter and disable TS Drop err */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xc0, 0x80);
- }
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xc3, 0x88);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xda, 0x23);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xd1, 0xc0);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xd2, 0xd8);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xd6, 0x06);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xdf, 0x1f);
+ /* Enables soft reset */
+ tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
- /* AP Software reset */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xff, 0x08);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xff, 0x00);
+ if (dev->scaler) {
+ tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x20);
+ } else {
+ /* Enable Hfilter and disable TS Drop err */
+ tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x80);
+ }
- tm6000_set_fourcc_format(dev);
+ tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x88);
+ tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0x23);
+ tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xc0);
+ tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xd8);
+ tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x06);
+ tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_PULSE_CNT0, 0x1f);
- /* Disables soft reset */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x3f, 0x00);
+ /* AP Software reset */
+ tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
+ tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
- /* E3: Select input 0 - TV tuner */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe3, 0x00);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xeb, 0x60);
+ tm6000_set_fourcc_format(dev);
- /* Tuner firmware can now be loaded */
+ /* Disables soft reset */
+ tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
- tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_1, 0x00);
- msleep(11);
+ /* E3: Select input 0 - TV tuner */
+ tm6000_set_reg(dev, TM6010_REQ07_RE3_OUT_SEL1, 0x00);
+ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xeb, 0x60);
- /* This controls input */
- tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_2, 0x0);
- tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_3, 0x01);
+ /* This controls input */
+ tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_2, 0x0);
+ tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_3, 0x01);
+ }
msleep(20);
+ /* Tuner firmware can now be loaded */
+
/*FIXME: Hack!!! */
struct v4l2_frequency f;
mutex_lock(&dev->lock);
f.frequency=dev->freq;
- tm6000_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
+ v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f);
mutex_unlock(&dev->lock);
msleep(100);
tm6000_set_standard (dev, &dev->norm);
tm6000_set_audio_bitrate (dev,48000);
-
return 0;
}
int tm6000_init_digital_mode (struct tm6000_core *dev)
{
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00ff, 0x08);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00ff, 0x00);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x003f, 0x01);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00df, 0x08);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00e2, 0x0c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00e8, 0xff);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00eb, 0xd8);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00c0, 0x40);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00c1, 0xd0);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00c3, 0x09);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00da, 0x37);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00d1, 0xd8);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00d2, 0xc0);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00d6, 0x60);
-
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00e2, 0x0c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00e8, 0xff);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00eb, 0x08);
- msleep(50);
-
- tm6000_set_reg (dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
- msleep(50);
- tm6000_set_reg (dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x01);
- msleep(50);
- tm6000_set_reg (dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
- msleep(100);
-
+ if (dev->dev_type == TM6010) {
+ int val;
+ u8 buf[2];
+
+ /* digital init */
+ val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, 0);
+ val &= ~0x60;
+ tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, val);
+ val = tm6000_get_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0);
+ val |= 0x40;
+ tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, val);
+ tm6000_set_reg(dev, TM6010_REQ07_RFE_POWER_DOWN, 0x28);
+ tm6000_set_reg(dev, TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xfc);
+ tm6000_set_reg(dev, TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0xff);
+ tm6000_set_reg(dev, TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe);
+ tm6000_read_write_usb (dev, 0xc0, 0x0e, 0x00c2, 0x0008, buf, 2);
+ printk (KERN_INFO "buf %#x %#x \n", buf[0], buf[1]);
+
+
+ } else {
+ tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
+ tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
+ tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
+ tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_PULSE_CNT0, 0x08);
+ tm6000_set_reg(dev, TM6010_REQ07_RE2_OUT_SEL2, 0x0c);
+ tm6000_set_reg(dev, TM6010_REQ07_RE8_TYPESEL_MOS_I2S, 0xff);
+ tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00eb, 0xd8);
+ tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x40);
+ tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
+ tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x09);
+ tm6000_set_reg(dev, TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0x37);
+ tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xd8);
+ tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xc0);
+ tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x60);
+
+ tm6000_set_reg(dev, TM6010_REQ07_RE2_OUT_SEL2, 0x0c);
+ tm6000_set_reg(dev, TM6010_REQ07_RE8_TYPESEL_MOS_I2S, 0xff);
+ tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00eb, 0x08);
+ msleep(50);
+
+ tm6000_set_reg (dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
+ msleep(50);
+ tm6000_set_reg (dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x01);
+ msleep(50);
+ tm6000_set_reg (dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
+ msleep(100);
+ }
return 0;
}
+struct reg_init {
+ u8 req;
+ u8 reg;
+ u8 val;
+};
+
/* The meaning of those initializations are unknown */
-u8 init_tab[][2] = {
+struct reg_init tm6000_init_tab[] = {
/* REG VALUE */
- { 0xdf, 0x1f },
- { 0xff, 0x08 },
- { 0xff, 0x00 },
- { 0xd5, 0x4f },
- { 0xda, 0x23 },
- { 0xdb, 0x08 },
- { 0xe2, 0x00 },
- { 0xe3, 0x10 },
- { 0xe5, 0x00 },
- { 0xe8, 0x00 },
- { 0xeb, 0x64 }, /* 48000 bits/sample, external input */
- { 0xee, 0xc2 },
- { 0x3f, 0x01 }, /* Start of soft reset */
- { 0x00, 0x00 },
- { 0x01, 0x07 },
- { 0x02, 0x5f },
- { 0x03, 0x00 },
- { 0x05, 0x64 },
- { 0x07, 0x01 },
- { 0x08, 0x82 },
- { 0x09, 0x36 },
- { 0x0a, 0x50 },
- { 0x0c, 0x6a },
- { 0x11, 0xc9 },
- { 0x12, 0x07 },
- { 0x13, 0x3b },
- { 0x14, 0x47 },
- { 0x15, 0x6f },
- { 0x17, 0xcd },
- { 0x18, 0x1e },
- { 0x19, 0x8b },
- { 0x1a, 0xa2 },
- { 0x1b, 0xe9 },
- { 0x1c, 0x1c },
- { 0x1d, 0xcc },
- { 0x1e, 0xcc },
- { 0x1f, 0xcd },
- { 0x20, 0x3c },
- { 0x21, 0x3c },
- { 0x2d, 0x48 },
- { 0x2e, 0x88 },
- { 0x30, 0x22 },
- { 0x31, 0x61 },
- { 0x32, 0x74 },
- { 0x33, 0x1c },
- { 0x34, 0x74 },
- { 0x35, 0x1c },
- { 0x36, 0x7a },
- { 0x37, 0x26 },
- { 0x38, 0x40 },
- { 0x39, 0x0a },
- { 0x42, 0x55 },
- { 0x51, 0x11 },
- { 0x55, 0x01 },
- { 0x57, 0x02 },
- { 0x58, 0x35 },
- { 0x59, 0xa0 },
- { 0x80, 0x15 },
- { 0x82, 0x42 },
- { 0xc1, 0xd0 },
- { 0xc3, 0x88 },
- { 0x3f, 0x00 }, /* End of the soft reset */
+ { TM6010_REQ07_RD8_IR_PULSE_CNT0, 0x1f },
+ { TM6010_REQ07_RFF_SOFT_RESET, 0x08 },
+ { TM6010_REQ07_RFF_SOFT_RESET, 0x00 },
+ { TM6010_REQ07_RD5_POWERSAVE, 0x4f },
+ { TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0x23 },
+ { TM6010_REQ07_RD8_IR_WAKEUP_ADD, 0x08 },
+ { TM6010_REQ07_RE2_OUT_SEL2, 0x00 },
+ { TM6010_REQ07_RE3_OUT_SEL1, 0x10 },
+ { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0x00 },
+ { TM6010_REQ07_RE8_TYPESEL_MOS_I2S, 0x00 },
+ { REQ_07_SET_GET_AVREG, 0xeb, 0x64 }, /* 48000 bits/sample, external input */
+ { REQ_07_SET_GET_AVREG, 0xee, 0xc2 },
+ { TM6010_REQ07_R3F_RESET, 0x01 }, /* Start of soft reset */
+ { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
+ { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
+ { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
+ { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
+ { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
+ { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
+ { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
+ { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
+ { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
+ { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
+ { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
+ { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
+ { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
+ { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
+ { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
+ { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
+ { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
+ { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
+ { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
+ { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
+ { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
+ { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
+ { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
+ { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
+ { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
+ { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
+ { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
+ { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
+ { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
+ { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
+ { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
+ { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
+ { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
+ { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
+ { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
+ { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
+ { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
+ { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
+ { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
+ { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
+ { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
+ { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
+ { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
+ { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
+ { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
+ { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
+ { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
+ { TM6010_REQ07_RC3_HSTART1, 0x88 },
+ { TM6010_REQ07_R3F_RESET, 0x00 }, /* End of the soft reset */
+ { TM6010_REQ05_R18_IMASK7, 0x00 },
+};
+
+struct reg_init tm6010_init_tab[] = {
+ { TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x00 },
+ { TM6010_REQ07_RC4_HSTART0, 0xa0 },
+ { TM6010_REQ07_RC6_HEND0, 0x40 },
+ { TM6010_REQ07_RCA_VEND0, 0x31 },
+ { TM6010_REQ07_RCC_ACTIVE_VIDEO_IF, 0xe1 },
+ { TM6010_REQ07_RE0_DVIDEO_SOURCE, 0x03 },
+ { TM6010_REQ07_RFE_POWER_DOWN, 0x7f },
+
+ { TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0 },
+ { TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4 },
+ { TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8 },
+ { TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00 },
+ { TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2 },
+ { TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0 },
+ { TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2 },
+ { TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60 },
+ { TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc },
+
+ { TM6010_REQ07_R3F_RESET, 0x01 },
+ { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
+ { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
+ { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
+ { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
+ { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
+ { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
+ { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
+ { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
+ { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
+ { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
+ { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
+ { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
+ { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
+ { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
+ { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
+ { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
+ { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
+ { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
+ { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
+ { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
+ { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
+ { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
+ { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
+ { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
+ { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
+ { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
+ { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
+ { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
+ { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
+ { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
+ { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
+ { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
+ { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
+ { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
+ { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
+ { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
+ { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
+ { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
+ { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
+ { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
+ { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
+ { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
+ { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
+ { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
+ { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
+ { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
+ { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
+ { TM6010_REQ07_RC3_HSTART1, 0x88 },
+ { TM6010_REQ07_R3F_RESET, 0x00 },
+
+ { TM6010_REQ05_R18_IMASK7, 0x00 },
+
+ { TM6010_REQ07_RD8_IR_LEADER1, 0xaa },
+ { TM6010_REQ07_RD8_IR_LEADER0, 0x30 },
+ { TM6010_REQ07_RD8_IR_PULSE_CNT1, 0x20 },
+ { TM6010_REQ07_RD8_IR_PULSE_CNT0, 0xd0 },
+ { REQ_04_EN_DISABLE_MCU_INT, 0x02, 0x00 },
+ { TM6010_REQ07_RD8_IR, 0x2f },
+
+ /* set remote wakeup key:any key wakeup */
+ { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0xfe },
+ { TM6010_REQ07_RD8_IR_WAKEUP_SEL, 0xff },
};
int tm6000_init (struct tm6000_core *dev)
{
- int board, rc=0, i;
+ int board, rc=0, i, size;
+ struct reg_init *tab;
-#ifdef HACK /* HACK */
- init_tm6000(dev);
- return 0;
-#else
+ if (dev->dev_type == TM6010) {
+ tab = tm6010_init_tab;
+ size = ARRAY_SIZE(tm6010_init_tab);
+ } else {
+ tab = tm6000_init_tab;
+ size = ARRAY_SIZE(tm6000_init_tab);
+ }
/* Load board's initialization table */
- for (i=0; i< ARRAY_SIZE(init_tab); i++) {
- rc= tm6000_set_reg (dev, REQ_07_SET_GET_AVREG,
- init_tab[i][0],init_tab[i][1]);
+ for (i=0; i< size; i++) {
+ rc= tm6000_set_reg (dev, tab[i].req, tab[i].reg, tab[i].val);
if (rc<0) {
- printk (KERN_ERR "Error %i while setting reg %d to value %d\n",
- rc, init_tab[i][0],init_tab[i][1]);
+ printk (KERN_ERR "Error %i while setting req %d, "
+ "reg %d to value %d\n", rc,
+ tab[i].req,tab[i].reg, tab[i].val);
return rc;
}
}
+ msleep(5); /* Just to be conservative */
+
/* Check board version - maybe 10Moons specific */
- board=tm6000_get_reg16 (dev, 0x40, 0, 0);
+ board=tm6000_get_reg32 (dev, REQ_40_GET_VERSION, 0, 0);
if (board >=0) {
- printk (KERN_INFO "Board version = 0x%04x\n",board);
+ printk (KERN_INFO "Board version = 0x%08x\n",board);
} else {
printk (KERN_ERR "Error %i while retrieving board version\n",board);
}
- tm6000_set_reg (dev, REQ_05_SET_GET_USBREG, 0x18, 0x00);
- msleep(5); /* Just to be conservative */
-
- /* Reset GPIO1 and GPIO4. */
- for (i=0; i< 2; i++) {
- rc=tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_1, 0);
- if (rc<0) {
- printk (KERN_ERR "Error %i doing GPIO1 reset\n",rc);
- return rc;
- }
-
- msleep(10); /* Just to be conservative */
- rc=tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_1, 1);
- if (rc<0) {
- printk (KERN_ERR "Error %i doing GPIO1 reset\n",rc);
- return rc;
- }
-
- msleep(10);
- rc=tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_4, 0);
- if (rc<0) {
- printk (KERN_ERR "Error %i doing GPIO4 reset\n",rc);
- return rc;
- }
-
- msleep(10);
- rc=tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_4, 1);
- if (rc<0) {
- printk (KERN_ERR "Error %i doing GPIO4 reset\n",rc);
- return rc;
- }
-
- if (!i)
- rc=tm6000_get_reg16(dev, 0x40,0,0);
- }
-
- msleep(50);
-
-#endif /* HACK */
-
- return 0;
-}
-
-#define tm6000_wrt(dev,req,reg,val, data...) \
- { const static u8 _val[] = data; \
- tm6000_read_write_usb(dev,USB_DIR_OUT | USB_TYPE_VENDOR, \
- req,reg, val, (u8 *) _val, ARRAY_SIZE(_val)); \
- }
+ rc = tm6000_cards_setup(dev);
-/*
-TM5600/6000 register values to set video standards.
- There's an adjust, common to all, for composite video
- Additional adjustments are required for S-Video, based on std.
-
- Standards values for TV S-Video Changes
-REG PAL PAL_M PAL_N SECAM NTSC Comp. PAL PAL_M PAL_N SECAM NTSC
-0xdf 0x1f 0x1f 0x1f 0x1f 0x1f
-0xe2 0x00 0x00 0x00 0x00 0x00
-0xe8 0x0f 0x0f 0x0f 0x0f 0x0f 0x00 0x00 0x00 0x00 0x00
-0xeb 0x60 0x60 0x60 0x60 0x60 0x64 0x64 0x64 0x64 0x64 0x64
-0xd5 0x5f 0x5f 0x5f 0x4f 0x4f 0x4f 0x4f 0x4f 0x4f 0x4f
-0xe3 0x00 0x00 0x00 0x00 0x00 0x10 0x10 0x10 0x10 0x10 0x10
-0xe5 0x00 0x00 0x00 0x00 0x00 0x10 0x10 0x10 0x10 0x10
-0x3f 0x01 0x01 0x01 0x01 0x01
-0x00 0x32 0x04 0x36 0x38 0x00 0x33 0x05 0x37 0x39 0x01
-0x01 0x0e 0x0e 0x0e 0x0e 0x0f
-0x02 0x5f 0x5f 0x5f 0x5f 0x5f
-0x03 0x02 0x00 0x02 0x02 0x00 0x04 0x04 0x04 0x03 0x03
-0x07 0x01 0x01 0x01 0x01 0x01 0x00 0x00
-0x17 0xcd 0xcd 0xcd 0xcd 0xcd 0x8b
-0x18 0x25 0x1e 0x1e 0x24 0x1e
-0x19 0xd5 0x83 0x91 0x92 0x8b
-0x1a 0x63 0x0a 0x1f 0xe8 0xa2
-0x1b 0x50 0xe0 0x0c 0xed 0xe9
-0x1c 0x1c 0x1c 0x1c 0x1c 0x1c
-0x1d 0xcc 0xcc 0xcc 0xcc 0xcc
-0x1e 0xcc 0xcc 0xcc 0xcc 0xcc
-0x1f 0xcd 0xcd 0xcd 0xcd 0xcd
-0x2e 0x8c 0x88 0x8c 0x8c 0x88 0x88
-0x30 0x2c 0x20 0x2c 0x2c 0x22 0x2a 0x22 0x22 0x2a
-0x31 0xc1 0x61 0xc1 0xc1 0x61
-0x33 0x0c 0x0c 0x0c 0x2c 0x1c
-0x35 0x1c 0x1c 0x1c 0x18 0x1c
-0x82 0x52 0x52 0x52 0x42 0x42
-0x04 0xdc 0xdc 0xdc 0xdd
-0x0d 0x07 0x07 0x07 0x87 0x07
-0x3f 0x00 0x00 0x00 0x00 0x00
-*/
-
-
-void tm6000_get_std_res(struct tm6000_core *dev)
-{
- /* Currently, those are the only supported resoltions */
- if (dev->norm & V4L2_STD_525_60) {
- dev->height=480;
- } else {
- dev->height=576;
- }
- dev->width=720;
-
-printk("tm6000: res= %dx%d\n",dev->width,dev->height);
-}
-
-int tm6000_set_standard (struct tm6000_core *dev, v4l2_std_id *norm)
-{
- dev->norm=*norm;
- tm6000_get_std_res(dev);
-
- /* HACK: Should use, instead, the common code!!! */
- if (*norm & V4L2_STD_PAL_M) {
-printk("calling PAL/M hack\n");
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xdf, 0x1f);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe2, 0x00);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe8, 0x0f);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xeb, 0x60);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xd5, 0x5f);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe3, 0x00);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe5, 0x00);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x3f, 0x01);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00, 0x04);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x01, 0x0e);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x02, 0x5f);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x03, 0x00);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x07, 0x01);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x18, 0x1e);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x19, 0x83);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1a, 0x0a);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1b, 0xe0);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1c, 0x1c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1d, 0xcc);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1e, 0xcc);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1f, 0xcd);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x2e, 0x88);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x30, 0x20);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x31, 0x61);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x33, 0x0c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x35, 0x1c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x82, 0x52);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x04, 0xdc);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x0d, 0x07);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x3f, 0x00);
-
- /* Enables audio and AV */
- /* maybe it should be, instead, 0x20 */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xcc, 0x60);
- tm6000_set_reg (dev, REQ_08_SET_GET_AVREG_BIT, 0x01, 0x80);
-
- return 0;
- }
-
- if (*norm & V4L2_STD_PAL) {
-printk("calling PAL hack\n");
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xdf, 0x1f);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe2, 0x00);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe8, 0x0f);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xeb, 0x60);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xd5, 0x5f);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe3, 0x00);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe5, 0x00);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x3f, 0x01);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00, 0x32);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x01, 0x0e);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x02, 0x5f);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x03, 0x02);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x07, 0x01);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x18, 0x25);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x19, 0xd5);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1a, 0x63);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1b, 0x50);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1c, 0x1c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1d, 0xcc);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1e, 0xcc);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1f, 0xcd);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x2e, 0x8c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x30, 0x2c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x31, 0xc1);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x33, 0x0c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x35, 0x1c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x82, 0x52);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x04, 0xdc);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x0d, 0x07);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x3f, 0x00);
-
- return 0;
- }
-
- /* */
-// tm6000_set_reg (dev, REQ_04_EN_DISABLE_MCU_INT, 0x02, 0x01);
-// tm6000_set_reg (dev, REQ_04_EN_DISABLE_MCU_INT, 0x02, 0x00);
-
- /* Set registers common to all standards */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xdf, 0x1f);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe2, 0x00);
-
- switch (dev->input) {
- case TM6000_INPUT_TV:
- /* Seems to disable ADC2 - needed for TV and RCA */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe8, 0x0f);
-
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xeb, 0x60);
-
- if (*norm & V4L2_STD_PAL) {
- /* Enable UV_FLT_EN */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xd5, 0x5f);
- } else {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xd5, 0x4f);
- }
-
- /* E3: Select input 0 */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe3, 0x00);
-
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe5, 0x10);
-
- break;
- case TM6000_INPUT_COMPOSITE:
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xeb, 0x64);
- /* E3: Select input 1 */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe3, 0x10);
- break;
- case TM6000_INPUT_SVIDEO:
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe8, 0x00);
-
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xeb, 0x64);
-
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xd5, 0x4f);
- /* E3: Select input 1 */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe3, 0x10);
-
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xe5, 0x10);
-
- break;
- }
-
- /* Software reset */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x3f, 0x01);
-
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x02, 0x5f);
-
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x07, 0x01);
-// tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x17, 0xcd);
-
- /* Horizontal Sync DTO = 0x1ccccccd */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1c, 0x1c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1d, 0xcc);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1e, 0xcc);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1f, 0xcd);
-
- /* Vertical Height */
- if (*norm & V4L2_STD_525_60) {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x31, 0x61);
- } else {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x31, 0xc1);
- }
-
- /* Horizontal Length */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x2f, 640/8);
-
- if (*norm & V4L2_STD_PAL) {
- /* Common to All PAL Standards */
-
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x01, 0x0e);
-
- /* Vsync Hsinc Lockout End */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x33, 0x0c);
-
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x35, 0x1c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x82, 0x52);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x04, 0xdc);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x0d, 0x07);
- if (*norm & V4L2_STD_PAL_M) {
-
- /* Chroma DTO */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x18, 0x1e);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x19, 0x83);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1a, 0x0a);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1b, 0xe0);
-
- /* Active Video Horiz Start Time */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x2e, 0x88);
-
- if (dev->input==TM6000_INPUT_SVIDEO) {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00, 0x05);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x03, 0x04);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x30, 0x22);
- } else {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00, 0x04);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x03, 0x00);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x30, 0x20);
- }
- } else if (*norm & V4L2_STD_PAL_N) {
- /* Chroma DTO */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x18, 0x1e);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x19, 0x91);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1a, 0x1f);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1b, 0x0c);
-
- if (dev->input==TM6000_INPUT_SVIDEO) {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00, 0x37);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x03, 0x04);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x2e, 0x88);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x30, 0x22);
- } else {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00, 0x36);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x03, 0x02);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x2e, 0x8c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x30, 0x2c);
- }
- } else { // Other PAL standards
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x18, 0x25);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x19, 0xd5);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1a, 0x63);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1b, 0x50);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x2e, 0x8c);
-
- if (dev->input==TM6000_INPUT_SVIDEO) {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00, 0x33);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x03, 0x04);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x30, 0x2a);
-
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x30, 0x2c);
- } else {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00, 0x32);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x03, 0x02);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x30, 0x2c);
- }
- }
- } if (*norm & V4L2_STD_SECAM) {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x01, 0x0e);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x18, 0x24);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x19, 0x92);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1a, 0xe8);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1b, 0xed);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x2e, 0x8c);
-
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x33, 0x2c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x35, 0x18);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x82, 0x42);
- // Register 0x04 is not initialized on SECAM
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x0d, 0x87);
-
- if (dev->input==TM6000_INPUT_SVIDEO) {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00, 0x39);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x03, 0x03);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x30, 0x2a);
- } else {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00, 0x38);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x03, 0x02);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x30, 0x2c);
- }
- } else { /* NTSC */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x01, 0x0f);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x18, 0x1e);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x19, 0x8b);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1a, 0xa2);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x1b, 0xe9);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x2e, 0x88);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x30, 0x22);
-
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x33, 0x1c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x35, 0x1c);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x82, 0x42);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x0d, 0x07);
- if (dev->input==TM6000_INPUT_SVIDEO) {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00, 0x01);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x03, 0x03);
-
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x07, 0x00);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x17, 0x8b);
- } else {
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00, 0x00);
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x03, 0x00);
- }
- }
-
-
- /* End of software reset */
- tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x3f, 0x00);
-
- msleep(40);
-
- return 0;
+ return rc;
}
-int tm6000_set_audio_bitrate (struct tm6000_core *dev, int bitrate)
+int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate)
{
int val;
return val;
}
+EXPORT_SYMBOL_GPL(tm6000_set_audio_bitrate);
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff