#define SXG_DROP_DUMB_SEND(_pAdapt, _skb) { \
ASSERT(_skb); \
- dev_kfree_skb(_skb); \
}
/*
skb->next = NULL; \
_RcvDataBufferHdr->PhysicalAddress = pci_map_single(adapter->pcidev,\
_RcvDataBufferHdr->skb->data, BufferSize, PCI_DMA_FROMDEVICE); \
+ if (SXG_INVALID_SGL(_RcvDataBufferHdr->PhysicalAddress,BufferSize)) \
+ printk(KERN_EMERG "SXG_ALLOCATE_RCV_PACKET: RCV packet" \
+ "non-64k boundary aligned\n"); \
} else { \
(_RcvDataBufferHdr)->skb = NULL; \
} \
}
/* SGL macros */
-#define SXG_FREE_SGL_BUFFER(_pAdapt, _Sgl, _NB, _irq) { \
- if(!_irq) \
- spin_lock_irqsave(&(_pAdapt)->SglQLock, sgl_flags); \
- else \
- spin_lock(&(_pAdapt)->SglQLock); \
+#define SXG_FREE_SGL_BUFFER(_pAdapt, _Sgl, _NB) { \
+ spin_lock_irqsave(&(_pAdapt)->SglQLock, sgl_flags); \
(_pAdapt)->FreeSglBufferCount++; \
ASSERT((_pAdapt)->AllSglBufferCount >= (_pAdapt)->FreeSglBufferCount); \
ASSERT(!((_Sgl)->State & SXG_BUFFER_FREE)); \
(_Sgl)->State = SXG_BUFFER_FREE; \
InsertTailList(&(_pAdapt)->FreeSglBuffers, &(_Sgl)->FreeList); \
- if(!_irq) \
- spin_unlock_irqrestore(&(_pAdapt)->SglQLock, sgl_flags); \
- else \
- spin_unlock(&(_pAdapt)->SglQLock); \
+ spin_unlock_irqrestore(&(_pAdapt)->SglQLock, sgl_flags); \
}
/*
if(!_irq) \
spin_lock_irqsave(&(_pAdapt)->SglQLock, sgl_flags); \
else \
- spin_lock(&(_pAdapt)->SglQLock); \
+ spin_lock_irqsave(&(_pAdapt)->SglQLock, sgl_flags); \
if((_pAdapt)->FreeSglBufferCount) { \
ASSERT(!(IsListEmpty(&(_pAdapt)->FreeSglBuffers))); \
_ple = RemoveHeadList(&(_pAdapt)->FreeSglBuffers); \
if(!_irq) \
spin_unlock_irqrestore(&(_pAdapt)->SglQLock, sgl_flags);\
else \
- spin_unlock(&(_pAdapt)->SglQLock); \
+ spin_unlock_irqrestore(&(_pAdapt)->SglQLock, sgl_flags);\
}
/*
/* Microcode file selection codes */
enum SXG_UCODE_SEL {
- SXG_UCODE_SAHARA, /* Sahara ucode */
- SXG_UCODE_SDIAGCPU, /* Sahara CPU diagnostic ucode */
- SXG_UCODE_SDIAGSYS /* Sahara system diagnostic ucode */
+ SXG_UCODE_SYSTEM, /* System (operational) uucode */
+ SXG_UCODE_SDIAGCPU, /* System CPU diagnostic ucode */
+ SXG_UCODE_SDIAGSYS /* System diagnostic ucode */
};
u32 memorylength;
u32 drambase;
u32 dramlength;
+ enum asic_type asictype; /* type of ASIC (chip) */
unsigned int activated;
u32 intrregistered;
unsigned int isp_initialized;
u32 DumpCmdRunning:1; /* Dump command in progress */
u32 DebugRunning:1; /* AGDB debug in progress */
u32 JumboEnabled:1; /* Jumbo frames enabled */
- u32 MsiEnabled:1; /* MSI interrupt enabled */
+ u32 msi_enabled:1; /* MSI interrupt enabled */
u32 RssEnabled:1; /* RSS Enabled */
u32 FailOnBadEeprom:1; /* Fail on Bad Eeprom */
u32 DiagStart:1; /* Init adapter for diagnostic start */
+ u32 XmtFcEnabled:1;
+ u32 RcvFcEnabled:1;
/* Stats */
u32 PendingRcvCount; /* Outstanding rcv indications */
u32 PendingXmtCount; /* Outstanding send requests */
/* PSXG_DUMP_CMD DumpBuffer; */ /* 68k - Cmd and Buffer */
/* dma_addr_t PDumpBuffer; */ /* Physical address */
/*#endif */ /* SXG_FAILURE_DUMP */
+ /*MSI-X related data elements*/
+ u32 nr_msix_entries;
+ struct msix_entry *msi_entries;
+ struct timer_list watchdog_timer;
+ struct work_struct update_link_status;
+ u32 link_status_changed;
};
#if SLIC_DUMP_ENABLED
#define ETHERMAXFRAME 1514
#define JUMBOMAXFRAME 9014
+#define SXG_JUMBO_MTU 9000
+#define SXG_DEFAULT_MTU 1500
+
#if defined(CONFIG_X86_64) || defined(CONFIG_IA64)
#define SXG_GET_ADDR_LOW(_addr) (u32)((u64)(_addr) & 0x00000000FFFFFFFF)
#define SXG_GET_ADDR_HIGH(_addr) \
#define SIOCSLICSETINTAGG (SIOCDEVPRIVATE+10)
#define SIOCSLICTRACEDUMP (SIOCDEVPRIVATE+11)
-extern struct ethtool_ops sxg_nic_ethtool_ops;
+extern const struct ethtool_ops sxg_nic_ethtool_ops;
#define SXG_COMPLETE_SLOW_SEND_LIMIT 128
#endif /* __SXG_DRIVER_H__ */