#define CONFIG_RTL8192_IO_MAP
-#ifdef RTL8192SU
#include <asm/uaccess.h>
#include "r8192U.h"
-//#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
#include "r8180_93cx6.h" /* Card EEPROM */
#include "r8192U_wx.h"
#include "ieee80211/dot11d.h"
-#else
-
-#include <asm/uaccess.h>
-#include "r8192U_hw.h"
-#include "r8192U.h"
-#include "r8190_rtl8256.h" /* RTL8225 Radio frontend */
-#include "r8180_93cx6.h" /* Card EEPROM */
-#include "r8192U_wx.h"
-#include "r819xU_phy.h" //added by WB 4.30.2008
-#include "r819xU_phyreg.h"
-#include "r819xU_cmdpkt.h"
-#include "r8192U_dm.h"
-//#include "r8192xU_phyreg.h"
-#include <linux/usb.h>
-
-#include "r8192U_pm.h"
-
-#include "ieee80211/dot11d.h"
-
-#endif
-#ifdef RTL8192SU
u32 rt_global_debug_component = \
// COMP_TRACE |
// COMP_DBG |
COMP_DOWN |
COMP_RESET |
COMP_ERR; //always open err flags on
-#else
-//set here to open your trace code. //WB
-u32 rt_global_debug_component = \
- // COMP_INIT |
-// COMP_DBG |
- // COMP_EPROM |
-// COMP_PHY |
- // COMP_RF |
-// COMP_FIRMWARE |
-// COMP_CH |
- // COMP_POWER_TRACKING |
-// COMP_RATE |
- // COMP_TXAGC |
- // COMP_TRACE |
- COMP_DOWN |
- // COMP_RECV |
- // COMP_SWBW |
- COMP_SEC |
- // COMP_RESET |
- // COMP_SEND |
- // COMP_EVENTS |
- COMP_ERR ; //always open err flags on
-#endif
#define TOTAL_CAM_ENTRY 32
#define CAM_CONTENT_COUNT 8
MODULE_DESCRIPTION("Linux driver for Realtek RTL8192 USB WiFi cards");
static char* ifname = "wlan%d";
-#if 0
-static int hwseqnum = 0;
-static int hwwep = 0;
-#endif
static int hwwep = 1; //default use hw. set 0 to use software security
static int channels = 0x3fff;
};
-#ifdef RTL8192SU
static void rtl8192SU_read_eeprom_info(struct net_device *dev);
short rtl8192SU_tx(struct net_device *dev, struct sk_buff* skb);
void rtl8192SU_rx_nomal(struct sk_buff* skb);
.rtl819x_initial_gain = InitialGain8192S,
.rtl819x_query_rxdesc_status = rtl8192SU_query_rxdesc_status,
};
-#else
-static void rtl8192_read_eeprom_info(struct net_device *dev);
-short rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
-void rtl8192_rx_nomal(struct sk_buff* skb);
-void rtl8192_rx_cmd(struct sk_buff *skb);
-bool rtl8192_adapter_start(struct net_device *dev);
-short rtl819xU_tx_cmd(struct net_device *dev, struct sk_buff *skb);
-void rtl8192_link_change(struct net_device *dev);
-void InitialGain819xUsb(struct net_device *dev,u8 Operation);
-void query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe);
-
-struct rtl819x_ops rtl8192u_ops = {
- .nic_type = NIC_8192U,
- .rtl819x_read_eeprom_info = rtl8192_read_eeprom_info,
- .rtl819x_tx = rtl8192_tx,
- .rtl819x_tx_cmd = rtl819xU_tx_cmd,
- .rtl819x_rx_nomal = rtl8192_rx_nomal,
- .rtl819x_rx_cmd = rtl8192_rx_cmd,
- .rtl819x_adapter_start = rtl8192_adapter_start,
- .rtl819x_link_change = rtl8192_link_change,
- .rtl819x_initial_gain = InitialGain819xUsb,
- .rtl819x_query_rxdesc_status = query_rxdesc_status,
-};
-#endif
typedef struct _CHANNEL_LIST
#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
-#ifdef RTL8192SU
#define rx_hal_is_cck_rate(_pDesc)\
((_pDesc->RxMCS == DESC92S_RATE1M ||\
_pDesc->RxMCS == DESC92S_RATE2M ||\
_DataRate == MGN_5_5M ||\
_DataRate == MGN_11M )
-#else
-#define rx_hal_is_cck_rate(_pdrvinfo)\
- ((_pdrvinfo->RxRate == DESC90_RATE1M ||\
- _pdrvinfo->RxRate == DESC90_RATE2M ||\
- _pdrvinfo->RxRate == DESC90_RATE5_5M ||\
- _pdrvinfo->RxRate == DESC90_RATE11M) &&\
- !_pdrvinfo->RxHT)
-#endif
status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
-#ifdef RTL8192SU
indx, 0, &data, 1, HZ / 2);
-#else
- (indx&0xff)|0xff00, (indx>>8)&0x0f, &data, 1, HZ / 2);
-#endif
if (status < 0)
{
status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
-#ifdef RTL8192SU
indx, 0, &data, 2, HZ / 2);
-#else
- (indx&0xff)|0xff00, (indx>>8)&0x0f, &data, 2, HZ / 2);
-#endif
if (status < 0)
{
status = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
RTL8187_REQ_SET_REGS, RTL8187_REQT_WRITE,
-#ifdef RTL8192SU
indx, 0, &data, 4, HZ / 2);
-#else
- (indx&0xff)|0xff00, (indx>>8)&0x0f, &data, 4, HZ / 2);
-#endif
if (status < 0)
status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
-#ifdef RTL8192SU
indx, 0, &data, 1, HZ / 2);
-#else
- (indx&0xff)|0xff00, (indx>>8)&0x0f, &data, 1, HZ / 2);
-#endif
if (status < 0)
{
status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
-#ifdef RTL8192SU
indx, 0, &data, 2, HZ / 2);
-#else
- (indx&0xff)|0xff00, (indx>>8)&0x0f, &data, 2, HZ / 2);
-#endif
if (status < 0)
{
status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
-#ifdef RTL8192SU
indx, 0, &data, 4, HZ / 2);
-#else
- (indx&0xff)|0xff00, (indx>>8)&0x0f, &data, 4, HZ / 2);
-#endif
// if(0 != result) {
// printk(KERN_WARNING "read size of data = %d\, date = %d\n", result, data);
// }
return len;
}
-#ifdef RTL8192SU
static int proc_get_registers(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
*eof = 1;
return len;
}
-#else
-static int proc_get_registers(char *page, char **start,
- off_t offset, int count,
- int *eof, void *data)
-{
- struct net_device *dev = data;
-// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
-
- int len = 0;
- int i,n;
-
- int max=0xff;
-
- /* This dump the current register page */
-len += snprintf(page + len, count - len,
- "\n####################page 0##################\n ");
-
- for(n=0;n<=max;)
- {
- //printk( "\nD: %2x> ", n);
- len += snprintf(page + len, count - len,
- "\nD: %2x > ",n);
-
- for(i=0;i<16 && n<=max;i++,n++)
- len += snprintf(page + len, count - len,
- "%2x ",read_nic_byte(dev,0x000|n));
-
- // printk("%2x ",read_nic_byte(dev,n));
- }
-#if 1
-len += snprintf(page + len, count - len,
- "\n####################page 1##################\n ");
- for(n=0;n<=max;)
- {
- //printk( "\nD: %2x> ", n);
- len += snprintf(page + len, count - len,
- "\nD: %2x > ",n);
-
- for(i=0;i<16 && n<=max;i++,n++)
- len += snprintf(page + len, count - len,
- "%2x ",read_nic_byte(dev,0x100|n));
-
- // printk("%2x ",read_nic_byte(dev,n));
- }
-len += snprintf(page + len, count - len,
- "\n####################page 3##################\n ");
- for(n=0;n<=max;)
- {
- //printk( "\nD: %2x> ", n);
- len += snprintf(page + len, count - len,
- "\nD: %2x > ",n);
-
- for(i=0;i<16 && n<=max;i++,n++)
- len += snprintf(page + len, count - len,
- "%2x ",read_nic_byte(dev,0x300|n));
-
- // printk("%2x ",read_nic_byte(dev,n));
- }
-
-#endif
-
- len += snprintf(page + len, count - len,"\n");
- *eof = 1;
- return len;
-
-}
-#endif
-
-#if 0
-static int proc_get_cck_reg(char *page, char **start,
- off_t offset, int count,
- int *eof, void *data)
-{
- struct net_device *dev = data;
-// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
-
- int len = 0;
- int i,n;
-
- int max = 0x5F;
-
- /* This dump the current register page */
- for(n=0;n<=max;)
- {
- //printk( "\nD: %2x> ", n);
- len += snprintf(page + len, count - len,
- "\nD: %2x > ",n);
-
- for(i=0;i<16 && n<=max;i++,n++)
- len += snprintf(page + len, count - len,
- "%2x ",read_phy_cck(dev,n));
-
- // printk("%2x ",read_nic_byte(dev,n));
- }
- len += snprintf(page + len, count - len,"\n");
-
-
- *eof = 1;
- return len;
-}
-
-#endif
-
-#if 0
-static int proc_get_ofdm_reg(char *page, char **start,
- off_t offset, int count,
- int *eof, void *data)
-{
- struct net_device *dev = data;
-// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
-
- int len = 0;
- int i,n;
-
- //int max=0xff;
- int max = 0x40;
-
- /* This dump the current register page */
- for(n=0;n<=max;)
- {
- //printk( "\nD: %2x> ", n);
- len += snprintf(page + len, count - len,
- "\nD: %2x > ",n);
-
- for(i=0;i<16 && n<=max;i++,n++)
- len += snprintf(page + len, count - len,
- "%2x ",read_phy_ofdm(dev,n));
-
- // printk("%2x ",read_nic_byte(dev,n));
- }
- len += snprintf(page + len, count - len,"\n");
-
-
-
- *eof = 1;
- return len;
-}
-
-#endif
-
-#if 0
-static int proc_get_stats_hw(char *page, char **start,
- off_t offset, int count,
- int *eof, void *data)
-{
- struct net_device *dev = data;
- struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
-
- int len = 0;
-
- len += snprintf(page + len, count - len,
- "NIC int: %lu\n"
- "Total int: %lu\n",
- priv->stats.ints,
- priv->stats.shints);
-
- *eof = 1;
- return len;
-}
-#endif
static int proc_get_stats_tx(char *page, char **start,
off_t offset, int count,
dev->name);
return;
}
- #if 0
- e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
- priv->dir_dev, proc_get_stats_hw, dev);
-
- if (!e) {
- DMESGE("Unable to initialize "
- "/proc/net/rtl8192/%s/stats-hw\n",
- dev->name);
- }
- #endif
e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
priv->dir_dev, proc_get_stats_rx, dev);
"/proc/net/rtl8192/%s/stats-tx\n",
dev->name);
}
- #if 0
- e = create_proc_read_entry("stats-ieee", S_IFREG | S_IRUGO,
- priv->dir_dev, proc_get_stats_ieee, dev);
-
- if (!e) {
- DMESGE("Unable to initialize "
- "/proc/net/rtl8192/%s/stats-ieee\n",
- dev->name);
- }
-
- #endif
e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
priv->dir_dev, proc_get_stats_ap, dev);
"/proc/net/rtl8192/%s/registers\n",
dev->name);
}
-#ifdef RTL8192SU
e = create_proc_read_entry("registers-1", S_IFREG | S_IRUGO,
priv->dir_dev, proc_get_registers_1, dev);
if (!e) {
"/proc/net/rtl8192/%s/registers-e\n",
dev->name);
}
-#endif
-#if 0
- e = create_proc_read_entry("cck-registers", S_IFREG | S_IRUGO,
- priv->dir_dev, proc_get_cck_reg, dev);
- if (!e) {
- RT_TRACE(COMP_ERR, "Unable to initialize "
- "/proc/net/rtl8192/%s/cck-registers\n",
- dev->name);
- }
-
- e = create_proc_read_entry("ofdm-registers", S_IFREG | S_IRUGO,
- priv->dir_dev, proc_get_ofdm_reg, dev);
- if (!e) {
- RT_TRACE(COMP_ERR, "Unable to initialize "
- "/proc/net/rtl8192/%s/ofdm-registers\n",
- dev->name);
- }
-#endif
}
/****************************************************************************
-----------------------------MISC STUFF-------------------------
------------------------------HW STUFF---------------------------
*****************************************************************************/
-#if 0
-void rtl8192_irq_enable(struct net_device *dev)
-{
- struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
- //priv->irq_enabled = 1;
-/*
- write_nic_word(dev,INTA_MASK,INTA_RXOK | INTA_RXDESCERR | INTA_RXOVERFLOW |\
- INTA_TXOVERFLOW | INTA_HIPRIORITYDESCERR | INTA_HIPRIORITYDESCOK |\
- INTA_NORMPRIORITYDESCERR | INTA_NORMPRIORITYDESCOK |\
- INTA_LOWPRIORITYDESCERR | INTA_LOWPRIORITYDESCOK | INTA_TIMEOUT);
-*/
- write_nic_word(dev,INTA_MASK, priv->irq_mask);
-}
-
-
-void rtl8192_irq_disable(struct net_device *dev)
-{
-// struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
-
- write_nic_word(dev,INTA_MASK,0);
- force_pci_posting(dev);
-// priv->irq_enabled = 0;
-}
-#endif
-
void rtl8192_set_mode(struct net_device *dev,int mode)
{
u8 ecmd;
RT_TRACE(COMP_CH, "=====>%s()====ch:%d\n", __FUNCTION__, ch);
//printk("=====>%s()====ch:%d\n", __FUNCTION__, ch);
priv->chan=ch;
- #if 0
- if(priv->ieee80211->iw_mode == IW_MODE_ADHOC ||
- priv->ieee80211->iw_mode == IW_MODE_MASTER){
-
- priv->ieee80211->link_state = WLAN_LINK_ASSOCIATED;
- priv->ieee80211->master_chan = ch;
- rtl8192_update_beacon_ch(dev);
- }
- #endif
/* this hack should avoid frame TX during channel setting*/
rtl8192_rx_initiate(dev);
// rtl8192_set_rxconf(dev);
-#if 0
- if(NIC_8187 == priv->card_8187) {
- cmd=read_nic_byte(dev,CMD);
- write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
- }
- else {
- //write_nic_dword(dev, RX_CONF, priv->ReceiveConfig);
- }
-#endif
}
void rtl8192_tx_enable(struct net_device *dev)
{
-#if 0
- u8 cmd;
- u8 byte;
- u32 txconf;
- struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
- //test loopback
- // priv->TransmitConfig |= (TX_LOOPBACK_BASEBAND<<TX_LOOPBACK_SHIFT);
- if(NIC_8187B == priv->card_8187){
- write_nic_dword(dev, TX_CONF, priv->TransmitConfig);
- byte = read_nic_byte(dev, MSR);
- byte |= MSR_LINK_ENEDCA;
- write_nic_byte(dev, MSR, byte);
- } else {
- byte = read_nic_byte(dev,CW_CONF);
- byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
- byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
- write_nic_byte(dev, CW_CONF, byte);
-
- byte = read_nic_byte(dev, TX_AGC_CTL);
- byte &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
- byte &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
- byte &= ~(1<<TX_AGC_CTL_FEEDBACK_ANT);
- write_nic_byte(dev, TX_AGC_CTL, byte);
-
- txconf= read_nic_dword(dev,TX_CONF);
-
-
- txconf = txconf &~ TX_LOOPBACK_MASK;
-
-#ifndef LOOP_TEST
- txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
-#else
- txconf = txconf | (TX_LOOPBACK_BASEBAND<<TX_LOOPBACK_SHIFT);
-#endif
- txconf = txconf &~ TCR_SRL_MASK;
- txconf = txconf &~ TCR_LRL_MASK;
-
- txconf = txconf | (priv->retry_data<<TX_LRLRETRY_SHIFT); // long
- txconf = txconf | (priv->retry_rts<<TX_SRLRETRY_SHIFT); // short
-
- txconf = txconf &~ (1<<TX_NOCRC_SHIFT);
-
- txconf = txconf &~ TCR_MXDMA_MASK;
- txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
-
- txconf = txconf | TCR_DISReqQsize;
- txconf = txconf | TCR_DISCW;
- txconf = txconf &~ TCR_SWPLCPLEN;
-
- txconf=txconf | (1<<TX_NOICV_SHIFT);
-
- write_nic_dword(dev,TX_CONF,txconf);
-
-#ifdef DEBUG_TX
- DMESG("txconf: %x %x",txconf,read_nic_dword(dev,TX_CONF));
-#endif
-
- cmd=read_nic_byte(dev,CMD);
- write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));
- }
-#endif
-}
-
-#if 0
-void rtl8192_beacon_tx_enable(struct net_device *dev)
-{
- struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
- priv->dma_poll_mask &=~(1<<TX_DMA_STOP_BEACON_SHIFT);
- rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
- write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
- rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
-}
-
-
-void rtl8192_
-_disable(struct net_device *dev)
-{
- struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
- priv->dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
- rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
- write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
- rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
}
-#endif
-
-
void rtl8192_rtx_disable(struct net_device *dev)
{
u8 cmd;
int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
{
- #if 0
- int i;
- u32 *tmp;
- struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
-
- priv->txbeaconring = (u32*)pci_alloc_consistent(priv->pdev,
- sizeof(u32)*8*count,
- &priv->txbeaconringdma);
- if (!priv->txbeaconring) return -1;
- for (tmp=priv->txbeaconring,i=0;i<count;i++){
- *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
- /*
- *(tmp+2) = (u32)dma_tmp;
- *(tmp+3) = bufsize;
- */
- if(i+1<count)
- *(tmp+4) = (u32)priv->txbeaconringdma+((i+1)*8*4);
- else
- *(tmp+4) = (u32)priv->txbeaconringdma;
-
- tmp=tmp+8;
- }
- #endif
return 0;
}
-#if 0
-void rtl8192_reset(struct net_device *dev)
-{
-
- //struct r8192_priv *priv = ieee80211_priv(dev);
- //u8 cr;
-
-
- /* make sure the analog power is on before
- * reset, otherwise reset may fail
- */
-#if 0
- if(NIC_8187 == priv->card_8187) {
- rtl8192_set_anaparam(dev, RTL8225_ANAPARAM_ON);
- rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
- rtl8192_irq_disable(dev);
- mdelay(200);
- write_nic_byte_E(dev,0x18,0x10);
- write_nic_byte_E(dev,0x18,0x11);
- write_nic_byte_E(dev,0x18,0x00);
- mdelay(200);
- }
-#endif
- printk("=====>reset?\n");
-#if 0
- cr=read_nic_byte(dev,CMD);
- cr = cr & 2;
- cr = cr | (1<<CMD_RST_SHIFT);
- write_nic_byte(dev,CMD,cr);
-
- force_pci_posting(dev);
-
- mdelay(200);
-
- if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT))
- RT_TRACE(COMP_ERR, "Card reset timeout!\n");
- else
- RT_TRACE(COMP_DOWN, "Card successfully reset\n");
-#endif
-#if 0
- if(NIC_8187 == priv->card_8187) {
-
- printk("This is RTL8187 Reset procedure\n");
- rtl8192_set_mode(dev,EPROM_CMD_LOAD);
- force_pci_posting(dev);
- mdelay(200);
-
- /* after the eeprom load cycle, make sure we have
- * correct anaparams
- */
- rtl8192_set_anaparam(dev, RTL8225_ANAPARAM_ON);
- rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
- }
- else
-#endif
- printk("This is RTL8187B Reset procedure\n");
-
-}
-#endif
inline u16 ieeerate2rtlrate(int rate)
{
switch(rate){
return status;
}
-#if 0
-void rtl8192_tx_queues_stop(struct net_device *dev)
-{
- //struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
- u8 dma_poll_mask = (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
- dma_poll_mask |= (1<<TX_DMA_STOP_HIPRIORITY_SHIFT);
- dma_poll_mask |= (1<<TX_DMA_STOP_NORMPRIORITY_SHIFT);
- dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
-
- rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
- write_nic_byte(dev,TX_DMA_POLLING,dma_poll_mask);
- rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
-}
-#endif
-
-void rtl8192_data_hard_stop(struct net_device *dev)
+void rtl8192_data_hard_stop(struct net_device *dev)
{
//FIXME !!
- #if 0
- struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
- priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
- rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
- write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
- rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
- #endif
}
void rtl8192_data_hard_resume(struct net_device *dev)
{
// FIXME !!
- #if 0
- struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
- priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
- rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
- write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
- rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
- #endif
}
/* this function TX data frames when the ieee80211 stack requires this.
atomic_dec(&priv->tx_pending[queue_index]);
}
-#if 0 //we need to send zero byte packet just after 512 byte(64 byte)packet is transmitted, or we will halt. It will greatly reduced available page in FW, and ruin our throughput. WB 2008.08.27
- if(BufLen > 0 && ((BufLen % 512 == 0)||(BufLen % 64 == 0))) {
- bToSend0Byte = true;
- }
-
- bToSend0Byte = false;
- //
- // Note that, we at most handle 1 MPDU to send here, either
- // fragment or MPDU in wait queue.
- //
- if(!bToSend0Byte)
-#endif
{
//
// Handle HW Beacon:
// We had transfer our beacon frame to host controler at this moment.
//
-#if 0
- if(tcb_desc->tx_queue == BEACON_QUEUE)
- {
- priv->bSendingBeacon = FALSE;
- }
-#endif
//
// Caution:
// Handling the wait queue of command packets.
}
}
}
-
-#if 0
- else
- {
- RT_TRACE( COMP_SEND,"HalUsbOutComplete(%d): bToSend0Byte.\n", PipeIndex);
-
- //
- // In this case, we don't return skb now.
- // It will be returned when the 0-byte request completed.
- //
-
- //
- // Bulk out an 0-byte padding transfer.
- //
- HalUsbOut0Byte(pAdapter, PipeIndex, skb);
- }
-
-#endif
}
void rtl8192_beacon_stop(struct net_device *dev)
priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
//LZM MOD 090303 HW_VAR_ACK_PREAMBLE
-#ifdef RTL8192SU
if(0)
{
u8 tmp = 0;
tmp |= 0x80;
write_nic_byte(dev, RRSR+2, tmp);
}
-#else
- {
- u32 tmp = 0;
- tmp = priv->basic_rate;
- if (priv->short_preamble)
- tmp |= BRSR_AckShortPmb;
- write_nic_dword(dev, RRSR, tmp);
- }
-#endif
if (net->mode & (IEEE_G|IEEE_N_24G))
{
#if 1
void rtl819xusb_beacon_tx(struct net_device *dev,u16 tx_rate)
{
-
-#if 0
- struct r8192_priv *priv = ieee80211_priv(dev);
- struct sk_buff *skb;
- int i = 0;
- //u8 cr;
-
- rtl8192_net_update(dev);
-
- skb = ieee80211_get_beacon(priv->ieee80211);
- if(!skb){
- DMESG("not enought memory for allocating beacon");
- return;
- }
-
-
- write_nic_byte(dev, BQREQ, read_nic_byte(dev, BQREQ) | (1<<7));
-
- i=0;
- //while(!read_nic_byte(dev,BQREQ & (1<<7)))
- while( (read_nic_byte(dev, BQREQ) & (1<<7)) == 0 )
- {
- msleep_interruptible_rtl(HZ/2);
- if(i++ > 10){
- DMESGW("get stuck to wait HW beacon to be ready");
- return ;
- }
- }
- skb->cb[0] = NORM_PRIORITY;
- skb->cb[1] = 0; //morefragment = 0
- skb->cb[2] = ieeerate2rtlrate(tx_rate);
-
- rtl8192_tx(dev,skb);
-
-#endif
}
#endif
inline u8 rtl8192_IsWirelessBMode(u16 rate)
void rtl819xU_cmd_isr(struct urb *tx_cmd_urb, struct pt_regs *regs)
{
-#if 0
- struct net_device *dev = (struct net_device*)tx_cmd_urb->context;
- struct r8192_priv *priv = ieee80211_priv(dev);
- int last_init_packet = 0;
- u8 *ptr_cmd_buf;
- u16 cmd_buf_len;
-
- if(tx_cmd_urb->status != 0) {
- priv->pFirmware.firmware_seg_index = 0; //only begin transter, should it can be set to 1
- }
-
- /* Free the urb and the corresponding buf for common Tx cmd packet, or
- * last segment of each firmware img.
- */
- if((priv->pFirmware.firmware_seg_index == 0) ||(priv->pFirmware.firmware_seg_index == priv->pFirmware.firmware_seg_maxnum)) {
- priv->pFirmware.firmware_seg_index = 0;//only begin transter, should it can be set to 1
- } else {
- /* prepare for last transfer */
- /* update some infomation for */
- /* last segment of the firmware img need indicate to device */
- priv->pFirmware.firmware_seg_index++;
- if(priv->pFirmware.firmware_seg_index == priv->pFirmware.firmware_seg_maxnum) {
- last_init_packet = 1;
- }
-
- cmd_buf_len = priv->pFirmware.firmware_seg_container[priv->pFirmware.firmware_seg_index-1].seg_size;
- ptr_cmd_buf = priv->pFfirmware.firmware_seg_container[priv->pFfirmware.firmware_seg_index-1].seg_ptr;
- rtl819xU_tx_cmd(dev, ptr_cmd_buf, cmd_buf_len, last_init_packet, DESC_PACKET_TYPE_INIT);
- }
-
- kfree(tx_cmd_urb->transfer_buffer);
-#endif
usb_free_urb(tx_cmd_urb);
}
return priv->txqueue_to_outpipemap[tx_queue];
}
-#ifdef RTL8192SU
short rtl8192SU_tx_cmd(struct net_device *dev, struct sk_buff *skb)
{
struct r8192_priv *priv = ieee80211_priv(dev);
idx_pipe = txqueue2outpipe(priv,queue_index);
//printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,queue_index,priv->RtOutPipes[idx_pipe]);
-#ifdef JOHN_DUMP_TXDESC
- int i;
- printk("Len = %d\n", skb->len);
- for (i = 0; i < 8; i++)
- printk("%2.2x ", *((u8*)skb->data+i));
- printk("\n");
-#endif
-
usb_fill_bulk_urb(tx_urb,
priv->udev,
usb_sndbulkpipe(priv->udev,priv->RtOutPipes[idx_pipe]),
return -1;
}
}
-#else
-short rtl819xU_tx_cmd(struct net_device *dev, struct sk_buff *skb)
-{
- struct r8192_priv *priv = ieee80211_priv(dev);
- //u8 *tx;
- int status;
- struct urb *tx_urb;
- //int urb_buf_len;
- unsigned int idx_pipe;
- tx_desc_cmd_819x_usb *pdesc = (tx_desc_cmd_819x_usb *)skb->data;
- cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
- u8 queue_index = tcb_desc->queue_index;
-
- //printk("\n %s::queue_index = %d\n",__FUNCTION__, queue_index);
- atomic_inc(&priv->tx_pending[queue_index]);
-
- tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
- if(!tx_urb){
- dev_kfree_skb(skb);
- return -ENOMEM;
- }
-
- memset(pdesc, 0, USB_HWDESC_HEADER_LEN);
- /* Tx descriptor ought to be set according to the skb->cb */
- pdesc->FirstSeg = 1;//bFirstSeg;
- pdesc->LastSeg = 1;//bLastSeg;
- pdesc->CmdInit = tcb_desc->bCmdOrInit;
- pdesc->TxBufferSize = tcb_desc->txbuf_size;
- pdesc->OWN = 1;
- pdesc->LINIP = tcb_desc->bLastIniPkt;
-
- //----------------------------------------------------------------------------
- // Fill up USB_OUT_CONTEXT.
- //----------------------------------------------------------------------------
- // Get index to out pipe from specified QueueID.
- idx_pipe = txqueue2outpipe(priv,queue_index);
-#ifdef JOHN_DUMP_TXDESC
- int i;
- printk("<Tx descriptor>--rate %x---",rate);
- for (i = 0; i < 8; i++)
- printk("%8x ", tx[i]);
- printk("\n");
-#endif
- usb_fill_bulk_urb(tx_urb,priv->udev, usb_sndbulkpipe(priv->udev,idx_pipe), \
- skb->data, skb->len, rtl8192_tx_isr, skb);
-
- status = usb_submit_urb(tx_urb, GFP_ATOMIC);
- if (!status){
- return 0;
- }else{
- DMESGE("Error TX CMD URB, error %d",
- status);
- return -1;
- }
-}
-#endif
/*
* Mapping Software/Hardware descriptor queue id to "Queue Select Field"
return QueueSelect;
}
-#ifdef RTL8192SU
u8 MRateToHwRate8190Pci(u8 rate)
{
u8 ret = DESC92S_RATE1M;
}
return ret;
}
-#else
-u8 MRateToHwRate8190Pci(u8 rate)
-{
- u8 ret = DESC90_RATE1M;
-
- switch(rate) {
- case MGN_1M: ret = DESC90_RATE1M; break;
- case MGN_2M: ret = DESC90_RATE2M; break;
- case MGN_5_5M: ret = DESC90_RATE5_5M; break;
- case MGN_11M: ret = DESC90_RATE11M; break;
- case MGN_6M: ret = DESC90_RATE6M; break;
- case MGN_9M: ret = DESC90_RATE9M; break;
- case MGN_12M: ret = DESC90_RATE12M; break;
- case MGN_18M: ret = DESC90_RATE18M; break;
- case MGN_24M: ret = DESC90_RATE24M; break;
- case MGN_36M: ret = DESC90_RATE36M; break;
- case MGN_48M: ret = DESC90_RATE48M; break;
- case MGN_54M: ret = DESC90_RATE54M; break;
-
- // HT rate since here
- case MGN_MCS0: ret = DESC90_RATEMCS0; break;
- case MGN_MCS1: ret = DESC90_RATEMCS1; break;
- case MGN_MCS2: ret = DESC90_RATEMCS2; break;
- case MGN_MCS3: ret = DESC90_RATEMCS3; break;
- case MGN_MCS4: ret = DESC90_RATEMCS4; break;
- case MGN_MCS5: ret = DESC90_RATEMCS5; break;
- case MGN_MCS6: ret = DESC90_RATEMCS6; break;
- case MGN_MCS7: ret = DESC90_RATEMCS7; break;
- case MGN_MCS8: ret = DESC90_RATEMCS8; break;
- case MGN_MCS9: ret = DESC90_RATEMCS9; break;
- case MGN_MCS10: ret = DESC90_RATEMCS10; break;
- case MGN_MCS11: ret = DESC90_RATEMCS11; break;
- case MGN_MCS12: ret = DESC90_RATEMCS12; break;
- case MGN_MCS13: ret = DESC90_RATEMCS13; break;
- case MGN_MCS14: ret = DESC90_RATEMCS14; break;
- case MGN_MCS15: ret = DESC90_RATEMCS15; break;
- case (0x80|0x20): ret = DESC90_RATEMCS32; break;
-
- default: break;
- }
- return ret;
-}
-#endif
u8 QueryIsShort(u8 TxHT, u8 TxRate, cb_desc *tcb_desc)
{
}
-#ifdef RTL8192SU
/*
* The tx procedure is just as following, skb->cb will contain all the following
*information: * priority, morefrag, rate, &dev.
u16 MPDUOverhead = 0;
//RT_DEBUG_DATA(COMP_SEND, tcb_desc, sizeof(cb_desc));
-#if 0
- /* Added by Annie for filling Len_Adjust field. 2005-12-14. */
- RT_ENC_ALG EncAlg = NO_Encryption;
-#endif
-
-
pend = atomic_read(&priv->tx_pending[tcb_desc->queue_index]);
/* we are locked here so the two atomic_read and inc are executed
* without interleaves * !!! For debug purpose */
//tx_desc->SecCAMID= 0;//92su del
tx_desc->RaBRSRID= tcb_desc->RATRIndex;
//#ifdef RTL8192S_PREPARE_FOR_NORMAL_RELEASE
-#if 0//LZM 090219
- tx_desc->RaBRSRID= 1;
-#endif
-#if 0
- /* Fill security related */
- if( pTcb->bEncrypt && !Adapter->MgntInfo.SecurityInfo.SWTxEncryptFlag)
- {
- EncAlg = SecGetEncryptionOverhead(
- Adapter,
- &EncryptionMPDUHeadOverhead,
- &EncryptionMPDUTailOverhead,
- NULL,
- NULL,
- FALSE,
- FALSE);
- //2004/07/22, kcwu, EncryptionMPDUHeadOverhead has been added in previous code
- //MPDUOverhead = EncryptionMPDUHeadOverhead + EncryptionMPDUTailOverhead;
- MPDUOverhead = EncryptionMPDUTailOverhead;
- tx_desc->NoEnc = 0;
- RT_TRACE(COMP_SEC, DBG_LOUD, ("******We in the loop SecCAMID is %d SecDescAssign is %d The Sec is %d********\n",tx_desc->SecCAMID,tx_desc->SecDescAssign,EncAlg));
- //CamDumpAll(Adapter);
- }
- else
-#endif
{
MPDUOverhead = 0;
//tx_desc->NoEnc = 1;//92su del
}
-#if 0
- switch(EncAlg){
- case NO_Encryption:
- tx_desc->SecType = 0x0;
- break;
- case WEP40_Encryption:
- case WEP104_Encryption:
- tx_desc->SecType = 0x1;
- break;
- case TKIP_Encryption:
- tx_desc->SecType = 0x2;
- break;
- case AESCCMP_Encryption:
- tx_desc->SecType = 0x3;
- break;
- default:
- tx_desc->SecType = 0x0;
- break;
- }
-#else
+
tx_desc->SecType = 0x0;
-#endif
+
if (tcb_desc->bHwSec)
{
switch (priv->ieee80211->pairwise_key_type)
/* Fill fields that are required to be initialized in all of the descriptors */
//DWORD 0
-#if 0
- tx_desc->FirstSeg = (tcb_desc->bFirstSeg)? 1:0;
- tx_desc->LastSeg = (tcb_desc->bLastSeg)?1:0;
-#else
tx_desc->FirstSeg = 1;
tx_desc->LastSeg = 1;
-#endif
tx_desc->OWN = 1;
{
tx_desc->TxBufferSize = (u32)(skb->len);//92su mod FIXLZM
}
-#if 0
- RT_TRACE(COMP_FPGA, DBG_LOUD, ("(1)TxFillDescriptor8192SUsb(): DataRate(%#x)\n", pTcb->DataRate));
- RT_TRACE(COMP_FPGA, DBG_LOUD, ("(2)TxFillDescriptor8192SUsb(): bTxUseDriverAssingedRate(%#x)\n", pTcb->bTxUseDriverAssingedRate));
- RT_TRACE(COMP_FPGA, DBG_LOUD, ("(3)TxFillDescriptor8192SUsb(): bAMPDUEnable(%d)\n", pTcb->bAMPDUEnable));
- RT_TRACE(COMP_FPGA, DBG_LOUD, ("(4)TxFillDescriptor8192SUsb(): bRTSEnable(%d)\n", pTcb->bRTSEnable));
- RT_TRACE(COMP_FPGA, DBG_LOUD, ("(5)TxFillDescriptor8192SUsb(): RTSRate(%#x)\n", pTcb->RTSRate));
- RT_TRACE(COMP_FPGA, DBG_LOUD, ("(6)TxFillDescriptor8192SUsb(): bCTSEnable(%d)\n", pTcb->bCTSEnable));
- RT_TRACE(COMP_FPGA, DBG_LOUD, ("(7)TxFillDescriptor8192SUsb(): bUseShortGI(%d)\n", pTcb->bUseShortGI));
- RT_TRACE(COMP_FPGA, DBG_LOUD, ("(8)TxFillDescriptor8192SUsb(): bPacketBW(%d)\n", pTcb->bPacketBW));
- RT_TRACE(COMP_FPGA, DBG_LOUD, ("(9)TxFillDescriptor8192SUsb(): CurrentChannelBW(%d)\n", pHalData->CurrentChannelBW));
- RT_TRACE(COMP_FPGA, DBG_LOUD, ("(10)TxFillDescriptor8192SUsb(): bTxDisableRateFallBack(%d)\n", pTcb->bTxDisableRateFallBack));
- RT_TRACE(COMP_FPGA, DBG_LOUD, ("(11)TxFillDescriptor8192SUsb(): RATRIndex(%d)\n", pTcb->RATRIndex));
-#endif
-
/* Get index to out pipe from specified QueueID */
idx_pipe = txqueue2outpipe(priv,tcb_desc->queue_index);
//printk("=============>%s queue_index:%d, outpipe:%d\n", __func__,tcb_desc->queue_index,priv->RtOutPipes[idx_pipe]);
return -1;
}
}
-#else
-/*
- * The tx procedure is just as following,
- * skb->cb will contain all the following information,
- * priority, morefrag, rate, &dev.
- * */
-short rtl8192_tx(struct net_device *dev, struct sk_buff* skb)
+void rtl8192SU_net_update(struct net_device *dev)
{
+
struct r8192_priv *priv = ieee80211_priv(dev);
- cb_desc *tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
- tx_desc_819x_usb *tx_desc = (tx_desc_819x_usb *)skb->data;
- tx_fwinfo_819x_usb *tx_fwinfo = (tx_fwinfo_819x_usb *)(skb->data + USB_HWDESC_HEADER_LEN);
- struct usb_device *udev = priv->udev;
- int pend;
- int status;
- struct urb *tx_urb = NULL, *tx_urb_zero = NULL;
- //int urb_len;
- unsigned int idx_pipe;
-// RT_DEBUG_DATA(COMP_SEND, tcb_desc, sizeof(cb_desc));
-#if 0
- /* Added by Annie for filling Len_Adjust field. 2005-12-14. */
- RT_ENC_ALG EncAlg = NO_Encryption;
-#endif
-// printk("=============> %s\n", __FUNCTION__);
- pend = atomic_read(&priv->tx_pending[tcb_desc->queue_index]);
- /* we are locked here so the two atomic_read and inc are executed
- * without interleaves
- * !!! For debug purpose
- */
- if( pend > MAX_TX_URB){
-#if 0
- switch (tcb_desc->queue_index) {
- case VO_PRIORITY:
- priv->stats.txvodrop++;
- break;
- case VI_PRIORITY:
- priv->stats.txvidrop++;
- break;
- case BE_PRIORITY:
- priv->stats.txbedrop++;
- break;
- default://BK_PRIORITY
- priv->stats.txbkdrop++;
- break;
- }
-#endif
- printk("To discard skb packet!\n");
- dev_kfree_skb_any(skb);
- return -1;
- }
+ struct ieee80211_device* ieee = priv->ieee80211;
+ struct ieee80211_network *net = &priv->ieee80211->current_network;
+ //u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
+ u16 rate_config = 0;
+ u32 regTmp = 0;
+ u8 rateIndex = 0;
+ u8 retrylimit = 0x30;
+ u16 cap = net->capability;
- tx_urb = usb_alloc_urb(0,GFP_ATOMIC);
- if(!tx_urb){
- dev_kfree_skb_any(skb);
- return -ENOMEM;
- }
+ priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
- /* Fill Tx firmware info */
- memset(tx_fwinfo,0,sizeof(tx_fwinfo_819x_usb));
- /* DWORD 0 */
- tx_fwinfo->TxHT = (tcb_desc->data_rate&0x80)?1:0;
- tx_fwinfo->TxRate = MRateToHwRate8190Pci(tcb_desc->data_rate);
- tx_fwinfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
- tx_fwinfo->Short = QueryIsShort(tx_fwinfo->TxHT, tx_fwinfo->TxRate, tcb_desc);
- if(tcb_desc->bAMPDUEnable) {//AMPDU enabled
- tx_fwinfo->AllowAggregation = 1;
- /* DWORD 1 */
- tx_fwinfo->RxMF = tcb_desc->ampdu_factor;
- tx_fwinfo->RxAMD = tcb_desc->ampdu_density&0x07;//ampdudensity
- } else {
- tx_fwinfo->AllowAggregation = 0;
- /* DWORD 1 */
- tx_fwinfo->RxMF = 0;
- tx_fwinfo->RxAMD = 0;
- }
+//HW_VAR_BASIC_RATE
+ //update Basic rate: RR, BRSR
+ rtl8192_config_rate(dev, &rate_config); //HalSetBrateCfg
- /* Protection mode related */
- tx_fwinfo->RtsEnable = (tcb_desc->bRTSEnable)?1:0;
- tx_fwinfo->CtsEnable = (tcb_desc->bCTSEnable)?1:0;
- tx_fwinfo->RtsSTBC = (tcb_desc->bRTSSTBC)?1:0;
- tx_fwinfo->RtsHT = (tcb_desc->rts_rate&0x80)?1:0;
- tx_fwinfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
- tx_fwinfo->RtsSubcarrier = (tx_fwinfo->RtsHT==0)?(tcb_desc->RTSSC):0;
- tx_fwinfo->RtsBandwidth = (tx_fwinfo->RtsHT==1)?((tcb_desc->bRTSBW)?1:0):0;
- tx_fwinfo->RtsShort = (tx_fwinfo->RtsHT==0)?(tcb_desc->bRTSUseShortPreamble?1:0):\
- (tcb_desc->bRTSUseShortGI?1:0);
+ priv->basic_rate = rate_config = rate_config & 0x15f;
- /* Set Bandwidth and sub-channel settings. */
- if(priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40)
+ // Set RRSR rate table.
+ write_nic_byte(dev, RRSR, rate_config&0xff);
+ write_nic_byte(dev, RRSR+1, (rate_config>>8)&0xff);
+
+ // Set RTS initial rate
+ while(rate_config > 0x1)
{
- if(tcb_desc->bPacketBW) {
- tx_fwinfo->TxBandwidth = 1;
- tx_fwinfo->TxSubCarrier = 0; //By SD3's Jerry suggestion, use duplicated mode
- } else {
- tx_fwinfo->TxBandwidth = 0;
- tx_fwinfo->TxSubCarrier = priv->nCur40MhzPrimeSC;
- }
- } else {
- tx_fwinfo->TxBandwidth = 0;
- tx_fwinfo->TxSubCarrier = 0;
+ rate_config = (rate_config>> 1);
+ rateIndex++;
}
+ write_nic_byte(dev, INIRTSMCS_SEL, rateIndex);
+//HW_VAR_BASIC_RATE
- /* Fill Tx descriptor */
- memset(tx_desc, 0, sizeof(tx_desc_819x_usb));
- /* DWORD 0 */
- tx_desc->LINIP = 0;
- tx_desc->CmdInit = 1;
- tx_desc->Offset = sizeof(tx_fwinfo_819x_usb) + 8;
+ //set ack preample
+ regTmp = (priv->nCur40MhzPrimeSC) << 5;
+ if (priv->short_preamble)
+ regTmp |= 0x80;
+ write_nic_byte(dev, RRSR+2, regTmp);
- {
- tx_desc->PktSize = (skb->len - TX_PACKET_SHIFT_BYTES) & 0xffff;
- }
+ write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
+ write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
- /*DWORD 1*/
- tx_desc->SecCAMID= 0;
- tx_desc->RATid = tcb_desc->RATRIndex;
-#if 0
- /* Fill security related */
- if( pTcb->bEncrypt && !Adapter->MgntInfo.SecurityInfo.SWTxEncryptFlag)
- {
- EncAlg = SecGetEncryptionOverhead(
- Adapter,
- &EncryptionMPDUHeadOverhead,
- &EncryptionMPDUTailOverhead,
- NULL,
- NULL,
- FALSE,
- FALSE);
- //2004/07/22, kcwu, EncryptionMPDUHeadOverhead has been added in previous code
- //MPDUOverhead = EncryptionMPDUHeadOverhead + EncryptionMPDUTailOverhead;
- MPDUOverhead = EncryptionMPDUTailOverhead;
- tx_desc->NoEnc = 0;
- RT_TRACE(COMP_SEC, DBG_LOUD, ("******We in the loop SecCAMID is %d SecDescAssign is %d The Sec is %d********\n",tx_desc->SecCAMID,tx_desc->SecDescAssign,EncAlg));
- //CamDumpAll(Adapter);
+ write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
+ //2008.10.24 added by tynli for beacon changed.
+ PHY_SetBeaconHwReg( dev, net->beacon_interval);
+
+ rtl8192_update_cap(dev, cap);
+
+ if (ieee->iw_mode == IW_MODE_ADHOC){
+ retrylimit = 7;
+ //we should enable ibss interrupt here, but disable it temporarily
+ if (0){
+ priv->irq_mask |= (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
+ //rtl8192_irq_disable(dev);
+ //rtl8192_irq_enable(dev);
+ }
}
- else
-#endif
- {
- //MPDUOverhead = 0;
- tx_desc->NoEnc = 1;
- }
-#if 0
- switch(EncAlg){
- case NO_Encryption:
- tx_desc->SecType = 0x0;
- break;
- case WEP40_Encryption:
- case WEP104_Encryption:
- tx_desc->SecType = 0x1;
- break;
- case TKIP_Encryption:
- tx_desc->SecType = 0x2;
- break;
- case AESCCMP_Encryption:
- tx_desc->SecType = 0x3;
- break;
- default:
- tx_desc->SecType = 0x0;
- break;
- }
-#else
- tx_desc->SecType = 0x0;
-#endif
- if (tcb_desc->bHwSec)
- {
- switch (priv->ieee80211->pairwise_key_type)
- {
- case KEY_TYPE_WEP40:
- case KEY_TYPE_WEP104:
- tx_desc->SecType = 0x1;
- tx_desc->NoEnc = 0;
- break;
- case KEY_TYPE_TKIP:
- tx_desc->SecType = 0x2;
- tx_desc->NoEnc = 0;
- break;
- case KEY_TYPE_CCMP:
- tx_desc->SecType = 0x3;
- tx_desc->NoEnc = 0;
- break;
- case KEY_TYPE_NA:
- tx_desc->SecType = 0x0;
- tx_desc->NoEnc = 1;
- break;
- }
- }
-
- tx_desc->QueueSelect = MapHwQueueToFirmwareQueue(tcb_desc->queue_index);
- tx_desc->TxFWInfoSize = sizeof(tx_fwinfo_819x_usb);
-
- tx_desc->DISFB = tcb_desc->bTxDisableRateFallBack;
- tx_desc->USERATE = tcb_desc->bTxUseDriverAssingedRate;
-
- /* Fill fields that are required to be initialized in all of the descriptors */
- //DWORD 0
-#if 0
- tx_desc->FirstSeg = (tcb_desc->bFirstSeg)? 1:0;
- tx_desc->LastSeg = (tcb_desc->bLastSeg)?1:0;
-#else
- tx_desc->FirstSeg = 1;
- tx_desc->LastSeg = 1;
-#endif
- tx_desc->OWN = 1;
-
- {
- //DWORD 2
- tx_desc->TxBufferSize = (u32)(skb->len - USB_HWDESC_HEADER_LEN);
- }
- /* Get index to out pipe from specified QueueID */
- idx_pipe = txqueue2outpipe(priv,tcb_desc->queue_index);
-
- //RT_DEBUG_DATA(COMP_SEND,tx_fwinfo,sizeof(tx_fwinfo_819x_usb));
- //RT_DEBUG_DATA(COMP_SEND,tx_desc,sizeof(tx_desc_819x_usb));
-
- /* To submit bulk urb */
- usb_fill_bulk_urb(tx_urb,udev,
- usb_sndbulkpipe(udev,idx_pipe), skb->data,
- skb->len, rtl8192_tx_isr, skb);
-
- status = usb_submit_urb(tx_urb, GFP_ATOMIC);
- if (!status){
-//we need to send 0 byte packet whenever 512N bytes/64N(HIGN SPEED/NORMAL SPEED) bytes packet has been transmitted. Otherwise, it will be halt to wait for another packet. WB. 2008.08.27
- bool bSend0Byte = false;
- u8 zero = 0;
- if(udev->speed == USB_SPEED_HIGH)
- {
- if (skb->len > 0 && skb->len % 512 == 0)
- bSend0Byte = true;
- }
- else
- {
- if (skb->len > 0 && skb->len % 64 == 0)
- bSend0Byte = true;
- }
- if (bSend0Byte)
- {
-#if 1
- tx_urb_zero = usb_alloc_urb(0,GFP_ATOMIC);
- if(!tx_urb_zero){
- RT_TRACE(COMP_ERR, "can't alloc urb for zero byte\n");
- return -ENOMEM;
- }
- usb_fill_bulk_urb(tx_urb_zero,udev,
- usb_sndbulkpipe(udev,idx_pipe), &zero,
- 0, tx_zero_isr, dev);
- status = usb_submit_urb(tx_urb_zero, GFP_ATOMIC);
- if (status){
- RT_TRACE(COMP_ERR, "Error TX URB for zero byte %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]), status);
- return -1;
- }
-#endif
- }
- dev->trans_start = jiffies;
- atomic_inc(&priv->tx_pending[tcb_desc->queue_index]);
- return 0;
- }else{
- RT_TRACE(COMP_ERR, "Error TX URB %d, error %d", atomic_read(&priv->tx_pending[tcb_desc->queue_index]),
- status);
- return -1;
- }
-}
-#endif
-
-#if 0
-void rtl8192_set_rate(struct net_device *dev)
-{
- int i;
- u16 word;
- int basic_rate,min_rr_rate,max_rr_rate;
-
-// struct r8192_priv *priv = ieee80211_priv(dev);
-
- //if (ieee80211_is_54g(priv->ieee80211->current_network) &&
-// priv->ieee80211->state == IEEE80211_LINKED){
- basic_rate = ieeerate2rtlrate(240);
- min_rr_rate = ieeerate2rtlrate(60);
- max_rr_rate = ieeerate2rtlrate(240);
-
-//
-// }else{
-// basic_rate = ieeerate2rtlrate(20);
-// min_rr_rate = ieeerate2rtlrate(10);
-// max_rr_rate = ieeerate2rtlrate(110);
-// }
-
- write_nic_byte(dev, RESP_RATE,
- max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT);
-
- //word = read_nic_word(dev, BRSR);
- word = read_nic_word(dev, BRSR_8187);
- word &= ~BRSR_MBR_8185;
-
-
- for(i=0;i<=basic_rate;i++)
- word |= (1<<i);
-
- //write_nic_word(dev, BRSR, word);
- write_nic_word(dev, BRSR_8187, word);
- //DMESG("RR:%x BRSR: %x", read_nic_byte(dev,RESP_RATE), read_nic_word(dev,BRSR));
-}
-#endif
-
-
-#ifdef RTL8192SU
-void rtl8192SU_net_update(struct net_device *dev)
-{
-
- struct r8192_priv *priv = ieee80211_priv(dev);
- struct ieee80211_device* ieee = priv->ieee80211;
- struct ieee80211_network *net = &priv->ieee80211->current_network;
- //u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
- u16 rate_config = 0;
- u32 regTmp = 0;
- u8 rateIndex = 0;
- u8 retrylimit = 0x30;
- u16 cap = net->capability;
-
- priv->short_preamble = cap & WLAN_CAPABILITY_SHORT_PREAMBLE;
-
-//HW_VAR_BASIC_RATE
- //update Basic rate: RR, BRSR
- rtl8192_config_rate(dev, &rate_config); //HalSetBrateCfg
-
- priv->basic_rate = rate_config = rate_config & 0x15f;
-
- // Set RRSR rate table.
- write_nic_byte(dev, RRSR, rate_config&0xff);
- write_nic_byte(dev, RRSR+1, (rate_config>>8)&0xff);
-
- // Set RTS initial rate
- while(rate_config > 0x1)
- {
- rate_config = (rate_config>> 1);
- rateIndex++;
- }
- write_nic_byte(dev, INIRTSMCS_SEL, rateIndex);
-//HW_VAR_BASIC_RATE
-
- //set ack preample
- regTmp = (priv->nCur40MhzPrimeSC) << 5;
- if (priv->short_preamble)
- regTmp |= 0x80;
- write_nic_byte(dev, RRSR+2, regTmp);
-
- write_nic_dword(dev,BSSIDR,((u32*)net->bssid)[0]);
- write_nic_word(dev,BSSIDR+4,((u16*)net->bssid)[2]);
-
- write_nic_word(dev, BCN_INTERVAL, net->beacon_interval);
- //2008.10.24 added by tynli for beacon changed.
- PHY_SetBeaconHwReg( dev, net->beacon_interval);
-
- rtl8192_update_cap(dev, cap);
-
- if (ieee->iw_mode == IW_MODE_ADHOC){
- retrylimit = 7;
- //we should enable ibss interrupt here, but disable it temporarily
- if (0){
- priv->irq_mask |= (IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
- //rtl8192_irq_disable(dev);
- //rtl8192_irq_enable(dev);
- }
- }
- else{
- if (0){
- priv->irq_mask &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
- //rtl8192_irq_disable(dev);
- //rtl8192_irq_enable(dev);
- }
+ else{
+ if (0){
+ priv->irq_mask &= ~(IMR_BcnInt | IMR_BcnInt | IMR_TBDOK | IMR_TBDER);
+ //rtl8192_irq_disable(dev);
+ //rtl8192_irq_enable(dev);
+ }
}
priv->ShortRetryLimit = priv->LongRetryLimit = retrylimit;
printk("<=====%s 2\n", __func__);
}
-#else
-extern void rtl8192_update_ratr_table(struct net_device* dev);
-void rtl8192_link_change(struct net_device *dev)
-{
-// int i;
-
- struct r8192_priv *priv = ieee80211_priv(dev);
- struct ieee80211_device* ieee = priv->ieee80211;
- //write_nic_word(dev, BCN_INTR_ITV, net->beacon_interval);
- if (ieee->state == IEEE80211_LINKED)
- {
- rtl8192_net_update(dev);
- rtl8192_update_ratr_table(dev);
-#if 1
- //add this as in pure N mode, wep encryption will use software way, but there is no chance to set this as wep will not set group key in wext. WB.2008.07.08
- if ((KEY_TYPE_WEP40 == ieee->pairwise_key_type) || (KEY_TYPE_WEP104 == ieee->pairwise_key_type))
- EnableHWSecurityConfig8192(dev);
-#endif
- }
- /*update timing params*/
-// RT_TRACE(COMP_CH, "========>%s(), chan:%d\n", __FUNCTION__, priv->chan);
-// rtl8192_set_chan(dev, priv->chan);
- if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC)
- {
- u32 reg = 0;
- reg = read_nic_dword(dev, RCR);
- if (priv->ieee80211->state == IEEE80211_LINKED)
- priv->ReceiveConfig = reg |= RCR_CBSSID;
- else
- priv->ReceiveConfig = reg &= ~RCR_CBSSID;
- write_nic_dword(dev, RCR, reg);
- }
-
-// rtl8192_set_rxconf(dev);
-}
-#endif
static struct ieee80211_qos_parameters def_qos_parameters = {
{3,3,3,3},/* cw_min */
/* handle manage frame frame beacon and probe response */
static int rtl8192_handle_beacon(struct net_device * dev,
- struct ieee80211_beacon * beacon,
- struct ieee80211_network * network)
+ struct ieee80211_probe_response *beacon,
+ struct ieee80211_network *network)
{
struct r8192_priv *priv = ieee80211_priv(dev);
&network->qos_data.parameters,\
sizeof(struct ieee80211_qos_parameters));
priv->ieee80211->current_network.qos_data.active = 1;
-#if 0
- if((priv->ieee80211->current_network.qos_data.param_count != \
- network->qos_data.param_count))
-#endif
{
set_qos_param = 1;
/* update qos parameter for current network */
return true;
}
-#if 0
- //In here we discuss with SD4 David. He think we still can send TKIP in broadcast group key in MCS rate.
- //We can't force in G mode if Pairwie key is AES and group key is TKIP
- if((pSecInfo->GroupEncAlgorithm == WEP104_Encryption) || (pSecInfo->GroupEncAlgorithm == WEP40_Encryption) ||
- (pSecInfo->PairwiseEncAlgorithm == WEP104_Encryption) ||
- (pSecInfo->PairwiseEncAlgorithm == WEP40_Encryption) || (pSecInfo->PairwiseEncAlgorithm == TKIP_Encryption))
- {
- return false;
- }
- else
- return true;
-#endif
return true;
#endif
}
struct ieee80211_device* ieee = priv->ieee80211;
// Added by Roger, 2008.08.29.
-#ifdef RTL8192SU
return false;
-#endif
if(ieee->bHalfWirelessN24GMode == true)
Reval = true;
#ifdef TO_DO_LIST //// TODO: this function doesn't work well at this time, we shoud wait for FPGA
ActUpdateChannelAccessSetting( pAdapter, pHalData->CurrentWirelessMode, &pAdapter->MgntInfo.Info8185.ChannelAccessSetting );
#endif
-#ifdef RTL8192SU
//LZM 090306 usb crash here, mark it temp
//write_nic_word(dev, SIFS_OFDM, 0x0e0e);
-#endif
priv->ieee80211->mode = wireless_mode;
if ((wireless_mode == WIRELESS_MODE_N_24G) || (wireless_mode == WIRELESS_MODE_N_5G))
}
return 1;
}
-#if 0
-void rtl8192_rq_tx_ack(struct net_device *dev)
-{
- struct r8192_priv *priv = ieee80211_priv(dev);
- priv->ieee80211->ack_tx_to_ieee = 1;
-}
-#endif
+
void rtl8192_hw_sleep_down(struct net_device *dev)
{
RT_TRACE(COMP_POWER, "%s()============>come to sleep down\n", __FUNCTION__);
priv->ieee80211->InitialGainHandler = priv->ops->rtl819x_initial_gain;
priv->card_type = USB;
-#ifdef RTL8192SU
//1 RTL8192SU/
priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
priv->ieee80211->SetFwCmdHandler = HalSetFwCmd8192S;
//1 End
-#else
-
-#ifdef TO_DO_LIST
- if(Adapter->bInHctTest)
- {
- pHalData->ShortRetryLimit = 7;
- pHalData->LongRetryLimit = 7;
- }
-#endif
- {
- priv->ShortRetryLimit = 0x30;
- priv->LongRetryLimit = 0x30;
- }
- priv->EarlyRxThreshold = 7;
- priv->enable_gpio0 = 0;
- priv->TransmitConfig =
- // TCR_DurProcMode | //for RTL8185B, duration setting by HW
- //? TCR_DISReqQsize |
- (TCR_MXDMA_2048<<TCR_MXDMA_OFFSET)| // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
- (priv->ShortRetryLimit<<TCR_SRL_OFFSET)| // Short retry limit
- (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit
- (false ? TCR_SAT: 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
-#ifdef TO_DO_LIST
- if(Adapter->bInHctTest)
- pHalData->ReceiveConfig = pHalData->CSMethod |
- RCR_AMF | RCR_ADF | //RCR_AAP | //accept management/data
- //guangan200710
- RCR_ACF | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
- RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
- RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
- ((u32)7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
- (pHalData->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
- (pHalData->EarlyRxThreshold == 7 ? RCR_OnlyErlPkt:0);
- else
-
-#endif
- priv->ReceiveConfig =
- RCR_AMF | RCR_ADF | //accept management/data
- RCR_ACF | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
- RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
- //RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
- ((u32)7<<RCR_MXDMA_OFFSET)| // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
- (priv->EarlyRxThreshold<<RX_FIFO_THRESHOLD_SHIFT) | // Rx FIFO Threshold, 7: No Rx threshold.
- (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
-#endif
priv->AcmControl = 0;
priv->pFirmware = (rt_firmware*)vmalloc(sizeof(rt_firmware));
return *data;
}
-#ifdef RTL8192SU
u8 rtl8192SU_UsbOptionToEndPointNumber(u8 UsbOption)
{
u8 nEndPoint = 0;
}
-#if 0
-static void rtl8192SU_ReadAdapterInfo8192SEEPROM(struct net_device* dev)
+//
+// Description:
+// Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
+//
+// Assumption:
+// 1. CR9346 regiser has verified.
+// 2. PASSIVE_LEVEL (USB interface)
+//
+// Created by Roger, 2008.10.21.
+//
+void
+rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
{
- u16 EEPROMId = 0;
- u8 bLoad_From_EEPOM = false;
struct r8192_priv *priv = ieee80211_priv(dev);
- u16 tmpValue = 0;
- u8 tmpBuffer[30];
- int i;
-
- RT_TRACE(COMP_EPROM, "===========>%s()\n", __FUNCTION__);
+ u16 i,usValue;
+ u8 tmpU1b, tempval;
+ u16 EEPROMId;
+ u8 hwinfo[HWSET_MAX_SIZE_92S];
+ u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117
- write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
- udelay(10000);
- write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
+ RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
+ //
+ // <Roger_Note> The following operation are prevent Efuse leakage by turn on 2.5V.
+ // 2008.11.25.
+ //
+ tmpU1b = read_nic_byte(dev, EFUSE_TEST+3);
+ write_nic_byte(dev, EFUSE_TEST+3, tmpU1b|0x80);
+ //PlatformStallExecution(1000);
+ mdelay(10);
+ write_nic_byte(dev, EFUSE_TEST+3, (tmpU1b&(~BIT7)));
- EEPROMId = eprom_read(dev, 0); //first read EEPROM ID out;
- RT_TRACE(COMP_EPROM, "EEPROM ID is 0x%x\n", EEPROMId);
+ // Retrieve Chip version.
+ priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
+ RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
- if (EEPROMId != RTL8190_EEPROM_ID)
+ switch(priv->card_8192_version)
{
- priv->AutoloadFailFlag = true;
- RT_TRACE(COMP_ERR, "EEPROM ID is invalid(is 0x%x(should be 0x%x)\n", EEPROMId, RTL8190_EEPROM_ID);
- }
- else
- {
- priv->AutoloadFailFlag = false;
- bLoad_From_EEPOM = true;
- }
-
- if (bLoad_From_EEPOM)
- {
- tmpValue = eprom_read(dev, (EEPROM_VID>>1));
- priv->eeprom_vid = endian_swap(&tmpValue);
- priv->eeprom_pid = eprom_read(dev, (EEPROM_PID>>1));
-
- // Version ID, Channel plan
- tmpValue = eprom_read(dev, (EEPROM_Version>>1));
- //pHalData->card_8192_version = (VERSION_8192S)((usValue&0x00ff));
- priv->eeprom_ChannelPlan =(tmpValue&0xff00)>>8;
- priv->bTXPowerDataReadFromEEPORM = true;
-
- // Customer ID, 0x00 and 0xff are reserved for Realtek.
- tmpValue = eprom_read(dev, (u16)(EEPROM_CustomID>>1)) ;
- priv->eeprom_CustomerID = (u8)( tmpValue & 0xff);
- priv->eeprom_SubCustomerID = (u8)((tmpValue & 0xff00)>>8);
- }
- else
- {
- priv->eeprom_vid = 0;
- priv->eeprom_pid = 0;
- //priv->card_8192_version = VERSION_8192SU_A;
- priv->eeprom_ChannelPlan = 0;
- priv->eeprom_CustomerID = 0;
- priv->eeprom_SubCustomerID = 0;
- }
- RT_TRACE(COMP_EPROM, "vid:0x%4x, pid:0x%4x, CustomID:0x%2x, ChanPlan:0x%x\n", priv->eeprom_vid, priv->eeprom_pid, priv->eeprom_CustomerID, priv->eeprom_ChannelPlan);
- //set channelplan from eeprom
- priv->ChannelPlan = priv->eeprom_ChannelPlan;// FIXLZM
-
- RT_TRACE(COMP_INIT, "EEPROMId = 0x%4x\n", EEPROMId);
- RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
- RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
- //RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM Version ID: 0x%2x\n", pHalData->VersionID));
- RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
- RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
- RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
-
- // Read USB optional function.
- if(bLoad_From_EEPOM)
- {
- tmpValue = eprom_read(dev, (EEPROM_USB_OPTIONAL>>1));
- priv->EEPROMUsbOption = (u8)(tmpValue&0xff);
- }
- else
- {
- priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
+ case 0:
+ RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n");
+ break;
+ case 1:
+ RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n");
+ break;
+ case 2:
+ RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n");
+ break;
+ default:
+ RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n");
+ priv->card_8192_version = VERSION_8192S_BCUT;
+ break;
}
- RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
-
-
- if (bLoad_From_EEPOM)
- {
- int i;
- for (i=0; i<6; i+=2)
+ //if (IS_BOOT_FROM_EEPROM(Adapter))
+ if(priv->EepromOrEfuse)
+ { // Read frin EEPROM
+ write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
+ //PlatformStallExecution(10000);
+ mdelay(10);
+ write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
+ // Read all Content from EEPROM or EFUSE.
+ for(i = 0; i < HWSET_MAX_SIZE_92S; i += 2)
{
- u16 tmp = 0;
- tmp = eprom_read(dev, (u16)((EEPROM_NODE_ADDRESS_BYTE_0 + i)>>1));
- *(u16*)(&dev->dev_addr[i]) = tmp;
+ usValue = eprom_read(dev, (u16) (i>>1));
+ *((u16*)(&hwinfo[i])) = usValue;
}
}
- else
- {
- //<Roger_Notes> In this case, we random assigh MAC address here. 2008.10.15.
- static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
- u8 i;
-
- //sMacAddr[5] = (u8)GetRandomNumber(1, 254);
-
- for(i = 0; i < 6; i++)
- dev->dev_addr[i] = sMacAddr[i];
-
- //memcpy(dev->dev_addr, sMacAddr, 6);
- //should I set IDR0 here?
- }
- write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
- write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
- RT_TRACE(COMP_EPROM, "MAC addr:"MAC_FMT"\n", MAC_ARG(dev->dev_addr));
-
- priv->rf_type = RTL819X_DEFAULT_RF_TYPE; //default 1T2R
- priv->rf_chip = RF_6052;
- priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
- //priv->card_8192_version = VERSION_8192SU_A; //Over write for temporally experiment. 2008.10.16. By Roger.
-
- {
-#if 0
- if(bLoad_From_EEPOM)
- {
- tempval = (ReadEEprom(Adapter, (EEPROM_RFInd_PowerDiff>>1))) & 0xff;
- if (tempval&0x80) //RF-indication, bit[7]
- pHalData->RF_Type = RF_1T2R;
- else
- pHalData->RF_Type = RF_2T4R;
- }
-#endif
-
- priv->EEPROMTxPowerDiff = EEPROM_Default_TxPowerDiff;
- RT_TRACE(COMP_INIT, "TxPowerDiff = %#x\n", priv->EEPROMTxPowerDiff);
-
+ else if (!(priv->EepromOrEfuse))
+ { // Read from EFUSE
//
- // Read antenna tx power offset of B/C/D to A from EEPROM
- // and read ThermalMeter from EEPROM
+ // <Roger_Notes> We set Isolation signals from Loader and reset EEPROM after system resuming
+ // from suspend mode.
+ // 2008.10.21.
//
- if(bLoad_From_EEPOM)
- {
- tmpValue = eprom_read(dev, (EEPROM_PwDiff>>1));
- priv->EEPROMPwDiff = tmpValue&0x00ff;
- priv->EEPROMThermalMeter = (tmpValue&0xff00)>>8;
- }
- else
- {
- priv->EEPROMPwDiff = EEPROM_Default_PwDiff;
- priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
- }
- RT_TRACE(COMP_INIT, "PwDiff = %#x\n", priv->EEPROMPwDiff);
- RT_TRACE(COMP_INIT, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
-
- priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
-
-
- // Read CrystalCap from EEPROM
- if(bLoad_From_EEPOM)
- {
- priv->EEPROMCrystalCap =(u8) (((eprom_read(dev, (EEPROM_CrystalCap>>1)))&0xf000)>>12);
- }
- else
- {
- priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
- }
- RT_TRACE(COMP_INIT, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
-
-
- //if(pHalData->EEPROM_Def_Ver == 0) // old eeprom definition
- {
-
- //
- // Get Tx Power Base.//===>
- //
- if(bLoad_From_EEPOM)
- {
- priv->EEPROMTxPwrBase =(u8) ((eprom_read(dev, (EEPROM_TxPowerBase>>1)))&0xff);
- }
- else
- {
- priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
- }
-
- RT_TRACE(COMP_INIT, "TxPwrBase = %#x\n", priv->EEPROMTxPwrBase);
-
- //
- // Get CustomerID(Boad Type)
- // i.e., 0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU.
- // Others: Reserved. Default is 0x2: RTL8192SU.
- //
- if(bLoad_From_EEPOM)
- {
- tmpValue = eprom_read(dev, (u16) (EEPROM_BoardType>>1));
- priv->EEPROMBoardType = (u8)(tmpValue&0xff);
- }
- else
- {
- priv->EEPROMBoardType = EEPROM_Default_BoardType;
- }
-
- RT_TRACE(COMP_INIT, "BoardType = %#x\n", priv->EEPROMBoardType);
-
- // Please add code in the section!!!!
- // And merge tx power difference section.
-
- //
- // Get TSSI value for each path.
- //
- if(bLoad_From_EEPOM)
- {
- tmpValue = eprom_read(dev, (u16) ((EEPROM_TSSI_A)>>1));
- priv->EEPROMTSSI_A = (u8)((tmpValue&0xff00)>>8);
- }
- else
- { // Default setting for Empty EEPROM
- priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
- }
-
- if(bLoad_From_EEPOM)
- {
- tmpValue = eprom_read(dev, (u16) ((EEPROM_TSSI_B)>>1));
- priv->EEPROMTSSI_B = (u8)(tmpValue&0xff);
- priv->EEPROMTxPwrTkMode = (u8)((tmpValue&0xff00)>>8);
- }
- else
- { // Default setting for Empty EEPROM
- priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
- priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode;
- }
-
- RT_TRACE(COMP_INIT, "TSSI_A = %#x, TSSI_B = %#x\n", priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
- RT_TRACE(COMP_INIT, "TxPwrTkMod = %#x\n", priv->EEPROMTxPwrTkMode);
-
-
- }
-
-
- priv->TxPowerDiff = priv->EEPROMPwDiff;
- // Antenna B gain offset to antenna A, bit0~3
- priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);
- // Antenna C gain offset to antenna A, bit4~7
- priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);
- // CrystalCap, bit12~15
- priv->CrystalCap = priv->EEPROMCrystalCap;
- // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
- // 92U does not enable TX power tracking.
- priv->ThermalMeter[0] = priv->EEPROMThermalMeter;
- }
+ //PlatformEFIOWrite1Byte(Adapter, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
+ //PlatformStallExecution(10000);
+ //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x40);
+ //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x50);
- priv->LedStrategy = SW_LED_MODE0;
+ //tmpU1b = PlatformEFIORead1Byte(Adapter, EFUSE_TEST+3);
+ //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, (tmpU1b | 0x80));
+ //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, 0x72);
+ //PlatformEFIOWrite1Byte(Adapter, EFUSE_CLK, 0x03);
- if(priv->rf_type == RF_1T2R)
- {
- RT_TRACE(COMP_EPROM, "\n1T2R config\n");
+ // Read EFUSE real map to shadow.
+ EFUSE_ShadowMapUpdate(dev);
+ memcpy(hwinfo, &priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
}
else
{
- RT_TRACE(COMP_EPROM, "\n2T4R config\n");
+ RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SUsb(): Invalid boot type!!\n");
}
- // 2008/01/16 MH We can only know RF type in the function. So we have to init
- // DIG RATR table again.
- init_rate_adaptive(dev);
- //we need init DIG RATR table here again.
-
- RT_TRACE(COMP_EPROM, "<===========%s()\n", __FUNCTION__);
- return;
-}
-
-//
-// Description:
-// 1. Read HW adapter information by E-Fuse.
-// 2. Refered from SD1 Richard.
-//
-// Assumption:
-// 1. Boot from E-Fuse and CR9346 regiser has verified.
-// 2. PASSIVE_LEVEL (USB interface)
-//
-// Created by Roger, 2008.10.21.
-//
-void
-rtl8192SU_ReadAdapterInfo8192SEFuse(struct net_device* dev)
-{
- struct r8192_priv *priv = ieee80211_priv(dev);
- u16 i,usValue;
- u16 EEPROMId;
- u8 readbyte;
- u8 OFDMTxPwr[14];
- u8 CCKTxPwr[14];
- u8 HT2T_TxPwr[6];
- u8 UsbPhyParam[5];
- u8 hwinfo[HWSET_MAX_SIZE_92S];
-
-
- RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SEFuse\n");
-
- //
- // <Roger_Notes> We set Isolation signals from Loader and reset EEPROM after system resuming
- // from suspend mode.
- // 2008.10.21.
- //
- write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
- //PlatformStallExecution(10000);
- mdelay(10);
- write_nic_byte(dev, SYS_FUNC_EN+1, 0x40);
- write_nic_byte(dev, SYS_FUNC_EN+1, 0x50);
-
- readbyte = read_nic_byte(dev, EFUSE_TEST+3);
- write_nic_byte(dev, EFUSE_TEST+3, (readbyte | 0x80));
- write_nic_byte(dev, EFUSE_TEST+3, 0x72);
- write_nic_byte(dev, EFUSE_CLK, 0x03);
-
+ //YJ,test,090106
+ //dump_buf(hwinfo,HWSET_MAX_SIZE_92S);
//
- // Dump EFUSe at init time for later use
+ // <Roger_Notes> The following are EFUSE/EEPROM independent operations!!
//
- // Read EFUSE real map to shadow!!
- EFUSE_ShadowMapUpdate(dev);
-
- memcpy(hwinfo, (void*)&priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
- //RT_PRINT_DATA(COMP_INIT, DBG_LOUD, ("MAP \n"), hwinfo, HWSET_MAX_SIZE_92S);
+ //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("MAP: \n"), hwinfo, HWSET_MAX_SIZE_92S);
//
// <Roger_Notes> Event though CR9346 regiser can verify whether Autoload is success or not, but we still
// double check ID codes for 92S here(e.g., due to HW GPIO polling fail issue).
// 2008.10.21.
//
- ReadEFuse(dev, 0, 2, (unsigned char*) &EEPROMId);
+ EEPROMId = *((u16 *)&hwinfo[0]);
if( EEPROMId != RTL8190_EEPROM_ID )
{
- RT_TRACE(COMP_INIT, "EEPROM ID(%#x) is invalid!!\n", EEPROMId);
- priv->AutoloadFailFlag=true;
+ RT_TRACE(COMP_INIT, "ID(%#x) is invalid!!\n", EEPROMId);
+ priv->bTXPowerDataReadFromEEPORM = FALSE;
+ priv->AutoloadFailFlag=TRUE;
}
else
{
- priv->AutoloadFailFlag=false;
+ priv->AutoloadFailFlag=FALSE;
+ priv->bTXPowerDataReadFromEEPORM = TRUE;
}
-
// Read IC Version && Channel Plan
if(!priv->AutoloadFailFlag)
{
-
// VID, PID
- ReadEFuse(dev, EEPROM_VID, 2, (unsigned char*) &priv->eeprom_vid);
- ReadEFuse(dev, EEPROM_PID, 2, (unsigned char*) &priv->eeprom_pid);
+ priv->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID];
+ priv->eeprom_pid = *(u16 *)&hwinfo[EEPROM_PID];
+ priv->bIgnoreDiffRateTxPowerOffset = false; //cosa for test
- // Version ID, Channel plan
- ReadEFuse(dev, EEPROM_Version, 2, (unsigned char*) &usValue);
- //pHalData->VersionID = (VERSION_8192S)(usValue&0x00ff);
- priv->eeprom_ChannelPlan = (usValue&0xff00>>8);
- priv->bTXPowerDataReadFromEEPORM = true;
+
+ // EEPROM Version ID, Channel plan
+ priv->EEPROMVersion = *(u8 *)&hwinfo[EEPROM_Version];
+ priv->eeprom_ChannelPlan = *(u8 *)&hwinfo[EEPROM_ChannelPlan];
// Customer ID, 0x00 and 0xff are reserved for Realtek.
- ReadEFuse(dev, EEPROM_CustomID, 2, (unsigned char*) &usValue);
- priv->eeprom_CustomerID = (u8)( usValue & 0xff);
- priv->eeprom_SubCustomerID = (u8)((usValue & 0xff00)>>8);
+ priv->eeprom_CustomerID = *(u8 *)&hwinfo[EEPROM_CustomID];
+ priv->eeprom_SubCustomerID = *(u8 *)&hwinfo[EEPROM_SubCustomID];
}
else
{
- priv->eeprom_vid = 0;
- priv->eeprom_pid = 0;
- priv->eeprom_ChannelPlan = 0;
- priv->eeprom_CustomerID = 0;
- priv->eeprom_SubCustomerID = 0;
+ //priv->eeprom_vid = 0;
+ //priv->eeprom_pid = 0;
+ //priv->EEPROMVersion = 0;
+ //priv->eeprom_ChannelPlan = 0;
+ //priv->eeprom_CustomerID = 0;
+ //priv->eeprom_SubCustomerID = 0;
+
+ rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
+ return;
}
+
RT_TRACE(COMP_INIT, "EEPROM Id = 0x%4x\n", EEPROMId);
RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
- //RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM Version ID: 0x%2x\n", pHalData->VersionID));
+ RT_TRACE(COMP_INIT, "EEPROM Version ID: 0x%2x\n", priv->EEPROMVersion);
RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
+ RT_TRACE(COMP_INIT, "bIgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
// Read USB optional function.
if(!priv->AutoloadFailFlag)
{
- ReadEFuse(dev, EEPROM_USB_OPTIONAL, 1, (unsigned char*) &priv->EEPROMUsbOption);
+ priv->EEPROMUsbOption = *(u8 *)&hwinfo[EEPROM_USB_OPTIONAL];
}
else
{
priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
}
- RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
-
- // Read USB PHY parameters.
- if(!priv->AutoloadFailFlag)
- {
- ReadEFuse(dev, EEPROM_USB_PHY_PARA1, 5, (unsigned char*)UsbPhyParam);
- for(i=0; i<5; i++)
- {
- priv->EEPROMUsbPhyParam[i] = UsbPhyParam[i];
- RT_TRACE(COMP_INIT, "USB Param = index(%d) = %#x\n", i, priv->EEPROMUsbPhyParam[i]);
- }
- }
- else
- {
- for(i=0; i<5; i++)
- {
- priv->EEPROMUsbPhyParam[i] = EEPROM_USB_Default_PHY_PARAM;
- RT_TRACE(COMP_INIT, "USB Param = index(%d) = %#x\n", i, priv->EEPROMUsbPhyParam[i]);
- }
- }
+ priv->EEPROMUsbEndPointNumber = rtl8192SU_UsbOptionToEndPointNumber((priv->EEPROMUsbOption&EEPROM_EP_NUMBER)>>3);
+ RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
+ RT_TRACE(COMP_INIT, "EndPoint Number = %#x\n", priv->EEPROMUsbEndPointNumber);
- //Read Permanent MAC address
- if(!priv->AutoloadFailFlag)
+#ifdef TO_DO_LIST
+ //
+ // Decide CustomerID according to VID/DID or EEPROM
+ //
+ switch(pHalData->EEPROMCustomerID)
{
- u8 macaddr[6] = {0x00, 0xe1, 0x86, 0x4c, 0x92, 0x00};
+ case EEPROM_CID_ALPHA:
+ pMgntInfo->CustomerID = RT_CID_819x_ALPHA;
+ break;
- ReadEFuse(dev, EEPROM_NODE_ADDRESS_BYTE_0, 6, (unsigned char*)macaddr);
- for(i=0; i<6; i++)
- dev->dev_addr[i] = macaddr[i];
- }
- else
- {//Auto load fail
+ case EEPROM_CID_CAMEO:
+ pMgntInfo->CustomerID = RT_CID_819x_CAMEO;
+ break;
- //<Roger_Notes> In this case, we random assigh MAC address here. 2008.10.15.
- static u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00};
- u8 i;
+ case EEPROM_CID_SITECOM:
+ pMgntInfo->CustomerID = RT_CID_819x_Sitecom;
+ RT_TRACE(COMP_INIT, DBG_LOUD, ("CustomerID = 0x%4x\n", pMgntInfo->CustomerID));
- //if(!Adapter->bInHctTest)
- //sMacAddr[5] = (u8)GetRandomNumber(1, 254);
+ break;
- for(i = 0; i < 6; i++)
- dev->dev_addr[i] = sMacAddr[i];
- }
+ case EEPROM_CID_WHQL:
+ Adapter->bInHctTest = TRUE;
- //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
- write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
- write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
+ pMgntInfo->bSupportTurboMode = FALSE;
+ pMgntInfo->bAutoTurboBy8186 = FALSE;
+
+ pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
+ pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
+ pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
+ pMgntInfo->keepAliveLevel = 0;
+ break;
+
+ default:
+ pMgntInfo->CustomerID = RT_CID_DEFAULT;
+ break;
+
+ }
+
+ //
+ // Led mode
+ //
+ switch(pMgntInfo->CustomerID)
+ {
+ case RT_CID_DEFAULT:
+ case RT_CID_819x_ALPHA:
+ pHalData->LedStrategy = SW_LED_MODE1;
+ pHalData->bRegUseLed = TRUE;
+ pHalData->SwLed1.bLedOn = TRUE;
+ break;
+ case RT_CID_819x_CAMEO:
+ pHalData->LedStrategy = SW_LED_MODE1;
+ pHalData->bRegUseLed = TRUE;
+ break;
+
+ case RT_CID_819x_Sitecom:
+ pHalData->LedStrategy = SW_LED_MODE2;
+ pHalData->bRegUseLed = TRUE;
+ break;
+
+ default:
+ pHalData->LedStrategy = SW_LED_MODE0;
+ break;
+ }
+#endif
+
+ // Read USB PHY parameters.
+ for(i=0; i<5; i++)
+ priv->EEPROMUsbPhyParam[i] = *(u8 *)&hwinfo[EEPROM_USB_PHY_PARA1+i];
+
+ //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("USB PHY Param: \n"), pHalData->EEPROMUsbPhyParam, 5);
+
+
+ //Read Permanent MAC address
+ for(i=0; i<6; i++)
+ dev->dev_addr[i] = *(u8 *)&hwinfo[EEPROM_NODE_ADDRESS_BYTE_0+i];
+
+ //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
+ write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
+ write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SEFuse(), Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
dev->dev_addr[0], dev->dev_addr[1],
dev->dev_addr[2], dev->dev_addr[3],
dev->dev_addr[4], dev->dev_addr[5]);
- // 2007/11/15 MH For RTL8192USB we assign as 1T2R now.
- priv->rf_type = RTL819X_DEFAULT_RF_TYPE; // default : 1T2R
+ //
+ // Get CustomerID(Boad Type)
+ // i.e., 0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU.
+ // Others: Reserved. Default is 0x2: RTL8192SU.
+ //
+ //if(!priv->AutoloadFailFlag)
+ //{
+ priv->EEPROMBoardType = *(u8 *)&hwinfo[EEPROM_BoardType];
+ priv->rf_type = rtl8192SU_BoardTypeToRFtype(dev, priv->EEPROMBoardType);
+ //}
+ //else
+ //{
+ // priv->EEPROMBoardType = EEPROM_Default_BoardType;
+ // priv->rf_type = RF_1T2R;
+ //}
priv->rf_chip = RF_6052;
- priv->rf_type = RTL819X_DEFAULT_RF_TYPE;
+ priv->rf_chip = RF_6052;//lzm test
+ RT_TRACE(COMP_INIT, "BoardType = 0x%2x\n", priv->EEPROMBoardType);
+ RT_TRACE(COMP_INIT, "RF_Type = 0x%2x\n", priv->rf_type);
+
+ //
+ // Read antenna tx power offset of B/C/D to A from EEPROM
+ // and read ThermalMeter from EEPROM
+ //
+ //if(!priv->AutoloadFailFlag)
{
- //
- // Read antenna tx power offset of B/C/D to A from EEPROM
- // and read ThermalMeter from EEPROM
- //
- if(!priv->AutoloadFailFlag)
- {
- ReadEFuse(dev, EEPROM_PwDiff, 2, (unsigned char*) &usValue);
- priv->EEPROMPwDiff = usValue&0x00ff;
- priv->EEPROMThermalMeter = (usValue&0xff00)>>8;
- }
- else
- {
- priv->EEPROMPwDiff = EEPROM_Default_PwDiff;
- priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
- }
+ priv->EEPROMTxPowerDiff = *(u8 *)&hwinfo[EEPROM_PwDiff];
+ priv->EEPROMThermalMeter = *(u8 *)&hwinfo[EEPROM_ThermalMeter];
+ }
+ //else
+ //{
+ // priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
+ // priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
+ //}
+
+ RT_TRACE(COMP_INIT, "PwDiff = %#x\n", priv->EEPROMTxPowerDiff);
+ RT_TRACE(COMP_INIT, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
- RT_TRACE(COMP_INIT, "PwDiff = %#x\n", priv->EEPROMPwDiff);
- RT_TRACE(COMP_INIT, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
+ //
+ // Read Tx Power gain offset of legacy OFDM to HT rate.
+ // Read CrystalCap from EEPROM
+ //
+ //if(!priv->AutoloadFailFlag)
+ {
+ priv->EEPROMCrystalCap = *(u8 *)&hwinfo[EEPROM_CrystalCap];
+ }
+ //else
+ //{
+ // priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
+ //}
- priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
+ RT_TRACE(COMP_INIT, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
- //
- // Read Tx Power gain offset of legacy OFDM to HT rate.
- // Read CrystalCap from EEPROM
- //
- if(!priv->AutoloadFailFlag)
- {
- ReadEFuse(dev, EEPROM_CrystalCap, 1, (unsigned char*) &usValue);
- priv->EEPROMCrystalCap = (u8)((usValue&0xf0)>>4);
- }
- else
- {
- priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
- }
+ //
+ // Get Tx Power Base.
+ //
+ //if(!priv->AutoloadFailFlag)
+ {
+ priv->EEPROMTxPwrBase = *(u8 *)&hwinfo[EEPROM_TxPowerBase];
+ }
+ //else
+ //{
+ // priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
+ //}
+
+ RT_TRACE(COMP_INIT, "TxPwrBase = %#x\n", priv->EEPROMTxPwrBase);
+
+
+ //
+ // Get TSSI value for each path.
+ //
+ //if(!priv->AutoloadFailFlag)
+ {
+ priv->EEPROMTSSI_A = *(u8 *)&hwinfo[EEPROM_TSSI_A];
+ priv->EEPROMTSSI_B = *(u8 *)&hwinfo[EEPROM_TSSI_B];
+ }
+ //else
+ //{ // Default setting for Empty EEPROM
+ // priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
+ // priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
+ //}
- RT_TRACE(COMP_INIT, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
+ RT_TRACE(COMP_INIT, "TSSI_A = %#x, TSSI_B = %#x\n", priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
+
+ //
+ // Get Tx Power tracking mode.
+ //
+ //if(!priv->AutoloadFailFlag)
+ {
+ priv->EEPROMTxPwrTkMode = *(u8 *)&hwinfo[EEPROM_TxPwTkMode];
+ }
- priv->EEPROMTxPowerDiff = EEPROM_Default_TxPowerDiff;
- RT_TRACE(COMP_INIT, "TxPowerDiff = %d\n", priv->EEPROMTxPowerDiff);
+ RT_TRACE(COMP_INIT, "TxPwrTkMod = %#x\n", priv->EEPROMTxPwrTkMode);
+ {
//
- // Get Tx Power Base.
+ // Buffer TxPwIdx(i.e., from offset 0x55~0x66, total 18Bytes)
+ // Update CCK, OFDM (1T/2T)Tx Power Index from above buffer.
//
- if(!priv->AutoloadFailFlag)
- {
- ReadEFuse(dev, EEPROM_TxPowerBase, 1, (unsigned char*) &priv->EEPROMTxPwrBase );
- }
- else
- {
- priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
- }
-
- RT_TRACE(COMP_INIT, "TxPwrBase = %#x\n", priv->EEPROMTxPwrBase);
//
- // Get CustomerID(Boad Type)
- // i.e., 0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU.
- // Others: Reserved. Default is 0x2: RTL8192SU.
+ // Get Tx Power Level by Channel
//
- if(!priv->AutoloadFailFlag)
- {
- ReadEFuse(dev, EEPROM_BoardType, 1, (unsigned char*) &priv->EEPROMBoardType );
- }
- else
+ //if(!priv->AutoloadFailFlag)
{
- priv->EEPROMBoardType = EEPROM_Default_BoardType;
- }
-
- RT_TRACE(COMP_INIT, "BoardType = %#x\n", priv->EEPROMBoardType);
+ // Read Tx power of Channel 1 ~ 14 from EFUSE.
+ // 92S suupport RF A & B
+ for (rf_path = 0; rf_path < 2; rf_path++)
+ {
+ for (i = 0; i < 3; i++)
+ {
+ // Read CCK RF A & B Tx power
+ priv->RfCckChnlAreaTxPwr[rf_path][i] =
+ hwinfo[EEPROM_TxPwIndex+rf_path*3+i];
- //if(pHalData->EEPROM_Def_Ver == 0)
- {
- // Please add code in the section!!!!
- // And merge tx power difference section.
+ // Read OFDM RF A & B Tx power for 1T
+ priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
+ hwinfo[EEPROM_TxPwIndex+6+rf_path*3+i];
- //
- // Get TSSI value for each path.
- //
- if(!priv->AutoloadFailFlag)
- {
- ReadEFuse(dev, EEPROM_TSSI_A, 2, (unsigned char*)&usValue);
- priv->EEPROMTSSI_A = (u8)(usValue&0xff);
- priv->EEPROMTSSI_B = (u8)((usValue&0xff00)>>8);
- }
- else
- { // Default setting for Empty EEPROM
- priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
- priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
+ // Read OFDM RF A & B Tx power for 2T
+ priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
+ hwinfo[EEPROM_TxPwIndex+12+rf_path*3+i];
+ }
}
- RT_TRACE(COMP_INIT, "TSSI_A = %#x, TSSI_B = %#x\n",
- priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
-
- //
- // Get Tx Power tracking mode.
- //
- if(!priv->AutoloadFailFlag)
+ }
+//
+ // Update Tx Power HAL variables.
+//
+ for (rf_path = 0; rf_path < 2; rf_path++)
+ {
+ for (i = 0; i < 3; i++)
{
- ReadEFuse(dev, EEPROM_TxPwTkMode, 1, (unsigned char*)&priv->EEPROMTxPwrTkMode);
- }
- else
- { // Default setting for Empty EEPROM
- priv->EEPROMTxPwrTkMode = EEPROM_Default_TxPwrTkMode;
+ RT_TRACE((COMP_INIT), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
+ priv->RfCckChnlAreaTxPwr[rf_path][i]);
+ RT_TRACE((COMP_INIT), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
+ priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
+ RT_TRACE((COMP_INIT), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
}
- RT_TRACE(COMP_INIT, "TxPwrTkMod = %#x\n", priv->EEPROMTxPwrTkMode);
-
-
- // TODO: The following HT 2T Path A and B Power Index should be updated.!! Added by Roger, 2008.20.23.
-
- //
- // Get HT 2T Path A and B Power Index.
- //
- if(!priv->AutoloadFailFlag)
+ // Assign dedicated channel tx power
+ for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
{
- ReadEFuse(dev, EEPROM_HT2T_CH1_A, 6, (unsigned char*)HT2T_TxPwr);
- for(i=0; i<6; i++)
- {
- priv->EEPROMHT2T_TxPwr[i] = HT2T_TxPwr[i];
- }
- }
- else
- { // Default setting for Empty EEPROM
- for(i=0; i<6; i++)
+ if (i < 3) // Cjanel 1-3
+ index = 0;
+ else if (i < 9) // Channel 4-9
+ index = 1;
+ else // Channel 10-14
+ index = 2;
+
+ // Record A & B CCK /OFDM - 1T/2T Channel area tx power
+ priv->RfTxPwrLevelCck[rf_path][i] =
+ priv->RfCckChnlAreaTxPwr[rf_path][index];
+ priv->RfTxPwrLevelOfdm1T[rf_path][i] =
+ priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
+ priv->RfTxPwrLevelOfdm2T[rf_path][i] =
+ priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
+ if (rf_path == 0)
{
- priv->EEPROMHT2T_TxPwr[i] = EEPROM_Default_HT2T_TxPwr;
+ priv->TxPowerLevelOFDM24G[i] = priv->RfTxPwrLevelOfdm1T[rf_path][i] ;
+ priv->TxPowerLevelCCK[i] = priv->RfTxPwrLevelCck[rf_path][i];
}
}
- for(i=0; i<6; i++)
+ for(i=0; i<14; i++)
{
- RT_TRACE(COMP_INIT, "EEPROMHT2T_TxPwr, Index %d = 0x%02x\n",
- i, priv->EEPROMHT2T_TxPwr[i]);
+ RT_TRACE((COMP_INIT),
+ "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
+ rf_path, i, priv->RfTxPwrLevelCck[rf_path][i],
+ priv->RfTxPwrLevelOfdm1T[rf_path][i] ,
+ priv->RfTxPwrLevelOfdm2T[rf_path][i] );
}
}
-
-
- priv->TxPowerDiff = priv->EEPROMPwDiff;
- // Antenna B gain offset to antenna A, bit0~3
- priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);
- // Antenna C gain offset to antenna A, bit4~7
- priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);
- // CrystalCap, bit12~15
- priv->CrystalCap = priv->EEPROMCrystalCap;
- // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
- // 92U does not enable TX power tracking.
- priv->ThermalMeter[0] = priv->EEPROMThermalMeter;
}
- priv->LedStrategy = SW_LED_MODE0;
+ //
+ // 2009/02/09 Cosa add for new EEPROM format
+ //
+ for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
+ {
+ // Read tx power difference between HT OFDM 20/40 MHZ
+ if (i < 3) // Cjanel 1-3
+ index = 0;
+ else if (i < 9) // Channel 4-9
+ index = 1;
+ else // Channel 10-14
+ index = 2;
- init_rate_adaptive(dev);
+ tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_HT20_DIFF+index])&0xff;
+ priv->TxPwrHt20Diff[RF90_PATH_A][i] = (tempval&0xF);
+ priv->TxPwrHt20Diff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
- RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SEFuse\n");
+ // Read OFDM<->HT tx power diff
+ if (i < 3) // Cjanel 1-3
+ tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF])&0xff;
+ else if (i < 9) // Channel 4-9
+ tempval = (*(u8 *)&hwinfo[EEPROM_PwDiff])&0xff;
+ else // Channel 10-14
+ tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+1])&0xff;
+
+ //cosa tempval = (*(u1Byte *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+index])&0xff;
+ priv->TxPwrLegacyHtDiff[RF90_PATH_A][i] = (tempval&0xF);
+ priv->TxPwrLegacyHtDiff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
+
+ //
+ // Read Band Edge tx power offset and check if user enable the ability
+ //
+ // HT 40 band edge channel
+ tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE])&0xff;
+ priv->TxPwrbandEdgeHt40[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
+ priv->TxPwrbandEdgeHt40[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
+ tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+1])&0xff;
+ priv->TxPwrbandEdgeHt40[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
+ priv->TxPwrbandEdgeHt40[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
+ // HT 20 band edge channel
+ tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+2])&0xff;
+ priv->TxPwrbandEdgeHt20[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
+ priv->TxPwrbandEdgeHt20[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
+ tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+3])&0xff;
+ priv->TxPwrbandEdgeHt20[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
+ priv->TxPwrbandEdgeHt20[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
+ // OFDM band edge channel
+ tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+4])&0xff;
+ priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
+ priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
+ tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+5])&0xff;
+ priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
+ priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
+
+ priv->TxPwrbandEdgeFlag = (*(u8 *)&hwinfo[TX_PWR_BAND_EDGE_CHK]);
+ }
+
+ for(i=0; i<14; i++)
+ RT_TRACE(COMP_INIT, "RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_A][i]);
+ for(i=0; i<14; i++)
+ RT_TRACE(COMP_INIT, "RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_A][i]);
+ for(i=0; i<14; i++)
+ RT_TRACE(COMP_INIT, "RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_B][i]);
+ for(i=0; i<14; i++)
+ RT_TRACE(COMP_INIT, "RF-B Legacy to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_B][i]);
+ RT_TRACE(COMP_INIT, "RF-A HT40 band-edge low/high power diff = 0x%x/0x%x\n",
+ priv->TxPwrbandEdgeHt40[RF90_PATH_A][0],
+ priv->TxPwrbandEdgeHt40[RF90_PATH_A][1]);
+ RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT40 band-edge low/high power diff = 0x%x/0x%x\n",
+ priv->TxPwrbandEdgeHt40[RF90_PATH_B][0],
+ priv->TxPwrbandEdgeHt40[RF90_PATH_B][1]);
+
+ RT_TRACE((COMP_INIT&COMP_DBG), "RF-A HT20 band-edge low/high power diff = 0x%x/0x%x\n",
+ priv->TxPwrbandEdgeHt20[RF90_PATH_A][0],
+ priv->TxPwrbandEdgeHt20[RF90_PATH_A][1]);
+ RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT20 band-edge low/high power diff = 0x%x/0x%x\n",
+ priv->TxPwrbandEdgeHt20[RF90_PATH_B][0],
+ priv->TxPwrbandEdgeHt20[RF90_PATH_B][1]);
+
+ RT_TRACE((COMP_INIT&COMP_DBG), "RF-A OFDM band-edge low/high power diff = 0x%x/0x%x\n",
+ priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0],
+ priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1]);
+ RT_TRACE((COMP_INIT&COMP_DBG), "RF-B OFDM band-edge low/high power diff = 0x%x/0x%x\n",
+ priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0],
+ priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1]);
+ RT_TRACE((COMP_INIT&COMP_DBG), "Band-edge enable flag = %d\n", priv->TxPwrbandEdgeFlag);
+
+ //
+ // Update remained HAL variables.
+ //
+ priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
+ priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;
+ priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
+ //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit[3:0]
+ //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit[7:4]
+ priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit[15:12]
+ priv->ThermalMeter[0] = (priv->EEPROMThermalMeter&0x1f);// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
+ priv->LedStrategy = SW_LED_MODE0;
+
+ init_rate_adaptive(dev);
+
+ RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
+ //return RT_STATUS_SUCCESS;
}
-#endif
+
//
// Description:
//
// Created by Roger, 2008.10.21.
//
-void
-rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
+static void rtl8192SU_read_eeprom_info(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
- u16 i,usValue;
- u8 tmpU1b, tempval;
- u16 EEPROMId;
- u8 hwinfo[HWSET_MAX_SIZE_92S];
- u8 rf_path, index; // For EEPROM/EFUSE After V0.6_1117
-
+ u8 tmpU1b;
RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
- //
- // <Roger_Note> The following operation are prevent Efuse leakage by turn on 2.5V.
- // 2008.11.25.
- //
- tmpU1b = read_nic_byte(dev, EFUSE_TEST+3);
- write_nic_byte(dev, EFUSE_TEST+3, tmpU1b|0x80);
- //PlatformStallExecution(1000);
- mdelay(10);
- write_nic_byte(dev, EFUSE_TEST+3, (tmpU1b&(~BIT7)));
-
// Retrieve Chip version.
priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
- switch(priv->card_8192_version)
- {
- case 0:
- RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_ACUT.\n");
- break;
- case 1:
- RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_BCUT.\n");
- break;
- case 2:
- RT_TRACE(COMP_INIT, "Chip Version ID: VERSION_8192S_CCUT.\n");
- break;
- default:
- RT_TRACE(COMP_INIT, "Unknown Chip Version!!\n");
- priv->card_8192_version = VERSION_8192S_BCUT;
- break;
- }
-
- //if (IS_BOOT_FROM_EEPROM(Adapter))
- if(priv->EepromOrEfuse)
- { // Read frin EEPROM
- write_nic_byte(dev, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
- //PlatformStallExecution(10000);
- mdelay(10);
- write_nic_byte(dev, PMC_FSM, 0x02); // Enable Loader Data Keep
- // Read all Content from EEPROM or EFUSE.
- for(i = 0; i < HWSET_MAX_SIZE_92S; i += 2)
- {
- usValue = eprom_read(dev, (u16) (i>>1));
- *((u16*)(&hwinfo[i])) = usValue;
- }
- }
- else if (!(priv->EepromOrEfuse))
- { // Read from EFUSE
-
- //
- // <Roger_Notes> We set Isolation signals from Loader and reset EEPROM after system resuming
- // from suspend mode.
- // 2008.10.21.
- //
- //PlatformEFIOWrite1Byte(Adapter, SYS_ISO_CTRL+1, 0xE8); // Isolation signals from Loader
- //PlatformStallExecution(10000);
- //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x40);
- //PlatformEFIOWrite1Byte(Adapter, SYS_FUNC_EN+1, 0x50);
-
- //tmpU1b = PlatformEFIORead1Byte(Adapter, EFUSE_TEST+3);
- //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, (tmpU1b | 0x80));
- //PlatformEFIOWrite1Byte(Adapter, EFUSE_TEST+3, 0x72);
- //PlatformEFIOWrite1Byte(Adapter, EFUSE_CLK, 0x03);
+ tmpU1b = read_nic_byte(dev, EPROM_CMD);//CR9346
- // Read EFUSE real map to shadow.
- EFUSE_ShadowMapUpdate(dev);
- memcpy(hwinfo, &priv->EfuseMap[EFUSE_INIT_MAP][0], HWSET_MAX_SIZE_92S);
+ // To check system boot selection.
+ if (tmpU1b & CmdEERPOMSEL)
+ {
+ RT_TRACE(COMP_INIT, "Boot from EEPROM\n");
+ priv->EepromOrEfuse = TRUE;
}
else
{
- RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SUsb(): Invalid boot type!!\n");
+ RT_TRACE(COMP_INIT, "Boot from EFUSE\n");
+ priv->EepromOrEfuse = FALSE;
}
- //YJ,test,090106
- //dump_buf(hwinfo,HWSET_MAX_SIZE_92S);
- //
- // <Roger_Notes> The following are EFUSE/EEPROM independent operations!!
- //
- //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("MAP: \n"), hwinfo, HWSET_MAX_SIZE_92S);
-
- //
- // <Roger_Notes> Event though CR9346 regiser can verify whether Autoload is success or not, but we still
- // double check ID codes for 92S here(e.g., due to HW GPIO polling fail issue).
- // 2008.10.21.
- //
- EEPROMId = *((u16 *)&hwinfo[0]);
-
- if( EEPROMId != RTL8190_EEPROM_ID )
- {
- RT_TRACE(COMP_INIT, "ID(%#x) is invalid!!\n", EEPROMId);
- priv->bTXPowerDataReadFromEEPORM = FALSE;
- priv->AutoloadFailFlag=TRUE;
- }
- else
+ // To check autoload success or not.
+ if (tmpU1b & CmdEEPROM_En)
{
+ RT_TRACE(COMP_INIT, "Autoload OK!!\n");
priv->AutoloadFailFlag=FALSE;
- priv->bTXPowerDataReadFromEEPORM = TRUE;
- }
- // Read IC Version && Channel Plan
- if(!priv->AutoloadFailFlag)
- {
- // VID, PID
- priv->eeprom_vid = *(u16 *)&hwinfo[EEPROM_VID];
- priv->eeprom_pid = *(u16 *)&hwinfo[EEPROM_PID];
- priv->bIgnoreDiffRateTxPowerOffset = false; //cosa for test
-
-
- // EEPROM Version ID, Channel plan
- priv->EEPROMVersion = *(u8 *)&hwinfo[EEPROM_Version];
- priv->eeprom_ChannelPlan = *(u8 *)&hwinfo[EEPROM_ChannelPlan];
-
- // Customer ID, 0x00 and 0xff are reserved for Realtek.
- priv->eeprom_CustomerID = *(u8 *)&hwinfo[EEPROM_CustomID];
- priv->eeprom_SubCustomerID = *(u8 *)&hwinfo[EEPROM_SubCustomID];
+ rtl8192SU_ReadAdapterInfo8192SUsb(dev);//eeprom or e-fuse
}
else
- {
- //priv->eeprom_vid = 0;
- //priv->eeprom_pid = 0;
- //priv->EEPROMVersion = 0;
- //priv->eeprom_ChannelPlan = 0;
- //priv->eeprom_CustomerID = 0;
- //priv->eeprom_SubCustomerID = 0;
-
+ { // Auto load fail.
+ RT_TRACE(COMP_INIT, "AutoLoad Fail reported from CR9346!!\n");
+ priv->AutoloadFailFlag=TRUE;
rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
- return;
- }
-
- RT_TRACE(COMP_INIT, "EEPROM Id = 0x%4x\n", EEPROMId);
- RT_TRACE(COMP_INIT, "EEPROM VID = 0x%4x\n", priv->eeprom_vid);
- RT_TRACE(COMP_INIT, "EEPROM PID = 0x%4x\n", priv->eeprom_pid);
- RT_TRACE(COMP_INIT, "EEPROM Version ID: 0x%2x\n", priv->EEPROMVersion);
- RT_TRACE(COMP_INIT, "EEPROM Customer ID: 0x%2x\n", priv->eeprom_CustomerID);
- RT_TRACE(COMP_INIT, "EEPROM SubCustomer ID: 0x%2x\n", priv->eeprom_SubCustomerID);
- RT_TRACE(COMP_INIT, "EEPROM ChannelPlan = 0x%4x\n", priv->eeprom_ChannelPlan);
- RT_TRACE(COMP_INIT, "bIgnoreDiffRateTxPowerOffset = %d\n", priv->bIgnoreDiffRateTxPowerOffset);
-
-
- // Read USB optional function.
- if(!priv->AutoloadFailFlag)
+ //if (IS_BOOT_FROM_EFUSE(Adapter))
+ if(!priv->EepromOrEfuse)
+ {
+ RT_TRACE(COMP_INIT, "Update shadow map for EFuse future use!!\n");
+ EFUSE_ShadowMapUpdate(dev);
+ }
+ }
+#ifdef TO_DO_LIST
+ if((priv->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
{
- priv->EEPROMUsbOption = *(u8 *)&hwinfo[EEPROM_USB_OPTIONAL];
+ pMgntInfo->ChannelPlan = HalMapChannelPlan8192S(Adapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
+ pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? TRUE : FALSE; // User cannot change channel plan.
}
else
{
- priv->EEPROMUsbOption = EEPROM_USB_Default_OPTIONAL_FUNC;
+ pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan;
}
+ switch(pMgntInfo->ChannelPlan)
+ {
+ case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
+ {
+ PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
- priv->EEPROMUsbEndPointNumber = rtl8192SU_UsbOptionToEndPointNumber((priv->EEPROMUsbOption&EEPROM_EP_NUMBER)>>3);
+ pDot11dInfo->bEnabled = TRUE;
+ }
+ RT_TRACE(COMP_INIT, DBG_LOUD, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
+ break;
+ }
- RT_TRACE(COMP_INIT, "USB Option = %#x\n", priv->EEPROMUsbOption);
- RT_TRACE(COMP_INIT, "EndPoint Number = %#x\n", priv->EEPROMUsbEndPointNumber);
+ RT_TRACE(COMP_INIT, DBG_LOUD, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan));
+ RT_TRACE(COMP_INIT, DBG_LOUD, ("ChannelPlan = %d\n" , pMgntInfo->ChannelPlan));
-#ifdef TO_DO_LIST
- //
- // Decide CustomerID according to VID/DID or EEPROM
- //
- switch(pHalData->EEPROMCustomerID)
- {
- case EEPROM_CID_ALPHA:
- pMgntInfo->CustomerID = RT_CID_819x_ALPHA;
- break;
+ RT_TRACE(COMP_INIT, DBG_LOUD, ("<==== ReadAdapterInfo8192S\n"));
+#endif
- case EEPROM_CID_CAMEO:
- pMgntInfo->CustomerID = RT_CID_819x_CAMEO;
- break;
+ RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
- case EEPROM_CID_SITECOM:
- pMgntInfo->CustomerID = RT_CID_819x_Sitecom;
- RT_TRACE(COMP_INIT, DBG_LOUD, ("CustomerID = 0x%4x\n", pMgntInfo->CustomerID));
+ //return RT_STATUS_SUCCESS;
+}
- break;
+short rtl8192_get_channel_map(struct net_device * dev)
+{
+ struct r8192_priv *priv = ieee80211_priv(dev);
+ if(priv->ChannelPlan > COUNTRY_CODE_GLOBAL_DOMAIN){
+ printk("rtl8180_init:Error channel plan! Set to default.\n");
+ priv->ChannelPlan= 0;
+ }
+ RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
- case EEPROM_CID_WHQL:
- Adapter->bInHctTest = TRUE;
+ rtl819x_set_channel_map(priv->ChannelPlan, priv);
+ return 0;
+}
- pMgntInfo->bSupportTurboMode = FALSE;
- pMgntInfo->bAutoTurboBy8186 = FALSE;
+short rtl8192_init(struct net_device *dev)
+{
- pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
- pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
- pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
- pMgntInfo->keepAliveLevel = 0;
- break;
+ struct r8192_priv *priv = ieee80211_priv(dev);
- default:
- pMgntInfo->CustomerID = RT_CID_DEFAULT;
- break;
+ rtl8192_init_priv_variable(dev);
+ rtl8192_init_priv_lock(priv);
+ rtl8192_init_priv_task(dev);
+ rtl8192_get_eeprom_size(dev);
+ priv->ops->rtl819x_read_eeprom_info(dev);
+ rtl8192_get_channel_map(dev);
+ init_hal_dm(dev);
+ init_timer(&priv->watch_dog_timer);
+ priv->watch_dog_timer.data = (unsigned long)dev;
+ priv->watch_dog_timer.function = watch_dog_timer_callback;
- }
+ //rtl8192_adapter_start(dev);
+#ifdef DEBUG_EPROM
+ dump_eprom(dev);
+#endif
+ return 0;
+}
+/******************************************************************************
+ *function: This function actually only set RRSR, RATR and BW_OPMODE registers
+ * not to do all the hw config as its name says
+ * input: net_device dev
+ * output: none
+ * return: none
+ * notice: This part need to modified according to the rate set we filtered
+ * ****************************************************************************/
+void rtl8192_hwconfig(struct net_device* dev)
+{
+ u32 regRATR = 0, regRRSR = 0;
+ u8 regBwOpMode = 0, regTmp = 0;
+ struct r8192_priv *priv = ieee80211_priv(dev);
+
+// Set RRSR, RATR, and BW_OPMODE registers
//
- // Led mode
- //
- switch(pMgntInfo->CustomerID)
+ switch(priv->ieee80211->mode)
{
- case RT_CID_DEFAULT:
- case RT_CID_819x_ALPHA:
- pHalData->LedStrategy = SW_LED_MODE1;
- pHalData->bRegUseLed = TRUE;
- pHalData->SwLed1.bLedOn = TRUE;
- break;
- case RT_CID_819x_CAMEO:
- pHalData->LedStrategy = SW_LED_MODE1;
- pHalData->bRegUseLed = TRUE;
- break;
-
- case RT_CID_819x_Sitecom:
- pHalData->LedStrategy = SW_LED_MODE2;
- pHalData->bRegUseLed = TRUE;
- break;
-
- default:
- pHalData->LedStrategy = SW_LED_MODE0;
- break;
- }
+ case WIRELESS_MODE_B:
+ regBwOpMode = BW_OPMODE_20MHZ;
+ regRATR = RATE_ALL_CCK;
+ regRRSR = RATE_ALL_CCK;
+ break;
+ case WIRELESS_MODE_A:
+ regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
+ regRATR = RATE_ALL_OFDM_AG;
+ regRRSR = RATE_ALL_OFDM_AG;
+ break;
+ case WIRELESS_MODE_G:
+ regBwOpMode = BW_OPMODE_20MHZ;
+ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+ break;
+ case WIRELESS_MODE_AUTO:
+#ifdef TO_DO_LIST
+ if (Adapter->bInHctTest)
+ {
+ regBwOpMode = BW_OPMODE_20MHZ;
+ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+ }
+ else
#endif
+ {
+ regBwOpMode = BW_OPMODE_20MHZ;
+ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+ }
+ break;
+ case WIRELESS_MODE_N_24G:
+ // It support CCK rate by default.
+ // CCK rate will be filtered out only when associated AP does not support it.
+ regBwOpMode = BW_OPMODE_20MHZ;
+ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+ break;
+ case WIRELESS_MODE_N_5G:
+ regBwOpMode = BW_OPMODE_5G;
+ regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
+ regRRSR = RATE_ALL_OFDM_AG;
+ break;
+ }
- // Read USB PHY parameters.
- for(i=0; i<5; i++)
- priv->EEPROMUsbPhyParam[i] = *(u8 *)&hwinfo[EEPROM_USB_PHY_PARA1+i];
+ write_nic_byte(dev, BW_OPMODE, regBwOpMode);
+ {
+ u32 ratr_value = 0;
+ ratr_value = regRATR;
+ if (priv->rf_type == RF_1T2R)
+ {
+ ratr_value &= ~(RATE_ALL_OFDM_2SS);
+ }
+ write_nic_dword(dev, RATR0, ratr_value);
+ write_nic_byte(dev, UFWP, 1);
+ }
+ regTmp = read_nic_byte(dev, 0x313);
+ regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
+ write_nic_dword(dev, RRSR, regRRSR);
- //RT_PRINT_DATA(COMP_EFUSE, DBG_LOUD, ("USB PHY Param: \n"), pHalData->EEPROMUsbPhyParam, 5);
+ //
+ // Set Retry Limit here
+ //
+ write_nic_word(dev, RETRY_LIMIT,
+ priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
+ priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
+ // Set Contention Window here
+ // Set Tx AGC
- //Read Permanent MAC address
- for(i=0; i<6; i++)
- dev->dev_addr[i] = *(u8 *)&hwinfo[EEPROM_NODE_ADDRESS_BYTE_0+i];
+ // Set Tx Antenna including Feedback control
- //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress);
- write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
- write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
+ // Set Auto Rate fallback control
- RT_TRACE(COMP_INIT, "ReadAdapterInfo8192SEFuse(), Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
- dev->dev_addr[0], dev->dev_addr[1],
- dev->dev_addr[2], dev->dev_addr[3],
- dev->dev_addr[4], dev->dev_addr[5]);
- //
- // Get CustomerID(Boad Type)
- // i.e., 0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU.
- // Others: Reserved. Default is 0x2: RTL8192SU.
- //
- //if(!priv->AutoloadFailFlag)
- //{
- priv->EEPROMBoardType = *(u8 *)&hwinfo[EEPROM_BoardType];
- priv->rf_type = rtl8192SU_BoardTypeToRFtype(dev, priv->EEPROMBoardType);
- //}
- //else
- //{
- // priv->EEPROMBoardType = EEPROM_Default_BoardType;
- // priv->rf_type = RF_1T2R;
- //}
+}
- priv->rf_chip = RF_6052;
- priv->rf_chip = RF_6052;//lzm test
- RT_TRACE(COMP_INIT, "BoardType = 0x%2x\n", priv->EEPROMBoardType);
- RT_TRACE(COMP_INIT, "RF_Type = 0x%2x\n", priv->rf_type);
+//
+// Description:
+// Initial HW relted registers.
+//
+// Assumption:
+// Config RTL8192S USB MAC, we should config MAC before download FW.
+//
+// 2008.09.03, Added by Roger.
+//
+static void rtl8192SU_MacConfigBeforeFwDownloadASIC(struct net_device *dev)
+{
+ u8 tmpU1b;// i;
+// u16 tmpU2b;
+// u32 tmpU4b;
+ u8 PollingCnt = 20;
- //
- // Read antenna tx power offset of B/C/D to A from EEPROM
- // and read ThermalMeter from EEPROM
- //
- //if(!priv->AutoloadFailFlag)
- {
- priv->EEPROMTxPowerDiff = *(u8 *)&hwinfo[EEPROM_PwDiff];
- priv->EEPROMThermalMeter = *(u8 *)&hwinfo[EEPROM_ThermalMeter];
- }
- //else
- //{
- // priv->EEPROMTxPowerDiff = EEPROM_Default_PwDiff;
- // priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
- //}
+ RT_TRACE(COMP_INIT, "--->MacConfigBeforeFwDownloadASIC()\n");
- RT_TRACE(COMP_INIT, "PwDiff = %#x\n", priv->EEPROMTxPowerDiff);
- RT_TRACE(COMP_INIT, "ThermalMeter = %#x\n", priv->EEPROMThermalMeter);
+ //2MAC Initialization for power on sequence, Revised by Roger. 2008.09.03.
//
- // Read Tx Power gain offset of legacy OFDM to HT rate.
- // Read CrystalCap from EEPROM
+ //<Roger_Notes> Set control path switch to HW control and reset Digital Core, CPU Core and
+ // MAC I/O to solve FW download fail when system from resume sate.
+ // 2008.11.04.
//
- //if(!priv->AutoloadFailFlag)
+ tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
+ if(tmpU1b & 0x80)
{
- priv->EEPROMCrystalCap = *(u8 *)&hwinfo[EEPROM_CrystalCap];
- }
- //else
- //{
- // priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
- //}
-
- RT_TRACE(COMP_INIT, "CrystalCap = %#x\n", priv->EEPROMCrystalCap);
+ tmpU1b &= 0x3f;
+ write_nic_byte(dev, SYS_CLKR+1, tmpU1b);
+ }
+ // Clear FW RPWM for FW control LPS. by tynli. 2009.02.23
+ write_nic_byte(dev, RPWM, 0x0);
- //
- // Get Tx Power Base.
- //
- //if(!priv->AutoloadFailFlag)
- {
- priv->EEPROMTxPwrBase = *(u8 *)&hwinfo[EEPROM_TxPowerBase];
- }
- //else
- //{
- // priv->EEPROMTxPwrBase = EEPROM_Default_TxPowerBase;
- //}
+ tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
+ tmpU1b &= 0x73;
+ write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
+ udelay(1000);
- RT_TRACE(COMP_INIT, "TxPwrBase = %#x\n", priv->EEPROMTxPwrBase);
+ //Revised POS, suggested by SD1 Alex, 2008.09.27.
+ write_nic_byte(dev, SPS0_CTRL+1, 0x53);
+ write_nic_byte(dev, SPS0_CTRL, 0x57);
+ //Enable AFE Macro Block's Bandgap adn Enable AFE Macro Block's Mbias
+ tmpU1b = read_nic_byte(dev, AFE_MISC);
+ write_nic_byte(dev, AFE_MISC, (tmpU1b|AFE_BGEN|AFE_MBEN));
- //
- // Get TSSI value for each path.
- //
- //if(!priv->AutoloadFailFlag)
- {
- priv->EEPROMTSSI_A = *(u8 *)&hwinfo[EEPROM_TSSI_A];
- priv->EEPROMTSSI_B = *(u8 *)&hwinfo[EEPROM_TSSI_B];
- }
- //else
- //{ // Default setting for Empty EEPROM
- // priv->EEPROMTSSI_A = EEPROM_Default_TSSI;
- // priv->EEPROMTSSI_B = EEPROM_Default_TSSI;
- //}
+ //Enable PLL Power (LDOA15V)
+ tmpU1b = read_nic_byte(dev, LDOA15_CTRL);
+ write_nic_byte(dev, LDOA15_CTRL, (tmpU1b|LDA15_EN));
- RT_TRACE(COMP_INIT, "TSSI_A = %#x, TSSI_B = %#x\n", priv->EEPROMTSSI_A, priv->EEPROMTSSI_B);
+ //Enable LDOV12D block
+ tmpU1b = read_nic_byte(dev, LDOV12D_CTRL);
+ write_nic_byte(dev, LDOV12D_CTRL, (tmpU1b|LDV12_EN));
- //
- // Get Tx Power tracking mode.
- //
- //if(!priv->AutoloadFailFlag)
- {
- priv->EEPROMTxPwrTkMode = *(u8 *)&hwinfo[EEPROM_TxPwTkMode];
- }
+ //mpU1b = read_nic_byte(Adapter, SPS1_CTRL);
+ //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_LDEN));
- RT_TRACE(COMP_INIT, "TxPwrTkMod = %#x\n", priv->EEPROMTxPwrTkMode);
+ //PlatformSleepUs(2000);
+ //Enable Switch Regulator Block
+ //tmpU1b = read_nic_byte(Adapter, SPS1_CTRL);
+ //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_SWEN));
- {
- //
- // Buffer TxPwIdx(i.e., from offset 0x55~0x66, total 18Bytes)
- // Update CCK, OFDM (1T/2T)Tx Power Index from above buffer.
- //
+ //write_nic_dword(Adapter, SPS1_CTRL, 0x00a7b267);
- //
- // Get Tx Power Level by Channel
- //
- //if(!priv->AutoloadFailFlag)
- {
- // Read Tx power of Channel 1 ~ 14 from EFUSE.
- // 92S suupport RF A & B
- for (rf_path = 0; rf_path < 2; rf_path++)
- {
- for (i = 0; i < 3; i++)
- {
- // Read CCK RF A & B Tx power
- priv->RfCckChnlAreaTxPwr[rf_path][i] =
- hwinfo[EEPROM_TxPwIndex+rf_path*3+i];
+ tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
+ write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b|0x08));
- // Read OFDM RF A & B Tx power for 1T
- priv->RfOfdmChnlAreaTxPwr1T[rf_path][i] =
- hwinfo[EEPROM_TxPwIndex+6+rf_path*3+i];
+ //Engineer Packet CP test Enable
+ tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
+ write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x20));
- // Read OFDM RF A & B Tx power for 2T
- priv->RfOfdmChnlAreaTxPwr2T[rf_path][i] =
- hwinfo[EEPROM_TxPwIndex+12+rf_path*3+i];
- }
- }
+ //Support 64k IMEM, suggested by SD1 Alex.
+ tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
+ write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b& 0x68));
- }
-//
- // Update Tx Power HAL variables.
-//
- for (rf_path = 0; rf_path < 2; rf_path++)
- {
- for (i = 0; i < 3; i++)
- {
- RT_TRACE((COMP_INIT), "CCK RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
- priv->RfCckChnlAreaTxPwr[rf_path][i]);
- RT_TRACE((COMP_INIT), "OFDM-1T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i,
- priv->RfOfdmChnlAreaTxPwr1T[rf_path][i]);
- RT_TRACE((COMP_INIT), "OFDM-2T RF-%d CHan_Area-%d = 0x%x\n", rf_path, i, priv->RfOfdmChnlAreaTxPwr2T[rf_path][i]);
- }
+ //Enable AFE clock
+ tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL+1);
+ write_nic_byte(dev, AFE_XTAL_CTRL+1, (tmpU1b& 0xfb));
- // Assign dedicated channel tx power
- for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
- {
- if (i < 3) // Cjanel 1-3
- index = 0;
- else if (i < 9) // Channel 4-9
- index = 1;
- else // Channel 10-14
- index = 2;
+ //Enable AFE PLL Macro Block
+ tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL);
+ write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|0x11));
- // Record A & B CCK /OFDM - 1T/2T Channel area tx power
- priv->RfTxPwrLevelCck[rf_path][i] =
- priv->RfCckChnlAreaTxPwr[rf_path][index];
- priv->RfTxPwrLevelOfdm1T[rf_path][i] =
- priv->RfOfdmChnlAreaTxPwr1T[rf_path][index];
- priv->RfTxPwrLevelOfdm2T[rf_path][i] =
- priv->RfOfdmChnlAreaTxPwr2T[rf_path][index];
- if (rf_path == 0)
- {
- priv->TxPowerLevelOFDM24G[i] = priv->RfTxPwrLevelOfdm1T[rf_path][i] ;
- priv->TxPowerLevelCCK[i] = priv->RfTxPwrLevelCck[rf_path][i];
- }
- }
+ //Attatch AFE PLL to MACTOP/BB/PCIe Digital
+ tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL);
+ write_nic_byte(dev, SYS_ISO_CTRL, (tmpU1b&0xEE));
- for(i=0; i<14; i++)
- {
- RT_TRACE((COMP_INIT),
- "Rf-%d TxPwr CH-%d CCK OFDM_1T OFDM_2T= 0x%x/0x%x/0x%x\n",
- rf_path, i, priv->RfTxPwrLevelCck[rf_path][i],
- priv->RfTxPwrLevelOfdm1T[rf_path][i] ,
- priv->RfTxPwrLevelOfdm2T[rf_path][i] );
- }
- }
- }
+ // Switch to 40M clock
+ write_nic_byte(dev, SYS_CLKR, 0x00);
- //
- // 2009/02/09 Cosa add for new EEPROM format
- //
- for(i=0; i<14; i++) // channel 1~3 use the same Tx Power Level.
- {
- // Read tx power difference between HT OFDM 20/40 MHZ
- if (i < 3) // Cjanel 1-3
- index = 0;
- else if (i < 9) // Channel 4-9
- index = 1;
- else // Channel 10-14
- index = 2;
+ //SSC Disable
+ tmpU1b = read_nic_byte(dev, SYS_CLKR);
+ //write_nic_byte(dev, SYS_CLKR, (tmpU1b&0x5f));
+ write_nic_byte(dev, SYS_CLKR, (tmpU1b|0xa0));
- tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_HT20_DIFF+index])&0xff;
- priv->TxPwrHt20Diff[RF90_PATH_A][i] = (tempval&0xF);
- priv->TxPwrHt20Diff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
+ //Enable MAC clock
+ tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
+ write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x18));
- // Read OFDM<->HT tx power diff
- if (i < 3) // Cjanel 1-3
- tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF])&0xff;
- else if (i < 9) // Channel 4-9
- tempval = (*(u8 *)&hwinfo[EEPROM_PwDiff])&0xff;
- else // Channel 10-14
- tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+1])&0xff;
+ //Revised POS, suggested by SD1 Alex, 2008.09.27.
+ write_nic_byte(dev, PMC_FSM, 0x02);
- //cosa tempval = (*(u1Byte *)&hwinfo[EEPROM_TX_PWR_OFDM_DIFF+index])&0xff;
- priv->TxPwrLegacyHtDiff[RF90_PATH_A][i] = (tempval&0xF);
- priv->TxPwrLegacyHtDiff[RF90_PATH_B][i] = ((tempval>>4)&0xF);
+ //Enable Core digital and enable IOREG R/W
+ tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
+ write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x08));
- //
- // Read Band Edge tx power offset and check if user enable the ability
- //
- // HT 40 band edge channel
- tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE])&0xff;
- priv->TxPwrbandEdgeHt40[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
- priv->TxPwrbandEdgeHt40[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
- tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+1])&0xff;
- priv->TxPwrbandEdgeHt40[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
- priv->TxPwrbandEdgeHt40[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
- // HT 20 band edge channel
- tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+2])&0xff;
- priv->TxPwrbandEdgeHt20[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
- priv->TxPwrbandEdgeHt20[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
- tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+3])&0xff;
- priv->TxPwrbandEdgeHt20[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
- priv->TxPwrbandEdgeHt20[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
- // OFDM band edge channel
- tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+4])&0xff;
- priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0] = (tempval&0xF); // Band edge low channel
- priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1] = ((tempval>>4)&0xF); // Band edge high channel
- tempval = (*(u8 *)&hwinfo[EEPROM_TX_PWR_BAND_EDGE+5])&0xff;
- priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0] = (tempval&0xF); // Band edge low channel
- priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1] = ((tempval>>4)&0xF); // Band edge high channel
+ //Enable REG_EN
+ tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
+ write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x80));
- priv->TxPwrbandEdgeFlag = (*(u8 *)&hwinfo[TX_PWR_BAND_EDGE_CHK]);
- }
+ //Switch the control path to FW
+ tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
+ write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x80)& 0xBF);
- for(i=0; i<14; i++)
- RT_TRACE(COMP_INIT, "RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_A][i]);
- for(i=0; i<14; i++)
- RT_TRACE(COMP_INIT, "RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_A][i]);
- for(i=0; i<14; i++)
- RT_TRACE(COMP_INIT, "RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrHt20Diff[RF90_PATH_B][i]);
- for(i=0; i<14; i++)
- RT_TRACE(COMP_INIT, "RF-B Legacy to HT40 Diff[%d] = 0x%x\n", i, priv->TxPwrLegacyHtDiff[RF90_PATH_B][i]);
- RT_TRACE(COMP_INIT, "RF-A HT40 band-edge low/high power diff = 0x%x/0x%x\n",
- priv->TxPwrbandEdgeHt40[RF90_PATH_A][0],
- priv->TxPwrbandEdgeHt40[RF90_PATH_A][1]);
- RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT40 band-edge low/high power diff = 0x%x/0x%x\n",
- priv->TxPwrbandEdgeHt40[RF90_PATH_B][0],
- priv->TxPwrbandEdgeHt40[RF90_PATH_B][1]);
+ write_nic_byte(dev, CMDR, 0xFC);
+ write_nic_byte(dev, CMDR+1, 0x37);
- RT_TRACE((COMP_INIT&COMP_DBG), "RF-A HT20 band-edge low/high power diff = 0x%x/0x%x\n",
- priv->TxPwrbandEdgeHt20[RF90_PATH_A][0],
- priv->TxPwrbandEdgeHt20[RF90_PATH_A][1]);
- RT_TRACE((COMP_INIT&COMP_DBG), "RF-B HT20 band-edge low/high power diff = 0x%x/0x%x\n",
- priv->TxPwrbandEdgeHt20[RF90_PATH_B][0],
- priv->TxPwrbandEdgeHt20[RF90_PATH_B][1]);
+ //Fix the RX FIFO issue(usb error), 970410
+ tmpU1b = read_nic_byte_E(dev, 0x5c);
+ write_nic_byte_E(dev, 0x5c, (tmpU1b|BIT7));
- RT_TRACE((COMP_INIT&COMP_DBG), "RF-A OFDM band-edge low/high power diff = 0x%x/0x%x\n",
- priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0],
- priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][1]);
- RT_TRACE((COMP_INIT&COMP_DBG), "RF-B OFDM band-edge low/high power diff = 0x%x/0x%x\n",
- priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][0],
- priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_B][1]);
- RT_TRACE((COMP_INIT&COMP_DBG), "Band-edge enable flag = %d\n", priv->TxPwrbandEdgeFlag);
+ //For power save, used this in the bit file after 970621
+ tmpU1b = read_nic_byte(dev, SYS_CLKR);
+ write_nic_byte(dev, SYS_CLKR, tmpU1b&(~SYS_CPU_CLKSEL));
+
+ // Revised for 8051 ROM code wrong operation. Added by Roger. 2008.10.16.
+ write_nic_byte_E(dev, 0x1c, 0x80);
//
- // Update remained HAL variables.
+ // <Roger_EXP> To make sure that TxDMA can ready to download FW.
+ // We should reset TxDMA if IMEM RPT was not ready.
+ // Suggested by SD1 Alex. 2008.10.23.
//
- priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
- priv->LegacyHTTxPowerDiff = priv->EEPROMTxPowerDiff;
- priv->TxPowerDiff = priv->EEPROMTxPowerDiff;
- //priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);// Antenna B gain offset to antenna A, bit[3:0]
- //priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);// Antenna C gain offset to antenna A, bit[7:4]
- priv->CrystalCap = priv->EEPROMCrystalCap; // CrystalCap, bit[15:12]
- priv->ThermalMeter[0] = (priv->EEPROMThermalMeter&0x1f);// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
- priv->LedStrategy = SW_LED_MODE0;
+ do
+ {
+ tmpU1b = read_nic_byte(dev, TCR);
+ if((tmpU1b & TXDMA_INIT_VALUE) == TXDMA_INIT_VALUE)
+ break;
+ //PlatformStallExecution(5);
+ udelay(5);
+ }while(PollingCnt--); // Delay 1ms
- init_rate_adaptive(dev);
+ if(PollingCnt <= 0 )
+ {
+ RT_TRACE(COMP_INIT, "MacConfigBeforeFwDownloadASIC(): Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n", tmpU1b);
+ tmpU1b = read_nic_byte(dev, CMDR);
+ write_nic_byte(dev, CMDR, tmpU1b&(~TXDMA_EN));
+ udelay(2);
+ write_nic_byte(dev, CMDR, tmpU1b|TXDMA_EN);// Reset TxDMA
+ }
- RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
- //return RT_STATUS_SUCCESS;
+ RT_TRACE(COMP_INIT, "<---MacConfigBeforeFwDownloadASIC()\n");
}
-
//
// Description:
-// Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
+// Initial HW relted registers.
//
// Assumption:
-// 1. CR9346 regiser has verified.
-// 2. PASSIVE_LEVEL (USB interface)
+// 1. This function is only invoked at driver intialization once.
+// 2. PASSIVE LEVEL.
//
-// Created by Roger, 2008.10.21.
+// 2008.06.10, Added by Roger.
//
-static void rtl8192SU_read_eeprom_info(struct net_device *dev)
+static void rtl8192SU_MacConfigAfterFwDownload(struct net_device *dev)
{
- struct r8192_priv *priv = ieee80211_priv(dev);
- u8 tmpU1b;
+ struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
+ //PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
+ //u8 tmpU1b, RxPageCfg, i;
+ u16 tmpU2b;
+ u8 tmpU1b;//, i;
- RT_TRACE(COMP_INIT, "====> ReadAdapterInfo8192SUsb\n");
- // Retrieve Chip version.
- priv->card_8192_version = (VERSION_8192S)((read_nic_dword(dev, PMC_FSM)>>16)&0xF);
- RT_TRACE(COMP_INIT, "Chip Version ID: 0x%2x\n", priv->card_8192_version);
+ RT_TRACE(COMP_INIT, "--->MacConfigAfterFwDownload()\n");
- tmpU1b = read_nic_byte(dev, EPROM_CMD);//CR9346
+ // Enable Tx/Rx
+ tmpU2b = (BBRSTn|BB_GLB_RSTn|SCHEDULE_EN|MACRXEN|MACTXEN|DDMA_EN|
+ FW2HW_EN|RXDMA_EN|TXDMA_EN|HCI_RXDMA_EN|HCI_TXDMA_EN); //3
+ //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_COMMAND, &tmpU1b );
+ write_nic_word(dev, CMDR, tmpU2b); //LZM REGISTER COM 090305
- // To check system boot selection.
- if (tmpU1b & CmdEERPOMSEL)
- {
- RT_TRACE(COMP_INIT, "Boot from EEPROM\n");
- priv->EepromOrEfuse = TRUE;
- }
+ // Loopback mode or not
+ priv->LoopbackMode = RTL8192SU_NO_LOOPBACK; // Set no loopback as default.
+ if(priv->LoopbackMode == RTL8192SU_NO_LOOPBACK)
+ tmpU1b = LBK_NORMAL;
+ else if (priv->LoopbackMode == RTL8192SU_MAC_LOOPBACK )
+ tmpU1b = LBK_MAC_DLB;
else
- {
- RT_TRACE(COMP_INIT, "Boot from EFUSE\n");
- priv->EepromOrEfuse = FALSE;
- }
+ RT_TRACE(COMP_INIT, "Serious error: wrong loopback mode setting\n");
- // To check autoload success or not.
- if (tmpU1b & CmdEEPROM_En)
- {
- RT_TRACE(COMP_INIT, "Autoload OK!!\n");
- priv->AutoloadFailFlag=FALSE;
- rtl8192SU_ReadAdapterInfo8192SUsb(dev);//eeprom or e-fuse
- }
- else
- { // Auto load fail.
- RT_TRACE(COMP_INIT, "AutoLoad Fail reported from CR9346!!\n");
- priv->AutoloadFailFlag=TRUE;
- rtl8192SU_ConfigAdapterInfo8192SForAutoLoadFail(dev);
+ //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_LBK_MODE, &tmpU1b);
+ write_nic_byte(dev, LBKMD_SEL, tmpU1b);
- //if (IS_BOOT_FROM_EFUSE(Adapter))
- if(!priv->EepromOrEfuse)
- {
- RT_TRACE(COMP_INIT, "Update shadow map for EFuse future use!!\n");
- EFUSE_ShadowMapUpdate(dev);
- }
- }
-#ifdef TO_DO_LIST
- if((priv->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK))
- {
- pMgntInfo->ChannelPlan = HalMapChannelPlan8192S(Adapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK))));
- pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? TRUE : FALSE; // User cannot change channel plan.
- }
- else
- {
- pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan;
- }
+ // Set RCR
+ write_nic_dword(dev, RCR, priv->ReceiveConfig);
+ RT_TRACE(COMP_INIT, "MacConfigAfterFwDownload(): Current RCR settings(%#x)\n", priv->ReceiveConfig);
- switch(pMgntInfo->ChannelPlan)
+
+ // Set RQPN
+ //
+ // <Roger_Notes> 2008.08.18.
+ // 6 endpoints:
+ // (1) Page number on CMDQ is 0x03.
+ // (2) Page number on BCNQ, HQ and MGTQ is 0.
+ // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
+ // (4) Page number on PUBQ is 0xdd
+ //
+ // 11 endpoints:
+ // (1) Page number on CMDQ is 0x00.
+ // (2) Page number on BCNQ is 0x02, HQ and MGTQ are 0x03.
+ // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
+ // (4) Page number on PUBQ is 0xd8
+ //
+ //write_nic_dword(Adapter, 0xa0, 0x07070707); //BKQ, BEQ, VIQ and VOQ
+ //write_nic_byte(dev, 0xa4, 0x00); // HCCAQ
+
+ // Fix the RX FIFO issue(USB error), Rivesed by Roger, 2008-06-14
+ tmpU1b = read_nic_byte_E(dev, 0x5C);
+ write_nic_byte_E(dev, 0x5C, tmpU1b|BIT7);
+
+ // For EFUSE init configuration.
+ //if (IS_BOOT_FROM_EFUSE(Adapter)) // We may R/W EFUSE in EFUSE mode
+ if (priv->bBootFromEfuse)
{
- case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN:
- {
- PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo);
+ u8 tempval;
- pDot11dInfo->bEnabled = TRUE;
- }
- RT_TRACE(COMP_INIT, DBG_LOUD, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n"));
- break;
- }
+ tempval = read_nic_byte(dev, SYS_ISO_CTRL+1);
+ tempval &= 0xFE;
+ write_nic_byte(dev, SYS_ISO_CTRL+1, tempval);
- RT_TRACE(COMP_INIT, DBG_LOUD, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan));
- RT_TRACE(COMP_INIT, DBG_LOUD, ("ChannelPlan = %d\n" , pMgntInfo->ChannelPlan));
+ // Enable LDO 2.5V for write action
+ //tempval = read_nic_byte(Adapter, EFUSE_TEST+3);
+ //write_nic_byte(Adapter, EFUSE_TEST+3, (tempval | 0x80));
- RT_TRACE(COMP_INIT, DBG_LOUD, ("<==== ReadAdapterInfo8192S\n"));
-#endif
+ // Change Efuse Clock for write action
+ //write_nic_byte(Adapter, EFUSE_CLK, 0x03);
- RT_TRACE(COMP_INIT, "<==== ReadAdapterInfo8192SUsb\n");
+ // Change Program timing
+ write_nic_byte(dev, EFUSE_CTRL+3, 0x72);
+ //printk("!!!!!!!!!!!!!!!!!!!!!%s: write 0x33 with 0x72\n",__FUNCTION__);
+ RT_TRACE(COMP_INIT, "EFUSE CONFIG OK\n");
+ }
- //return RT_STATUS_SUCCESS;
+
+ RT_TRACE(COMP_INIT, "<---MacConfigAfterFwDownload()\n");
}
-#else
-static void rtl8192_read_eeprom_info(struct net_device* dev)
+
+void rtl8192SU_HwConfigureRTL8192SUsb(struct net_device *dev)
{
- u16 wEPROM_ID = 0;
- u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x02};
- u8 bLoad_From_EEPOM = false;
- struct r8192_priv *priv = ieee80211_priv(dev);
- u16 tmpValue = 0;
- RT_TRACE(COMP_EPROM, "===========>%s()\n", __FUNCTION__);
- wEPROM_ID = eprom_read(dev, 0); //first read EEPROM ID out;
- RT_TRACE(COMP_EPROM, "EEPROM ID is 0x%x\n", wEPROM_ID);
- if (wEPROM_ID != RTL8190_EEPROM_ID)
- {
- RT_TRACE(COMP_ERR, "EEPROM ID is invalid(is 0x%x(should be 0x%x)\n", wEPROM_ID, RTL8190_EEPROM_ID);
- }
- else
- bLoad_From_EEPOM = true;
+ struct r8192_priv *priv = ieee80211_priv(dev);
+ u8 regBwOpMode = 0;
+ u32 regRATR = 0, regRRSR = 0;
+ u8 regTmp = 0;
+ u32 i = 0;
- if (bLoad_From_EEPOM)
- {
- tmpValue = eprom_read(dev, (EEPROM_VID>>1));
- priv->eeprom_vid = endian_swap(&tmpValue);
- priv->eeprom_pid = eprom_read(dev, (EEPROM_PID>>1));
- tmpValue = eprom_read(dev, (EEPROM_ChannelPlan>>1));
- priv->eeprom_ChannelPlan =((tmpValue&0xff00)>>8);
- priv->btxpowerdata_readfromEEPORM = true;
- priv->eeprom_CustomerID = eprom_read(dev, (EEPROM_Customer_ID>>1)) >>8;
- }
- else
- {
- priv->eeprom_vid = 0;
- priv->eeprom_pid = 0;
- priv->card_8192_version = VERSION_819xU_B;
- priv->eeprom_ChannelPlan = 0;
- priv->eeprom_CustomerID = 0;
- }
- RT_TRACE(COMP_EPROM, "vid:0x%4x, pid:0x%4x, CustomID:0x%2x, ChanPlan:0x%x\n", priv->eeprom_vid, priv->eeprom_pid, priv->eeprom_CustomerID, priv->eeprom_ChannelPlan);
- //set channelplan from eeprom
- priv->ChannelPlan = priv->eeprom_ChannelPlan;
- if (bLoad_From_EEPOM)
+ //1 This part need to modified according to the rate set we filtered!!
+ //
+ // Set RRSR, RATR, and BW_OPMODE registers
+ //
+ switch(priv->ieee80211->mode)
{
- int i;
- for (i=0; i<6; i+=2)
+ case WIRELESS_MODE_B:
+ regBwOpMode = BW_OPMODE_20MHZ;
+ regRATR = RATE_ALL_CCK;
+ regRRSR = RATE_ALL_CCK;
+ break;
+ case WIRELESS_MODE_A:
+ regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
+ regRATR = RATE_ALL_OFDM_AG;
+ regRRSR = RATE_ALL_OFDM_AG;
+ break;
+ case WIRELESS_MODE_G:
+ regBwOpMode = BW_OPMODE_20MHZ;
+ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+ break;
+ case WIRELESS_MODE_AUTO:
+ if (priv->bInHctTest)
{
- u16 tmp = 0;
- tmp = eprom_read(dev, (u16)((EEPROM_NODE_ADDRESS_BYTE_0 + i)>>1));
- *(u16*)(&dev->dev_addr[i]) = tmp;
+ regBwOpMode = BW_OPMODE_20MHZ;
+ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
+ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
}
- }
- else
- {
- memcpy(dev->dev_addr, bMac_Tmp_Addr, 6);
- //should I set IDR0 here?
- }
- RT_TRACE(COMP_EPROM, "MAC addr:"MAC_FMT"\n", MAC_ARG(dev->dev_addr));
- priv->rf_type = RTL819X_DEFAULT_RF_TYPE; //default 1T2R
- priv->rf_chip = RF_8256;
-
- if (priv->card_8192_version == (u8)VERSION_819xU_A)
- {
- //read Tx power gain offset of legacy OFDM to HT rate
- if (bLoad_From_EEPOM)
- priv->EEPROMTxPowerDiff = (eprom_read(dev, (EEPROM_TxPowerDiff>>1))&0xff00) >> 8;
- else
- priv->EEPROMTxPowerDiff = EEPROM_Default_TxPower;
- RT_TRACE(COMP_EPROM, "TxPowerDiff:%d\n", priv->EEPROMTxPowerDiff);
- //read ThermalMeter from EEPROM
- if (bLoad_From_EEPOM)
- priv->EEPROMThermalMeter = (u8)(eprom_read(dev, (EEPROM_ThermalMeter>>1))&0x00ff);
else
- priv->EEPROMThermalMeter = EEPROM_Default_ThermalMeter;
- RT_TRACE(COMP_EPROM, "ThermalMeter:%d\n", priv->EEPROMThermalMeter);
- //vivi, for tx power track
- priv->TSSI_13dBm = priv->EEPROMThermalMeter *100;
- //read antenna tx power offset of B/C/D to A from EEPROM
- if (bLoad_From_EEPOM)
- priv->EEPROMPwDiff = (eprom_read(dev, (EEPROM_PwDiff>>1))&0x0f00)>>8;
- else
- priv->EEPROMPwDiff = EEPROM_Default_PwDiff;
- RT_TRACE(COMP_EPROM, "TxPwDiff:%d\n", priv->EEPROMPwDiff);
- // Read CrystalCap from EEPROM
- if (bLoad_From_EEPOM)
- priv->EEPROMCrystalCap = (eprom_read(dev, (EEPROM_CrystalCap>>1))&0x0f);
- else
- priv->EEPROMCrystalCap = EEPROM_Default_CrystalCap;
- RT_TRACE(COMP_EPROM, "CrystalCap = %d\n", priv->EEPROMCrystalCap);
- //get per-channel Tx power level
- if (bLoad_From_EEPOM)
- priv->EEPROM_Def_Ver = (eprom_read(dev, (EEPROM_TxPwIndex_Ver>>1))&0xff00)>>8;
- else
- priv->EEPROM_Def_Ver = 1;
- RT_TRACE(COMP_EPROM, "EEPROM_DEF_VER:%d\n", priv->EEPROM_Def_Ver);
- if (priv->EEPROM_Def_Ver == 0) //old eeprom definition
- {
- int i;
- if (bLoad_From_EEPOM)
- priv->EEPROMTxPowerLevelCCK = (eprom_read(dev, (EEPROM_TxPwIndex_CCK>>1))&0xff) >> 8;
- else
- priv->EEPROMTxPowerLevelCCK = 0x10;
- RT_TRACE(COMP_EPROM, "CCK Tx Power Levl: 0x%02x\n", priv->EEPROMTxPowerLevelCCK);
- for (i=0; i<3; i++)
- {
- if (bLoad_From_EEPOM)
- {
- tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_OFDM_24G+i)>>1);
- if (((EEPROM_TxPwIndex_OFDM_24G+i) % 2) == 0)
- tmpValue = tmpValue & 0x00ff;
- else
- tmpValue = (tmpValue & 0xff00) >> 8;
- }
- else
- tmpValue = 0x10;
- priv->EEPROMTxPowerLevelOFDM24G[i] = (u8) tmpValue;
- RT_TRACE(COMP_EPROM, "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n", i, priv->EEPROMTxPowerLevelCCK);
- }
- }//end if EEPROM_DEF_VER == 0
- else if (priv->EEPROM_Def_Ver == 1)
- {
- if (bLoad_From_EEPOM)
- {
- tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_CCK_V1>>1));
- tmpValue = (tmpValue & 0xff00) >> 8;
- }
- else
- tmpValue = 0x10;
- priv->EEPROMTxPowerLevelCCK_V1[0] = (u8)tmpValue;
-
- if (bLoad_From_EEPOM)
- tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_CCK_V1 + 2)>>1);
- else
- tmpValue = 0x1010;
- *((u16*)(&priv->EEPROMTxPowerLevelCCK_V1[1])) = tmpValue;
- if (bLoad_From_EEPOM)
- tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_OFDM_24G_V1>>1));
- else
- tmpValue = 0x1010;
- *((u16*)(&priv->EEPROMTxPowerLevelOFDM24G[0])) = tmpValue;
- if (bLoad_From_EEPOM)
- tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_OFDM_24G_V1+2)>>1);
- else
- tmpValue = 0x10;
- priv->EEPROMTxPowerLevelOFDM24G[2] = (u8)tmpValue;
- }//endif EEPROM_Def_Ver == 1
-
- //update HAL variables
- //
- {
- int i;
- for (i=0; i<14; i++)
- {
- if (i<=3)
- priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[0];
- else if (i>=4 && i<=9)
- priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[1];
- else
- priv->TxPowerLevelOFDM24G[i] = priv->EEPROMTxPowerLevelOFDM24G[2];
- }
-
- for (i=0; i<14; i++)
- {
- if (priv->EEPROM_Def_Ver == 0)
- {
- if (i<=3)
- priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelOFDM24G[0] + (priv->EEPROMTxPowerLevelCCK - priv->EEPROMTxPowerLevelOFDM24G[1]);
- else if (i>=4 && i<=9)
- priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK;
- else
- priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelOFDM24G[2] + (priv->EEPROMTxPowerLevelCCK - priv->EEPROMTxPowerLevelOFDM24G[1]);
- }
- else if (priv->EEPROM_Def_Ver == 1)
- {
- if (i<=3)
- priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK_V1[0];
- else if (i>=4 && i<=9)
- priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK_V1[1];
- else
- priv->TxPowerLevelCCK[i] = priv->EEPROMTxPowerLevelCCK_V1[2];
- }
- }
- }//end update HAL variables
- priv->TxPowerDiff = priv->EEPROMPwDiff;
-// Antenna B gain offset to antenna A, bit0~3
- priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);
- // Antenna C gain offset to antenna A, bit4~7
- priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);
- // CrystalCap, bit12~15
- priv->CrystalCap = priv->EEPROMCrystalCap;
- // ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
- // 92U does not enable TX power tracking.
- priv->ThermalMeter[0] = priv->EEPROMThermalMeter;
- }//end if VersionID == VERSION_819xU_A
-
-//added by vivi, for dlink led, 20080416
- switch(priv->eeprom_CustomerID)
- {
- case EEPROM_CID_RUNTOP:
- priv->CustomerID = RT_CID_819x_RUNTOP;
- break;
-
- case EEPROM_CID_DLINK:
- priv->CustomerID = RT_CID_DLINK;
- break;
-
- default:
- priv->CustomerID = RT_CID_DEFAULT;
- break;
-
- }
-
- switch(priv->CustomerID)
- {
- case RT_CID_819x_RUNTOP:
- priv->LedStrategy = SW_LED_MODE2;
- break;
-
- case RT_CID_DLINK:
- priv->LedStrategy = SW_LED_MODE4;
- break;
-
- default:
- priv->LedStrategy = SW_LED_MODE0;
- break;
-
- }
-
-
- if(priv->rf_type == RF_1T2R)
- {
- RT_TRACE(COMP_EPROM, "\n1T2R config\n");
- }
- else
- {
- RT_TRACE(COMP_EPROM, "\n2T4R config\n");
- }
-
- // 2008/01/16 MH We can only know RF type in the function. So we have to init
- // DIG RATR table again.
- init_rate_adaptive(dev);
- //we need init DIG RATR table here again.
-
- RT_TRACE(COMP_EPROM, "<===========%s()\n", __FUNCTION__);
- return;
-}
-#endif
-
-short rtl8192_get_channel_map(struct net_device * dev)
-{
- struct r8192_priv *priv = ieee80211_priv(dev);
- if(priv->ChannelPlan > COUNTRY_CODE_GLOBAL_DOMAIN){
- printk("rtl8180_init:Error channel plan! Set to default.\n");
- priv->ChannelPlan= 0;
- }
- RT_TRACE(COMP_INIT, "Channel plan is %d\n",priv->ChannelPlan);
-
- rtl819x_set_channel_map(priv->ChannelPlan, priv);
- return 0;
-}
-
-short rtl8192_init(struct net_device *dev)
-{
-
- struct r8192_priv *priv = ieee80211_priv(dev);
-
-#ifndef RTL8192SU
- memset(&(priv->stats),0,sizeof(struct Stats));
- memset(priv->txqueue_to_outpipemap,0,9);
-#ifdef PIPE12
- {
- int i=0;
- u8 queuetopipe[]={3,2,1,0,4,8,7,6,5};
- memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
-/* for(i=0;i<9;i++)
- printk("%d ",priv->txqueue_to_outpipemap[i]);
- printk("\n");*/
- }
-#else
- {
- u8 queuetopipe[]={3,2,1,0,4,4,0,4,4};
- memcpy(priv->txqueue_to_outpipemap,queuetopipe,9);
-/* for(i=0;i<9;i++)
- printk("%d ",priv->txqueue_to_outpipemap[i]);
- printk("\n");*/
- }
-#endif
-#endif
- rtl8192_init_priv_variable(dev);
- rtl8192_init_priv_lock(priv);
- rtl8192_init_priv_task(dev);
- rtl8192_get_eeprom_size(dev);
- priv->ops->rtl819x_read_eeprom_info(dev);
- rtl8192_get_channel_map(dev);
- init_hal_dm(dev);
- init_timer(&priv->watch_dog_timer);
- priv->watch_dog_timer.data = (unsigned long)dev;
- priv->watch_dog_timer.function = watch_dog_timer_callback;
-
- //rtl8192_adapter_start(dev);
-#ifdef DEBUG_EPROM
- dump_eprom(dev);
-#endif
- return 0;
-}
-
-/******************************************************************************
- *function: This function actually only set RRSR, RATR and BW_OPMODE registers
- * not to do all the hw config as its name says
- * input: net_device dev
- * output: none
- * return: none
- * notice: This part need to modified according to the rate set we filtered
- * ****************************************************************************/
-void rtl8192_hwconfig(struct net_device* dev)
-{
- u32 regRATR = 0, regRRSR = 0;
- u8 regBwOpMode = 0, regTmp = 0;
- struct r8192_priv *priv = ieee80211_priv(dev);
-
-// Set RRSR, RATR, and BW_OPMODE registers
- //
- switch(priv->ieee80211->mode)
- {
- case WIRELESS_MODE_B:
- regBwOpMode = BW_OPMODE_20MHZ;
- regRATR = RATE_ALL_CCK;
- regRRSR = RATE_ALL_CCK;
- break;
- case WIRELESS_MODE_A:
- regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
- regRATR = RATE_ALL_OFDM_AG;
- regRRSR = RATE_ALL_OFDM_AG;
- break;
- case WIRELESS_MODE_G:
- regBwOpMode = BW_OPMODE_20MHZ;
- regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
- regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
- break;
- case WIRELESS_MODE_AUTO:
-#ifdef TO_DO_LIST
- if (Adapter->bInHctTest)
- {
- regBwOpMode = BW_OPMODE_20MHZ;
- regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
- regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
- }
- else
-#endif
{
regBwOpMode = BW_OPMODE_20MHZ;
regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
break;
}
- write_nic_byte(dev, BW_OPMODE, regBwOpMode);
- {
- u32 ratr_value = 0;
- ratr_value = regRATR;
- if (priv->rf_type == RF_1T2R)
- {
- ratr_value &= ~(RATE_ALL_OFDM_2SS);
- }
- write_nic_dword(dev, RATR0, ratr_value);
- write_nic_byte(dev, UFWP, 1);
- }
- regTmp = read_nic_byte(dev, 0x313);
- regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
- write_nic_dword(dev, RRSR, regRRSR);
-
//
- // Set Retry Limit here
+ // <Roger_Notes> We disable CCK response rate until FIB CCK rate IC's back.
+ // 2008.09.23.
//
- write_nic_word(dev, RETRY_LIMIT,
- priv->ShortRetryLimit << RETRY_LIMIT_SHORT_SHIFT | \
- priv->LongRetryLimit << RETRY_LIMIT_LONG_SHIFT);
- // Set Contention Window here
-
- // Set Tx AGC
-
- // Set Tx Antenna including Feedback control
-
- // Set Auto Rate fallback control
+ regTmp = read_nic_byte(dev, INIRTSMCS_SEL);
+ regRRSR = ((regRRSR & 0x000fffff)<<8) | regTmp;
+ //
+ // Update SIFS timing.
+ //
+ //priv->SifsTime = 0x0e0e0a0a;
+ //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SIFS, (pu1Byte)&pHalData->SifsTime);
+ { u8 val[4] = {0x0e, 0x0e, 0x0a, 0x0a};
+ // SIFS for CCK Data ACK
+ write_nic_byte(dev, SIFS_CCK, val[0]);
+ // SIFS for CCK consecutive tx like CTS data!
+ write_nic_byte(dev, SIFS_CCK+1, val[1]);
-}
+ // SIFS for OFDM Data ACK
+ write_nic_byte(dev, SIFS_OFDM, val[2]);
+ // SIFS for OFDM consecutive tx like CTS data!
+ write_nic_byte(dev, SIFS_OFDM+1, val[3]);
+ }
-#ifdef RTL8192SU
+ write_nic_dword(dev, INIRTSMCS_SEL, regRRSR);
+ write_nic_byte(dev, BW_OPMODE, regBwOpMode);
-//
-// Description:
-// Initial HW relted registers.
-//
-// Assumption:
-// Config RTL8192S USB MAC, we should config MAC before download FW.
-//
-// 2008.09.03, Added by Roger.
-//
-static void rtl8192SU_MacConfigBeforeFwDownloadASIC(struct net_device *dev)
-{
- u8 tmpU1b;// i;
-// u16 tmpU2b;
-// u32 tmpU4b;
- u8 PollingCnt = 20;
+ //
+ // Suggested by SD1 Alex, 2008-06-14.
+ //
+ //PlatformEFIOWrite1Byte(Adapter, TXOP_STALL_CTRL, 0x80);//NAV to protect all TXOP.
- RT_TRACE(COMP_INIT, "--->MacConfigBeforeFwDownloadASIC()\n");
+ //
+ // Set Data Auto Rate Fallback Retry Count register.
+ //
+ write_nic_dword(dev, DARFRC, 0x02010000);
+ write_nic_dword(dev, DARFRC+4, 0x06050403);
+ write_nic_dword(dev, RARFRC, 0x02010000);
+ write_nic_dword(dev, RARFRC+4, 0x06050403);
- //2MAC Initialization for power on sequence, Revised by Roger. 2008.09.03.
+ // Set Data Auto Rate Fallback Reg. Added by Roger, 2008.09.22.
+ for (i = 0; i < 8; i++)
+ write_nic_dword(dev, ARFR0+i*4, 0x1f0ffff0);
//
- //<Roger_Notes> Set control path switch to HW control and reset Digital Core, CPU Core and
- // MAC I/O to solve FW download fail when system from resume sate.
- // 2008.11.04.
+ // Aggregation length limit. Revised by Roger. 2008.09.22.
//
- tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
- if(tmpU1b & 0x80)
- {
- tmpU1b &= 0x3f;
- write_nic_byte(dev, SYS_CLKR+1, tmpU1b);
- }
- // Clear FW RPWM for FW control LPS. by tynli. 2009.02.23
- write_nic_byte(dev, RPWM, 0x0);
-
- tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
- tmpU1b &= 0x73;
- write_nic_byte(dev, SYS_FUNC_EN+1, tmpU1b);
- udelay(1000);
+ write_nic_byte(dev, AGGLEN_LMT_H, 0x0f); // Set AMPDU length to 12Kbytes for ShortGI case.
+ write_nic_dword(dev, AGGLEN_LMT_L, 0xddd77442); // Long GI
+ write_nic_dword(dev, AGGLEN_LMT_L+4, 0xfffdd772);
- //Revised POS, suggested by SD1 Alex, 2008.09.27.
- write_nic_byte(dev, SPS0_CTRL+1, 0x53);
- write_nic_byte(dev, SPS0_CTRL, 0x57);
+ // Set NAV protection length
+ write_nic_word(dev, NAV_PROT_LEN, 0x0080);
- //Enable AFE Macro Block's Bandgap adn Enable AFE Macro Block's Mbias
- tmpU1b = read_nic_byte(dev, AFE_MISC);
- write_nic_byte(dev, AFE_MISC, (tmpU1b|AFE_BGEN|AFE_MBEN));
+ // Set TXOP stall control for several queue/HI/BCN/MGT/
+ write_nic_byte(dev, TXOP_STALL_CTRL, 0x00); // NAV Protect next packet.
- //Enable PLL Power (LDOA15V)
- tmpU1b = read_nic_byte(dev, LDOA15_CTRL);
- write_nic_byte(dev, LDOA15_CTRL, (tmpU1b|LDA15_EN));
+ // Set MSDU lifetime.
+ write_nic_byte(dev, MLT, 0x8f);
- //Enable LDOV12D block
- tmpU1b = read_nic_byte(dev, LDOV12D_CTRL);
- write_nic_byte(dev, LDOV12D_CTRL, (tmpU1b|LDV12_EN));
+ // Set CCK/OFDM SIFS
+ write_nic_word(dev, SIFS_CCK, 0x0a0a); // CCK SIFS shall always be 10us.
+ write_nic_word(dev, SIFS_OFDM, 0x0e0e);
- //mpU1b = read_nic_byte(Adapter, SPS1_CTRL);
- //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_LDEN));
+ write_nic_byte(dev, ACK_TIMEOUT, 0x40);
- //PlatformSleepUs(2000);
-
- //Enable Switch Regulator Block
- //tmpU1b = read_nic_byte(Adapter, SPS1_CTRL);
- //write_nic_byte(dev, SPS1_CTRL, (tmpU1b|SPS1_SWEN));
-
- //write_nic_dword(Adapter, SPS1_CTRL, 0x00a7b267);
-
- tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
- write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b|0x08));
-
- //Engineer Packet CP test Enable
- tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
- write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x20));
-
- //Support 64k IMEM, suggested by SD1 Alex.
- tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL+1);
- write_nic_byte(dev, SYS_ISO_CTRL+1, (tmpU1b& 0x68));
-
- //Enable AFE clock
- tmpU1b = read_nic_byte(dev, AFE_XTAL_CTRL+1);
- write_nic_byte(dev, AFE_XTAL_CTRL+1, (tmpU1b& 0xfb));
-
- //Enable AFE PLL Macro Block
- tmpU1b = read_nic_byte(dev, AFE_PLL_CTRL);
- write_nic_byte(dev, AFE_PLL_CTRL, (tmpU1b|0x11));
-
- //Attatch AFE PLL to MACTOP/BB/PCIe Digital
- tmpU1b = read_nic_byte(dev, SYS_ISO_CTRL);
- write_nic_byte(dev, SYS_ISO_CTRL, (tmpU1b&0xEE));
-
- // Switch to 40M clock
- write_nic_byte(dev, SYS_CLKR, 0x00);
-
- //SSC Disable
- tmpU1b = read_nic_byte(dev, SYS_CLKR);
- //write_nic_byte(dev, SYS_CLKR, (tmpU1b&0x5f));
- write_nic_byte(dev, SYS_CLKR, (tmpU1b|0xa0));
-
- //Enable MAC clock
- tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
- write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x18));
-
- //Revised POS, suggested by SD1 Alex, 2008.09.27.
- write_nic_byte(dev, PMC_FSM, 0x02);
-
- //Enable Core digital and enable IOREG R/W
- tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
- write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x08));
-
- //Enable REG_EN
- tmpU1b = read_nic_byte(dev, SYS_FUNC_EN+1);
- write_nic_byte(dev, SYS_FUNC_EN+1, (tmpU1b|0x80));
-
- //Switch the control path to FW
- tmpU1b = read_nic_byte(dev, SYS_CLKR+1);
- write_nic_byte(dev, SYS_CLKR+1, (tmpU1b|0x80)& 0xBF);
-
- write_nic_byte(dev, CMDR, 0xFC);
- write_nic_byte(dev, CMDR+1, 0x37);
-
- //Fix the RX FIFO issue(usb error), 970410
- tmpU1b = read_nic_byte_E(dev, 0x5c);
- write_nic_byte_E(dev, 0x5c, (tmpU1b|BIT7));
-
- //For power save, used this in the bit file after 970621
- tmpU1b = read_nic_byte(dev, SYS_CLKR);
- write_nic_byte(dev, SYS_CLKR, tmpU1b&(~SYS_CPU_CLKSEL));
-
- // Revised for 8051 ROM code wrong operation. Added by Roger. 2008.10.16.
- write_nic_byte_E(dev, 0x1c, 0x80);
+ // CF-END Threshold
+ write_nic_byte(dev, CFEND_TH, 0xFF);
//
- // <Roger_EXP> To make sure that TxDMA can ready to download FW.
- // We should reset TxDMA if IMEM RPT was not ready.
- // Suggested by SD1 Alex. 2008.10.23.
+ // For Min Spacing configuration.
//
- do
+ switch(priv->rf_type)
{
- tmpU1b = read_nic_byte(dev, TCR);
- if((tmpU1b & TXDMA_INIT_VALUE) == TXDMA_INIT_VALUE)
+ case RF_1T2R:
+ case RF_1T1R:
+ RT_TRACE(COMP_INIT, "Initializeadapter: RF_Type%s\n", (priv->rf_type==RF_1T1R? "(1T1R)":"(1T2R)"));
+ priv->MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);
+ break;
+ case RF_2T2R:
+ case RF_2T2R_GREEN:
+ RT_TRACE(COMP_INIT, "Initializeadapter:RF_Type(2T2R)\n");
+ priv->MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);
break;
- //PlatformStallExecution(5);
- udelay(5);
- }while(PollingCnt--); // Delay 1ms
-
- if(PollingCnt <= 0 )
- {
- RT_TRACE(COMP_INIT, "MacConfigBeforeFwDownloadASIC(): Polling TXDMA_INIT_VALUE timeout!! Current TCR(%#x)\n", tmpU1b);
- tmpU1b = read_nic_byte(dev, CMDR);
- write_nic_byte(dev, CMDR, tmpU1b&(~TXDMA_EN));
- udelay(2);
- write_nic_byte(dev, CMDR, tmpU1b|TXDMA_EN);// Reset TxDMA
}
+ write_nic_byte(dev, AMPDU_MIN_SPACE, priv->MinSpaceCfg);
-
- RT_TRACE(COMP_INIT, "<---MacConfigBeforeFwDownloadASIC()\n");
+ //LZM 090219
+ //
+ // For Min Spacing configuration.
+ //
+ //priv->MinSpaceCfg = 0x00;
+ //rtl8192SU_SetHwRegAmpduMinSpace(dev, priv->MinSpaceCfg);
}
-#if 0
-static void rtl8192SU_SetHwRegAmpduMinSpace(struct net_device *dev, u8 MinSpaceCfg)
-{
- struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
- struct ieee80211_device* ieee = priv->ieee80211;
- u8 MinSpacingToSet;
- u8 SecMinSpace;
-
- MinSpacingToSet = MinSpaceCfg;
- if(MinSpacingToSet <= 7)
- {
- switch(ieee->pairwise_key_type)
- {
- case KEY_TYPE_NA: SecMinSpace = 0; break;
- case KEY_TYPE_CCMP:
- case KEY_TYPE_WEP40:
- case KEY_TYPE_WEP104:
- case KEY_TYPE_TKIP: SecMinSpace = 6; break;
- default: SecMinSpace = 7; break;
- }
-
- if(MinSpacingToSet < SecMinSpace)
- MinSpacingToSet = SecMinSpace;
- priv->MinSpaceCfg = ((priv->MinSpaceCfg&0xf8) |MinSpacingToSet);
- RT_TRACE(COMP_SEC, "Set AMPDU_MIN_SPACE: %x\n", priv->MinSpaceCfg);
- write_nic_byte(dev, AMPDU_MIN_SPACE, priv->MinSpaceCfg);
- }
-
-}
-#endif
-
-//
-// Description:
-// Initial HW relted registers.
+// Description: Initial HW relted registers.
//
-// Assumption:
-// 1. This function is only invoked at driver intialization once.
-// 2. PASSIVE LEVEL.
+// Assumption: This function is only invoked at driver intialization once.
//
// 2008.06.10, Added by Roger.
-//
-static void rtl8192SU_MacConfigAfterFwDownload(struct net_device *dev)
+bool rtl8192SU_adapter_start(struct net_device *dev)
{
- struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
- //PRT_HIGH_THROUGHPUT pHTInfo = priv->ieee80211->pHTInfo;
- //u8 tmpU1b, RxPageCfg, i;
- u16 tmpU2b;
- u8 tmpU1b;//, i;
-
-
- RT_TRACE(COMP_INIT, "--->MacConfigAfterFwDownload()\n");
-
- // Enable Tx/Rx
- tmpU2b = (BBRSTn|BB_GLB_RSTn|SCHEDULE_EN|MACRXEN|MACTXEN|DDMA_EN|
- FW2HW_EN|RXDMA_EN|TXDMA_EN|HCI_RXDMA_EN|HCI_TXDMA_EN); //3
- //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_COMMAND, &tmpU1b );
- write_nic_word(dev, CMDR, tmpU2b); //LZM REGISTER COM 090305
+ struct r8192_priv *priv = ieee80211_priv(dev);
+ //u32 dwRegRead = 0;
+ //bool init_status = true;
+ //u32 ulRegRead;
+ bool rtStatus = true;
+ //u8 PipeIndex;
+ //u8 eRFPath, tmpU1b;
+ u8 fw_download_times = 1;
- // Loopback mode or not
- priv->LoopbackMode = RTL8192SU_NO_LOOPBACK; // Set no loopback as default.
- if(priv->LoopbackMode == RTL8192SU_NO_LOOPBACK)
- tmpU1b = LBK_NORMAL;
- else if (priv->LoopbackMode == RTL8192SU_MAC_LOOPBACK )
- tmpU1b = LBK_MAC_DLB;
- else
- RT_TRACE(COMP_INIT, "Serious error: wrong loopback mode setting\n");
- //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_LBK_MODE, &tmpU1b);
- write_nic_byte(dev, LBKMD_SEL, tmpU1b);
+ RT_TRACE(COMP_INIT, "--->InitializeAdapter8192SUsb()\n");
- // Set RCR
- write_nic_dword(dev, RCR, priv->ReceiveConfig);
- RT_TRACE(COMP_INIT, "MacConfigAfterFwDownload(): Current RCR settings(%#x)\n", priv->ReceiveConfig);
+ //pHalData->bGPIOChangeRF = FALSE;
- // Set RQPN
//
- // <Roger_Notes> 2008.08.18.
- // 6 endpoints:
- // (1) Page number on CMDQ is 0x03.
- // (2) Page number on BCNQ, HQ and MGTQ is 0.
- // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
- // (4) Page number on PUBQ is 0xdd
+ // <Roger_Notes> 2008.06.15.
//
- // 11 endpoints:
- // (1) Page number on CMDQ is 0x00.
- // (2) Page number on BCNQ is 0x02, HQ and MGTQ are 0x03.
- // (3) Page number on BKQ, BEQ, VIQ and VOQ are 0x07.
- // (4) Page number on PUBQ is 0xd8
+ // Initialization Steps on RTL8192SU:
+ // a. MAC initialization prior to sending down firmware code.
+ // b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
+ // c. MAC configuration after firmware has been download successfully.
+ // d. Initialize BB related configurations.
+ // e. Initialize RF related configurations.
+ // f. Start to BulkIn transfer.
//
- //write_nic_dword(Adapter, 0xa0, 0x07070707); //BKQ, BEQ, VIQ and VOQ
- //write_nic_byte(dev, 0xa4, 0x00); // HCCAQ
-#if 0 //LZM 090219
-#ifdef USE_SIX_USB_ENDPOINT
- //write_nic_dword(Adapter, 0xa5, 0x00000003); //CMDQ, MGTQ, HQ and BCNQ
- //write_nic_byte(dev, 0xa9, 0xdd); // PUBQ
- tmpU1b = read_nic_byte(dev, 0xab); // RQPN
- write_nic_byte(dev, 0xab, tmpU1b|BIT7|BIT6);// reduce to 6 endpoints.
-#else
- write_nic_dword(dev, 0xa5, 0x02030300); //CMDQ, MGTQ, HQ and BCNQ
- write_nic_byte(dev, 0xa9, 0xd8); // PUBQ
- tmpU1b = read_nic_byte(dev, 0xab); // RQPN
- write_nic_byte(dev, 0xab, (tmpU1b&(~BIT6))|BIT7); // Disable reduced endpoint.
-#endif
-#endif
-
- // Fix the RX FIFO issue(USB error), Rivesed by Roger, 2008-06-14
- tmpU1b = read_nic_byte_E(dev, 0x5C);
- write_nic_byte_E(dev, 0x5C, tmpU1b|BIT7);
-
-#if 0 //LZM 090219
//
- // Suggested by SD1 Alex, 2008-06-14.
+ //a. MAC initialization prior to send down firmware code.
//
- write_nic_byte(dev, TXOP_STALL_CTRL, 0x80);//NAV
-
+start:
+ rtl8192SU_MacConfigBeforeFwDownloadASIC(dev);
//
- // Set Data Auto Rate Fallback Retry Count register.
+ //b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
//
- write_nic_dword(dev, DARFRC, 0x04010000);
- write_nic_dword(dev, DARFRC+4, 0x09070605);
- write_nic_dword(dev, RARFRC, 0x04010000);
- write_nic_dword(dev, RARFRC+4, 0x09070605);
-
- // Set Data Auto Rate Fallback Reg. Added by Roger, 2008.09.22.
- for (i = 0; i < 8; i++)
- write_nic_dword(dev, ARFR0+i*4, 0x1f0ffff0);
-
+ rtStatus = FirmwareDownload92S(dev);
+ if(rtStatus != true)
+ {
+ if(fw_download_times == 1){
+ RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed once, Download again!!\n");
+ fw_download_times = fw_download_times + 1;
+ goto start;
+ }else{
+ RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed twice, end!!\n");
+ goto end;
+ }
+ }
//
- // Set driver info, we only accept PHY status now.
+ //c. MAC configuration after firmware has been download successfully.
//
- //write_nic_byte(dev, RXDRVINFO_SZ, 4);
+ rtl8192SU_MacConfigAfterFwDownload(dev);
+
+ //priv->bLbusEnable = TRUE;
+ //if(priv->RegRfOff == TRUE)
+ // priv->eRFPowerState = eRfOff;
+
+ // Save target channel
+ // <Roger_Notes> Current Channel will be updated again later.
+ //priv->CurrentChannel = Channel;
+ rtStatus = PHY_MACConfig8192S(dev);//===>ok
+ if(rtStatus != true)
+ {
+ RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure MAC!!\n");
+ goto end;
+ }
+ if (1){
+ int i;
+ for (i=0; i<4; i++)
+ write_nic_dword(dev,WDCAPARA_ADD[i], 0x5e4322);
+ write_nic_byte(dev,AcmHwCtrl, 0x01);
+ }
- //
- // Aggregation length limit. Revised by Roger. 2008.09.22.
- //
- write_nic_dword(dev, AGGLEN_LMT_L, 0x66666666); // Long GI
- write_nic_byte(dev, AGGLEN_LMT_H, 0x06); // Set AMPDU length to 12Kbytes for ShortGI case.
//
- // For Min Spacing configuration.
+ //d. Initialize BB related configurations.
//
- //Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AMPDU_MIN_SPACE, (u8*)(&Adapter->MgntInfo.MinSpaceCfg));
- rtl8192SU_SetHwRegAmpduMinSpace(dev,priv->MinSpaceCfg);
-#endif
- // For EFUSE init configuration.
- //if (IS_BOOT_FROM_EFUSE(Adapter)) // We may R/W EFUSE in EFUSE mode
- if (priv->bBootFromEfuse)
+ rtStatus = PHY_BBConfig8192S(dev);//===>ok
+ if(rtStatus != true)
{
- u8 tempval;
-
- tempval = read_nic_byte(dev, SYS_ISO_CTRL+1);
- tempval &= 0xFE;
- write_nic_byte(dev, SYS_ISO_CTRL+1, tempval);
-
- // Enable LDO 2.5V for write action
- //tempval = read_nic_byte(Adapter, EFUSE_TEST+3);
- //write_nic_byte(Adapter, EFUSE_TEST+3, (tempval | 0x80));
+ RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure BB!!\n");
+ goto end;
+ }
- // Change Efuse Clock for write action
- //write_nic_byte(Adapter, EFUSE_CLK, 0x03);
+ rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x58);//===>ok
- // Change Program timing
- write_nic_byte(dev, EFUSE_CTRL+3, 0x72);
- //printk("!!!!!!!!!!!!!!!!!!!!!%s: write 0x33 with 0x72\n",__FUNCTION__);
- RT_TRACE(COMP_INIT, "EFUSE CONFIG OK\n");
- }
+ //
+ // e. Initialize RF related configurations.
+ //
+ // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
+ priv->Rf_Mode = RF_OP_By_SW_3wire;
+ // For RF test only from Scott's suggestion
+ //write_nic_byte(dev, 0x27, 0xDB);
+ //write_nic_byte(dev, 0x1B, 0x07);
- RT_TRACE(COMP_INIT, "<---MacConfigAfterFwDownload()\n");
-}
-void rtl8192SU_HwConfigureRTL8192SUsb(struct net_device *dev)
-{
+ write_nic_byte(dev, AFE_XTAL_CTRL+1, 0xDB);
- struct r8192_priv *priv = ieee80211_priv(dev);
- u8 regBwOpMode = 0;
- u32 regRATR = 0, regRRSR = 0;
- u8 regTmp = 0;
- u32 i = 0;
+ // <Roger_Notes> The following IOs are configured for each RF modules.
+ // Enable RF module and reset RF and SDM module. 2008.11.17.
+ if(priv->card_8192_version == VERSION_8192S_ACUT)
+ write_nic_byte(dev, SPS1_CTRL+3, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB)); // Fix A-Cut bug.
+ else
+ write_nic_byte(dev, RF_CTRL, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB));
- //1 This part need to modified according to the rate set we filtered!!
- //
- // Set RRSR, RATR, and BW_OPMODE registers
- //
- switch(priv->ieee80211->mode)
+ rtStatus = PHY_RFConfig8192S(dev);//===>ok
+ if(rtStatus != true)
{
- case WIRELESS_MODE_B:
- regBwOpMode = BW_OPMODE_20MHZ;
- regRATR = RATE_ALL_CCK;
- regRRSR = RATE_ALL_CCK;
- break;
- case WIRELESS_MODE_A:
- regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
- regRATR = RATE_ALL_OFDM_AG;
- regRRSR = RATE_ALL_OFDM_AG;
- break;
- case WIRELESS_MODE_G:
- regBwOpMode = BW_OPMODE_20MHZ;
- regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
- regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
- break;
- case WIRELESS_MODE_AUTO:
- if (priv->bInHctTest)
- {
- regBwOpMode = BW_OPMODE_20MHZ;
- regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
- regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
- }
- else
- {
- regBwOpMode = BW_OPMODE_20MHZ;
- regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
- regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
- }
- break;
- case WIRELESS_MODE_N_24G:
- // It support CCK rate by default.
- // CCK rate will be filtered out only when associated AP does not support it.
- regBwOpMode = BW_OPMODE_20MHZ;
- regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
- regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
- break;
- case WIRELESS_MODE_N_5G:
- regBwOpMode = BW_OPMODE_5G;
- regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
- regRRSR = RATE_ALL_OFDM_AG;
- break;
+ RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure RF!!\n");
+ goto end;
}
- //
- // <Roger_Notes> We disable CCK response rate until FIB CCK rate IC's back.
- // 2008.09.23.
- //
- regTmp = read_nic_byte(dev, INIRTSMCS_SEL);
- regRRSR = ((regRRSR & 0x000fffff)<<8) | regTmp;
+
+ // Set CCK and OFDM Block "ON"
+ rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
+ rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
//
- // Update SIFS timing.
+ // Turn off Radio B while RF type is 1T1R by SD3 Wilsion's request.
+ // Revised by Roger, 2008.12.18.
//
- //priv->SifsTime = 0x0e0e0a0a;
- //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SIFS, (pu1Byte)&pHalData->SifsTime);
- { u8 val[4] = {0x0e, 0x0e, 0x0a, 0x0a};
- // SIFS for CCK Data ACK
- write_nic_byte(dev, SIFS_CCK, val[0]);
- // SIFS for CCK consecutive tx like CTS data!
- write_nic_byte(dev, SIFS_CCK+1, val[1]);
-
- // SIFS for OFDM Data ACK
- write_nic_byte(dev, SIFS_OFDM, val[2]);
- // SIFS for OFDM consecutive tx like CTS data!
- write_nic_byte(dev, SIFS_OFDM+1, val[3]);
+ if(priv->rf_type == RF_1T1R)
+ {
+ // This is needed for PHY_REG after 20081219
+ rtl8192_setBBreg(dev, rFPGA0_RFMOD, 0xff000000, 0x03);
+ // This is needed for PHY_REG before 20081219
+ //PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x11);
}
- write_nic_dword(dev, INIRTSMCS_SEL, regRRSR);
- write_nic_byte(dev, BW_OPMODE, regBwOpMode);
- //
- // Suggested by SD1 Alex, 2008-06-14.
- //
- //PlatformEFIOWrite1Byte(Adapter, TXOP_STALL_CTRL, 0x80);//NAV to protect all TXOP.
+ //LZM 090219
+ // Set CCK and OFDM Block "ON"
+ //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
+ //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
- //
- // Set Data Auto Rate Fallback Retry Count register.
- //
- write_nic_dword(dev, DARFRC, 0x02010000);
- write_nic_dword(dev, DARFRC+4, 0x06050403);
- write_nic_dword(dev, RARFRC, 0x02010000);
- write_nic_dword(dev, RARFRC+4, 0x06050403);
- // Set Data Auto Rate Fallback Reg. Added by Roger, 2008.09.22.
- for (i = 0; i < 8; i++)
- write_nic_dword(dev, ARFR0+i*4, 0x1f0ffff0);
+ //3//Get hardware version, do it in read eeprom?
+ //GetHardwareVersion819xUsb(Adapter);
+
+ //3//
+ //3 //Set Hardware
+ //3//
+ rtl8192SU_HwConfigureRTL8192SUsb(dev);//==>ok
//
- // Aggregation length limit. Revised by Roger. 2008.09.22.
+ // <Roger_Notes> We set MAC address here if autoload was failed before,
+ // otherwise IDR0 will NOT contain any value.
//
- write_nic_byte(dev, AGGLEN_LMT_H, 0x0f); // Set AMPDU length to 12Kbytes for ShortGI case.
- write_nic_dword(dev, AGGLEN_LMT_L, 0xddd77442); // Long GI
- write_nic_dword(dev, AGGLEN_LMT_L+4, 0xfffdd772);
-
- // Set NAV protection length
- write_nic_word(dev, NAV_PROT_LEN, 0x0080);
+ write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
+ write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
+ if(!priv->bInHctTest)
+ {
+ if(priv->ResetProgress == RESET_TYPE_NORESET)
+ {
+ //RT_TRACE(COMP_MLME, DBG_LOUD, ("Initializeadapter8192SUsb():RegWirelessMode(%#x) \n", Adapter->RegWirelessMode));
+ //Adapter->HalFunc.SetWirelessModeHandler(Adapter, Adapter->RegWirelessMode);
+ rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);//===>ok
+ }
+ }
+ else
+ {
+ priv->ieee80211->mode = WIRELESS_MODE_G;
+ rtl8192_SetWirelessMode(dev, WIRELESS_MODE_G);
+ }
- // Set TXOP stall control for several queue/HI/BCN/MGT/
- write_nic_byte(dev, TXOP_STALL_CTRL, 0x00); // NAV Protect next packet.
+ //Security related.
+ //-----------------------------------------------------------------------------
+ // Set up security related. 070106, by rcnjko:
+ // 1. Clear all H/W keys.
+ // 2. Enable H/W encryption/decryption.
+ //-----------------------------------------------------------------------------
+ //CamResetAllEntry(Adapter);
+ //Adapter->HalFunc.EnableHWSecCfgHandler(Adapter);
- // Set MSDU lifetime.
- write_nic_byte(dev, MLT, 0x8f);
+ //SecClearAllKeys(Adapter);
+ CamResetAllEntry(dev);
+ //SecInit(Adapter);
+ {
+ u8 SECR_value = 0x0;
+ SECR_value |= SCR_TxEncEnable;
+ SECR_value |= SCR_RxDecEnable;
+ SECR_value |= SCR_NoSKMC;
+ write_nic_byte(dev, SECR, SECR_value);
+ }
- // Set CCK/OFDM SIFS
- write_nic_word(dev, SIFS_CCK, 0x0a0a); // CCK SIFS shall always be 10us.
- write_nic_word(dev, SIFS_OFDM, 0x0e0e);
+#ifdef TO_DO_LIST
- write_nic_byte(dev, ACK_TIMEOUT, 0x40);
+ //PHY_UpdateInitialGain(dev);
- // CF-END Threshold
- write_nic_byte(dev, CFEND_TH, 0xFF);
+ if(priv->RegRfOff == true)
+ { // User disable RF via registry.
+ u8 eRFPath = 0;
- //
- // For Min Spacing configuration.
- //
- switch(priv->rf_type)
+ RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RegRfOff ----------\n");
+ MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
+ // Those action will be discard in MgntActSet_RF_State because off the same state
+ for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
+ rtl8192_setBBreg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
+ }
+ else if(priv->RfOffReason > RF_CHANGE_BY_PS)
+ { // H/W or S/W RF OFF before sleep.
+ RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RfOffReason(%d) ----------\n", priv->RfOffReason);
+ MgntActSet_RF_State(dev, eRfOff, priv->RfOffReason);
+ }
+ else
{
- case RF_1T2R:
- case RF_1T1R:
- RT_TRACE(COMP_INIT, "Initializeadapter: RF_Type%s\n", (priv->rf_type==RF_1T1R? "(1T1R)":"(1T2R)"));
- priv->MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);
- break;
- case RF_2T2R:
- case RF_2T2R_GREEN:
- RT_TRACE(COMP_INIT, "Initializeadapter:RF_Type(2T2R)\n");
- priv->MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);
- break;
+ priv->eRFPowerState = eRfOn;
+ priv->RfOffReason = 0;
+ RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): RF is on ----------\n");
}
- write_nic_byte(dev, AMPDU_MIN_SPACE, priv->MinSpaceCfg);
-
- //LZM 090219
- //
- // For Min Spacing configuration.
- //
- //priv->MinSpaceCfg = 0x00;
- //rtl8192SU_SetHwRegAmpduMinSpace(dev, priv->MinSpaceCfg);
-}
#endif
-#ifdef RTL8192SU
-// Description: Initial HW relted registers.
+
//
-// Assumption: This function is only invoked at driver intialization once.
-//
-// 2008.06.10, Added by Roger.
-bool rtl8192SU_adapter_start(struct net_device *dev)
-{
- struct r8192_priv *priv = ieee80211_priv(dev);
- //u32 dwRegRead = 0;
- //bool init_status = true;
- //u32 ulRegRead;
- bool rtStatus = true;
- //u8 PipeIndex;
- //u8 eRFPath, tmpU1b;
- u8 fw_download_times = 1;
-
-
- RT_TRACE(COMP_INIT, "--->InitializeAdapter8192SUsb()\n");
-
- //pHalData->bGPIOChangeRF = FALSE;
-
-
- //
- // <Roger_Notes> 2008.06.15.
- //
- // Initialization Steps on RTL8192SU:
- // a. MAC initialization prior to sending down firmware code.
- // b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
- // c. MAC configuration after firmware has been download successfully.
- // d. Initialize BB related configurations.
- // e. Initialize RF related configurations.
- // f. Start to BulkIn transfer.
- //
-
- //
- //a. MAC initialization prior to send down firmware code.
- //
-start:
- rtl8192SU_MacConfigBeforeFwDownloadASIC(dev);
-
- //
- //b. Download firmware code step by step(i.e., IMEM, EMEM, DMEM).
- //
- rtStatus = FirmwareDownload92S(dev);
- if(rtStatus != true)
- {
- if(fw_download_times == 1){
- RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed once, Download again!!\n");
- fw_download_times = fw_download_times + 1;
- goto start;
- }else{
- RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Download Firmware failed twice, end!!\n");
- goto end;
- }
- }
- //
- //c. MAC configuration after firmware has been download successfully.
- //
- rtl8192SU_MacConfigAfterFwDownload(dev);
-
- //priv->bLbusEnable = TRUE;
- //if(priv->RegRfOff == TRUE)
- // priv->eRFPowerState = eRfOff;
-
- // Save target channel
- // <Roger_Notes> Current Channel will be updated again later.
- //priv->CurrentChannel = Channel;
- rtStatus = PHY_MACConfig8192S(dev);//===>ok
- if(rtStatus != true)
- {
- RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure MAC!!\n");
- goto end;
- }
- if (1){
- int i;
- for (i=0; i<4; i++)
- write_nic_dword(dev,WDCAPARA_ADD[i], 0x5e4322);
- write_nic_byte(dev,AcmHwCtrl, 0x01);
- }
-
-
- //
- //d. Initialize BB related configurations.
- //
-
- rtStatus = PHY_BBConfig8192S(dev);//===>ok
- if(rtStatus != true)
- {
- RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure BB!!\n");
- goto end;
- }
-
- rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0xff, 0x58);//===>ok
-
- //
- // e. Initialize RF related configurations.
- //
- // 2007/11/02 MH Before initalizing RF. We can not use FW to do RF-R/W.
- priv->Rf_Mode = RF_OP_By_SW_3wire;
-
- // For RF test only from Scott's suggestion
- //write_nic_byte(dev, 0x27, 0xDB);
- //write_nic_byte(dev, 0x1B, 0x07);
-
-
- write_nic_byte(dev, AFE_XTAL_CTRL+1, 0xDB);
-
- // <Roger_Notes> The following IOs are configured for each RF modules.
- // Enable RF module and reset RF and SDM module. 2008.11.17.
- if(priv->card_8192_version == VERSION_8192S_ACUT)
- write_nic_byte(dev, SPS1_CTRL+3, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB)); // Fix A-Cut bug.
- else
- write_nic_byte(dev, RF_CTRL, (u8)(RF_EN|RF_RSTB|RF_SDMRSTB));
-
- rtStatus = PHY_RFConfig8192S(dev);//===>ok
- if(rtStatus != true)
- {
- RT_TRACE(COMP_INIT, "InitializeAdapter8192SUsb(): Fail to configure RF!!\n");
- goto end;
- }
-
-
- // Set CCK and OFDM Block "ON"
- rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
- rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
-
- //
- // Turn off Radio B while RF type is 1T1R by SD3 Wilsion's request.
- // Revised by Roger, 2008.12.18.
- //
- if(priv->rf_type == RF_1T1R)
- {
- // This is needed for PHY_REG after 20081219
- rtl8192_setBBreg(dev, rFPGA0_RFMOD, 0xff000000, 0x03);
- // This is needed for PHY_REG before 20081219
- //PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x11);
- }
-
-#if (RTL8192SU_DISABLE_IQK==0)
- // For 1T2R IQK only currently.
- if (priv->card_8192_version == VERSION_8192S_BCUT)
- {
- PHY_IQCalibrateBcut(dev);
- }
- else if (priv->card_8192_version == VERSION_8192S_ACUT)
- {
- PHY_IQCalibrate(dev);
- }
-#endif
-
- //LZM 090219
- // Set CCK and OFDM Block "ON"
- //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
- //rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
-
-
- //3//Get hardware version, do it in read eeprom?
- //GetHardwareVersion819xUsb(Adapter);
-
- //3//
- //3 //Set Hardware
- //3//
- rtl8192SU_HwConfigureRTL8192SUsb(dev);//==>ok
-
- //
- // <Roger_Notes> We set MAC address here if autoload was failed before,
- // otherwise IDR0 will NOT contain any value.
- //
- write_nic_dword(dev, IDR0, ((u32*)dev->dev_addr)[0]);
- write_nic_word(dev, IDR4, ((u16*)(dev->dev_addr + 4))[0]);
- if(!priv->bInHctTest)
- {
- if(priv->ResetProgress == RESET_TYPE_NORESET)
- {
- //RT_TRACE(COMP_MLME, DBG_LOUD, ("Initializeadapter8192SUsb():RegWirelessMode(%#x) \n", Adapter->RegWirelessMode));
- //Adapter->HalFunc.SetWirelessModeHandler(Adapter, Adapter->RegWirelessMode);
- rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);//===>ok
- }
- }
- else
- {
- priv->ieee80211->mode = WIRELESS_MODE_G;
- rtl8192_SetWirelessMode(dev, WIRELESS_MODE_G);
- }
-
- //Security related.
- //-----------------------------------------------------------------------------
- // Set up security related. 070106, by rcnjko:
- // 1. Clear all H/W keys.
- // 2. Enable H/W encryption/decryption.
- //-----------------------------------------------------------------------------
- //CamResetAllEntry(Adapter);
- //Adapter->HalFunc.EnableHWSecCfgHandler(Adapter);
-
- //SecClearAllKeys(Adapter);
- CamResetAllEntry(dev);
- //SecInit(Adapter);
- {
- u8 SECR_value = 0x0;
- SECR_value |= SCR_TxEncEnable;
- SECR_value |= SCR_RxDecEnable;
- SECR_value |= SCR_NoSKMC;
- write_nic_byte(dev, SECR, SECR_value);
- }
-
-#if 0
-
- if(pHalData->VersionID == VERSION_8192SU_A)
- {
- // cosa add for tx power level initialization.
- GetTxPowerOriginalOffset(Adapter);
- SetTxPowerLevel819xUsb(Adapter, Channel);
- }
-#endif
-
-
-#ifdef TO_DO_LIST
-
- //PHY_UpdateInitialGain(dev);
-
- if(priv->RegRfOff == true)
- { // User disable RF via registry.
- u8 eRFPath = 0;
-
- RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RegRfOff ----------\n");
- MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW);
- // Those action will be discard in MgntActSet_RF_State because off the same state
- for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
- rtl8192_setBBreg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
- }
- else if(priv->RfOffReason > RF_CHANGE_BY_PS)
- { // H/W or S/W RF OFF before sleep.
- RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): Turn off RF for RfOffReason(%d) ----------\n", priv->RfOffReason);
- MgntActSet_RF_State(dev, eRfOff, priv->RfOffReason);
- }
- else
- {
- priv->eRFPowerState = eRfOn;
- priv->RfOffReason = 0;
- RT_TRACE((COMP_INIT|COMP_RF), "InitializeAdapter8192SUsb(): RF is on ----------\n");
- }
-
-#endif
-
-
-//
-// f. Start to BulkIn transfer.
+// f. Start to BulkIn transfer.
//
#ifdef TO_DO_LIST
// <Roger_Notes> We return status here for temporal FPGA verification. 2008.05.12.
//
-// The following IO was for FPGA verification purpose. Added by Roger, 2008.09.11.
-#if 0
- // 2008/08/19 MH From SD1 Jong, we must write some register for true PHY/MAC FPGA.
- write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x30);
- write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x30);
-
- write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
-
- //write_nic_dword(Adapter, RCR, 0x817FF02F);
-
- write_nic_dword(Adapter, rTxAGC_Mcs15_Mcs12, 0x06060606);
-#endif
end:
return rtStatus;
}
-#else
+/***************************************************************************
+ -------------------------------NET STUFF---------------------------
+***************************************************************************/
-//InitializeAdapter and PhyCfg
-bool rtl8192_adapter_start(struct net_device *dev)
+static struct net_device_stats *rtl8192_stats(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
- u32 dwRegRead = 0;
- bool init_status = true;
- RT_TRACE(COMP_INIT, "====>%s()\n", __FUNCTION__);
- priv->Rf_Mode = RF_OP_By_SW_3wire;
- //for ASIC power on sequence
- write_nic_byte_E(dev, 0x5f, 0x80);
- mdelay(50);
- write_nic_byte_E(dev, 0x5f, 0xf0);
- write_nic_byte_E(dev, 0x5d, 0x00);
- write_nic_byte_E(dev, 0x5e, 0x80);
- write_nic_byte(dev, 0x17, 0x37);
- mdelay(10);
-//#ifdef TO_DO_LIST
- priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
- //config CPUReset Register
- //Firmware Reset or not?
- dwRegRead = read_nic_dword(dev, CPU_GEN);
- if (priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
- dwRegRead |= CPU_GEN_SYSTEM_RESET; //do nothing here?
- else if (priv->pFirmware->firmware_status == FW_STATUS_5_READY)
- dwRegRead |= CPU_GEN_FIRMWARE_RESET;
- else
- RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)\n", __FUNCTION__, priv->pFirmware->firmware_status);
- write_nic_dword(dev, CPU_GEN, dwRegRead);
- //mdelay(30);
- //config BB.
- rtl8192_BBConfig(dev);
+ return &priv->ieee80211->stats;
+}
-#if 1
- //Loopback mode or not
- priv->LoopbackMode = RTL819xU_NO_LOOPBACK;
-// priv->LoopbackMode = RTL819xU_MAC_LOOPBACK;
-
- dwRegRead = read_nic_dword(dev, CPU_GEN);
- if (priv->LoopbackMode == RTL819xU_NO_LOOPBACK)
- dwRegRead = ((dwRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
- else if (priv->LoopbackMode == RTL819xU_MAC_LOOPBACK)
- dwRegRead |= CPU_CCK_LOOPBACK;
- else
- RT_TRACE(COMP_ERR, "Serious error in %s(): wrong loopback mode setting(%d)\n", __FUNCTION__, priv->LoopbackMode);
+bool
+HalTxCheckStuck819xUsb(
+ struct net_device *dev
+ )
+{
+ struct r8192_priv *priv = ieee80211_priv(dev);
+ u16 RegTxCounter = read_nic_word(dev, 0x128);
+ bool bStuck = FALSE;
+ RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
+ if(priv->TxCounter==RegTxCounter)
+ bStuck = TRUE;
- write_nic_dword(dev, CPU_GEN, dwRegRead);
+ priv->TxCounter = RegTxCounter;
- //after reset cpu, we need wait for a seconds to write in register.
- udelay(500);
-
- //xiong add for new bitfile:usb suspend reset pin set to 1. //do we need?
- write_nic_byte_E(dev, 0x5f, (read_nic_byte_E(dev, 0x5f)|0x20));
-
- //Set Hardware
- rtl8192_hwconfig(dev);
-
- //turn on Tx/Rx
- write_nic_byte(dev, CMDR, CR_RE|CR_TE);
-
- //set IDR0 here
- write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
- write_nic_word(dev, MAC4, ((u16*)(dev->dev_addr + 4))[0]);
-
- //set RCR
- write_nic_dword(dev, RCR, priv->ReceiveConfig);
-
- //Initialize Number of Reserved Pages in Firmware Queue
- write_nic_dword(dev, RQPN1, NUM_OF_PAGE_IN_FW_QUEUE_BK << RSVD_FW_QUEUE_PAGE_BK_SHIFT |\
- NUM_OF_PAGE_IN_FW_QUEUE_BE << RSVD_FW_QUEUE_PAGE_BE_SHIFT | \
- NUM_OF_PAGE_IN_FW_QUEUE_VI << RSVD_FW_QUEUE_PAGE_VI_SHIFT | \
- NUM_OF_PAGE_IN_FW_QUEUE_VO <<RSVD_FW_QUEUE_PAGE_VO_SHIFT);
- write_nic_dword(dev, RQPN2, NUM_OF_PAGE_IN_FW_QUEUE_MGNT << RSVD_FW_QUEUE_PAGE_MGNT_SHIFT |\
- NUM_OF_PAGE_IN_FW_QUEUE_CMD << RSVD_FW_QUEUE_PAGE_CMD_SHIFT);
- write_nic_dword(dev, RQPN3, APPLIED_RESERVED_QUEUE_IN_FW| \
- NUM_OF_PAGE_IN_FW_QUEUE_BCN<<RSVD_FW_QUEUE_PAGE_BCN_SHIFT
-// | NUM_OF_PAGE_IN_FW_QUEUE_PUB<<RSVD_FW_QUEUE_PAGE_PUB_SHIFT
- );
- write_nic_dword(dev, RATR0+4*7, (RATE_ALL_OFDM_AG | RATE_ALL_CCK));
-
- //Set AckTimeout
- // TODO: (it value is only for FPGA version). need to be changed!!2006.12.18, by Emily
- write_nic_byte(dev, ACK_TIMEOUT, 0x30);
-
-// RT_TRACE(COMP_INIT, "%s():priv->ResetProgress is %d\n", __FUNCTION__,priv->ResetProgress);
- if(priv->ResetProgress == RESET_TYPE_NORESET)
- rtl8192_SetWirelessMode(dev, priv->ieee80211->mode);
- if(priv->ResetProgress == RESET_TYPE_NORESET){
- CamResetAllEntry(dev);
- {
- u8 SECR_value = 0x0;
- SECR_value |= SCR_TxEncEnable;
- SECR_value |= SCR_RxDecEnable;
- SECR_value |= SCR_NoSKMC;
- write_nic_byte(dev, SECR, SECR_value);
- }
- }
-
- //Beacon related
- write_nic_word(dev, ATIMWND, 2);
- write_nic_word(dev, BCN_INTERVAL, 100);
-
- {
-#define DEFAULT_EDCA 0x005e4332
- int i;
- for (i=0; i<QOS_QUEUE_NUM; i++)
- write_nic_dword(dev, WDCAPARA_ADD[i], DEFAULT_EDCA);
- }
-
- rtl8192_phy_configmac(dev);
-
- if (priv->card_8192_version == (u8) VERSION_819xU_A)
- {
- rtl8192_phy_getTxPower(dev);
- rtl8192_phy_setTxPower(dev, priv->chan);
- }
-
-
- priv->usb_error = false;
- //Firmware download
- init_status = init_firmware(dev);
- if(!init_status)
- {
- RT_TRACE(COMP_ERR,"ERR!!! %s(): Firmware download is failed\n", __FUNCTION__);
- return init_status;
- }
- RT_TRACE(COMP_INIT, "%s():after firmware download\n", __FUNCTION__);
- //
-#ifdef TO_DO_LIST
-if(Adapter->ResetProgress == RESET_TYPE_NORESET)
- {
- if(pMgntInfo->RegRfOff == TRUE)
- { // User disable RF via registry.
- RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter819xUsb(): Turn off RF for RegRfOff ----------\n"));
- MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_SW);
- // Those action will be discard in MgntActSet_RF_State because off the same state
- for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
- PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
- }
- else if(pMgntInfo->RfOffReason > RF_CHANGE_BY_PS)
- { // H/W or S/W RF OFF before sleep.
- RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter819xUsb(): Turn off RF for RfOffReason(%d) ----------\n", pMgntInfo->RfOffReason));
- MgntActSet_RF_State(Adapter, eRfOff, pMgntInfo->RfOffReason);
- }
- else
- {
- pHalData->eRFPowerState = eRfOn;
- pMgntInfo->RfOffReason = 0;
- RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter819xUsb(): RF is on ----------\n"));
- }
- }
- else
- {
- if(pHalData->eRFPowerState == eRfOff)
- {
- MgntActSet_RF_State(Adapter, eRfOff, pMgntInfo->RfOffReason);
- // Those action will be discard in MgntActSet_RF_State because off the same state
- for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
- PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0);
- }
- }
-#endif
- //config RF.
- if(priv->ResetProgress == RESET_TYPE_NORESET){
- rtl8192_phy_RFConfig(dev);
- RT_TRACE(COMP_INIT, "%s():after phy RF config\n", __FUNCTION__);
- }
-
-
- if(priv->ieee80211->FwRWRF)
- // We can force firmware to do RF-R/W
- priv->Rf_Mode = RF_OP_By_FW;
- else
- priv->Rf_Mode = RF_OP_By_SW_3wire;
-
-
- rtl8192_phy_updateInitGain(dev);
- /*--set CCK and OFDM Block "ON"--*/
- rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
- rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
-
- if(priv->ResetProgress == RESET_TYPE_NORESET)
- {
- //if D or C cut
- u8 tmpvalue = read_nic_byte(dev, 0x301);
- if(tmpvalue ==0x03)
- {
- priv->bDcut = TRUE;
- RT_TRACE(COMP_POWER_TRACKING, "D-cut\n");
- }
- else
- {
- priv->bDcut = FALSE;
- RT_TRACE(COMP_POWER_TRACKING, "C-cut\n");
- }
- dm_initialize_txpower_tracking(dev);
-
- if(priv->bDcut == TRUE)
- {
- u32 i, TempCCk;
- u32 tmpRegA= rtl8192_QueryBBReg(dev,rOFDM0_XATxIQImbalance,bMaskDWord);
- // u32 tmpRegC= rtl8192_QueryBBReg(dev,rOFDM0_XCTxIQImbalance,bMaskDWord);
- for(i = 0; i<TxBBGainTableLength; i++)
- {
- if(tmpRegA == priv->txbbgain_table[i].txbbgain_value)
- {
- priv->rfa_txpowertrackingindex= (u8)i;
- priv->rfa_txpowertrackingindex_real= (u8)i;
- priv->rfa_txpowertracking_default= priv->rfa_txpowertrackingindex;
- break;
- }
- }
-
- TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
-
- for(i=0 ; i<CCKTxBBGainTableLength ; i++)
- {
-
- if(TempCCk == priv->cck_txbbgain_table[i].ccktxbb_valuearray[0])
- {
- priv->cck_present_attentuation_20Mdefault=(u8) i;
- break;
- }
- }
- priv->cck_present_attentuation_40Mdefault= 0;
- priv->cck_present_attentuation_difference= 0;
- priv->cck_present_attentuation = priv->cck_present_attentuation_20Mdefault;
-
- // pMgntInfo->bTXPowerTracking = FALSE;//TEMPLY DISABLE
- }
- }
- write_nic_byte(dev, 0x87, 0x0);
-
-
-#endif
- return init_status;
-}
-
-#endif
-/* this configures registers for beacon tx and enables it via
- * rtl8192_beacon_tx_enable(). rtl8192_beacon_tx_disable() might
- * be used to stop beacon transmission
- */
-#if 0
-void rtl8192_start_tx_beacon(struct net_device *dev)
-{
- int i;
- struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
- u16 word;
- DMESG("Enabling beacon TX");
- //write_nic_byte(dev, TX_CONF,0xe6);// TX_CONF
- //rtl8192_init_beacon(dev);
- //set_nic_txring(dev);
-// rtl8192_prepare_beacon(dev);
- rtl8192_irq_disable(dev);
-// rtl8192_beacon_tx_enable(dev);
- rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
- //write_nic_byte(dev,0x9d,0x20); //DMA Poll
- //write_nic_word(dev,0x7a,0);
- //write_nic_word(dev,0x7a,0x8000);
-
-
- word = read_nic_word(dev, BcnItv);
- word &= ~BcnItv_BcnItv; // clear Bcn_Itv
- write_nic_word(dev, BcnItv, word);
-
- write_nic_word(dev, AtimWnd,
- read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd);
-
- word = read_nic_word(dev, BCN_INTR_ITV);
- word &= ~BCN_INTR_ITV_MASK;
-
- //word |= priv->ieee80211->beacon_interval *
- // ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
- // FIXME:FIXME check if correct ^^ worked with 0x3e8;
-
- write_nic_word(dev, BCN_INTR_ITV, word);
-
- //write_nic_word(dev,0x2e,0xe002);
- //write_nic_dword(dev,0x30,0xb8c7832e);
- for(i=0; i<ETH_ALEN; i++)
- write_nic_byte(dev, BSSID+i, priv->ieee80211->beacon_cell_ssid[i]);
-
-// rtl8192_update_msr(dev);
-
-
- //write_nic_byte(dev,CONFIG4,3); /* !!!!!!!!!! */
-
- rtl8192_set_mode(dev, EPROM_CMD_NORMAL);
-
- rtl8192_irq_enable(dev);
-
- /* VV !!!!!!!!!! VV*/
- /*
- rtl8192_set_mode(dev,EPROM_CMD_CONFIG);
- write_nic_byte(dev,0x9d,0x00);
- rtl8192_set_mode(dev,EPROM_CMD_NORMAL);
-*/
-}
-#endif
-/***************************************************************************
- -------------------------------NET STUFF---------------------------
-***************************************************************************/
-
-static struct net_device_stats *rtl8192_stats(struct net_device *dev)
-{
- struct r8192_priv *priv = ieee80211_priv(dev);
-
- return &priv->ieee80211->stats;
-}
-
-bool
-HalTxCheckStuck819xUsb(
- struct net_device *dev
- )
-{
- struct r8192_priv *priv = ieee80211_priv(dev);
- u16 RegTxCounter = read_nic_word(dev, 0x128);
- bool bStuck = FALSE;
- RT_TRACE(COMP_RESET,"%s():RegTxCounter is %d,TxCounter is %d\n",__FUNCTION__,RegTxCounter,priv->TxCounter);
- if(priv->TxCounter==RegTxCounter)
- bStuck = TRUE;
-
- priv->TxCounter = RegTxCounter;
-
- return bStuck;
-}
+ return bStuck;
+}
/*
* <Assumption: RT_TX_SPINLOCK is acquired.>
//printk("===============>watch_dog timer\n");
queue_delayed_work(priv->priv_wq,&priv->watch_dog_wq, 0);
mod_timer(&priv->watch_dog_timer, jiffies + MSECS(IEEE80211_WATCH_DOG_TIME));
-#if 0
- priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
- add_timer(&priv->watch_dog_timer);
-#endif
}
int _rtl8192_up(struct net_device *dev)
{
return ret;
}
-#ifdef RTL8192SU
u8 rtl8192SU_HwRateToMRate(bool bIsHT, u8 rate,bool bFirstAMPDU)
{
}
return ret_rate;
}
-#endif
u8 HwRateToMRate90(bool bIsHT, u8 rate)
{
bcheck = true;
}else
{
- #if 0
- // if previous packet is aggregated packet, and current packet
- // (1) is not AMPDU
- // (2) is the first packet of one AMPDU
- // that means the previous packet is the last one aggregated packet
- if( !pcurrent_stats->bIsAMPDU || pcurrent_stats->bFirstMPDU)
- bcheck = true;
- #endif
}
}
else
{
- priv->undecorated_smoothed_pwdb =
- ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
- (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
- }
-#else
- //Fixed by Jacken 2008-03-20
- if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
- {
- pHalData->UndecoratedSmoothedPWDB =
- ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
- pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
- }
- else
- {
- pHalData->UndecoratedSmoothedPWDB =
- ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
- }
-#endif
-
- }
-
- //
- // Check EVM
- //
- /* record the general EVM to the sliding window. */
- if(pprevious_stats->SignalQuality == 0)
- {
- }
- else
- {
- if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
- if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
- slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
- last_evm = priv->stats.slide_evm[slide_evm_index];
- priv->stats.slide_evm_total -= last_evm;
- }
-
- priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
-
- priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
- if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
- slide_evm_index = 0;
-
- // <1> Showed on UI for user, in percentage.
- tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
- priv->stats.signal_quality = tmp_val;
- //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
- priv->stats.last_signal_strength_inpercent = tmp_val;
- }
-
- // <2> Showed on UI for engineering
- if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
- {
- for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
- {
- if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
- {
- if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
- {
- priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
- }
- priv->stats.rx_evm_percentage[nspatial_stream] =
- ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
- (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
- }
- }
- }
- }
-
-
-}
-
-/*-----------------------------------------------------------------------------
- * Function: rtl819x_query_rxpwrpercentage()
- *
- * Overview:
- *
- * Input: char antpower
- *
- * Output: NONE
- *
- * Return: 0-100 percentage
- *
- * Revised History:
- * When Who Remark
- * 05/26/2008 amy Create Version 0 porting from windows code.
- *
- *---------------------------------------------------------------------------*/
-static u8 rtl819x_query_rxpwrpercentage(
- char antpower
- )
-{
- if ((antpower <= -100) || (antpower >= 20))
- {
- return 0;
- }
- else if (antpower >= 0)
- {
- return 100;
- }
- else
- {
- return (100+antpower);
- }
-
-} /* QueryRxPwrPercentage */
-
-static u8
-rtl819x_evm_dbtopercentage(
- char value
- )
-{
- char ret_val;
-
- ret_val = value;
-
- if(ret_val >= 0)
- ret_val = 0;
- if(ret_val <= -33)
- ret_val = -33;
- ret_val = 0 - ret_val;
- ret_val*=3;
- if(ret_val == 99)
- ret_val = 100;
- return(ret_val);
-}
-//
-// Description:
-// We want good-looking for signal strength/quality
-// 2007/7/19 01:09, by cosa.
-//
-long
-rtl819x_signal_scale_mapping(
- long currsig
- )
-{
- long retsig;
-
- // Step 1. Scale mapping.
- if(currsig >= 61 && currsig <= 100)
- {
- retsig = 90 + ((currsig - 60) / 4);
- }
- else if(currsig >= 41 && currsig <= 60)
- {
- retsig = 78 + ((currsig - 40) / 2);
- }
- else if(currsig >= 31 && currsig <= 40)
- {
- retsig = 66 + (currsig - 30);
- }
- else if(currsig >= 21 && currsig <= 30)
- {
- retsig = 54 + (currsig - 20);
- }
- else if(currsig >= 5 && currsig <= 20)
- {
- retsig = 42 + (((currsig - 5) * 2) / 3);
- }
- else if(currsig == 4)
- {
- retsig = 36;
- }
- else if(currsig == 3)
- {
- retsig = 27;
- }
- else if(currsig == 2)
- {
- retsig = 18;
- }
- else if(currsig == 1)
- {
- retsig = 9;
- }
- else
- {
- retsig = currsig;
- }
-
- return retsig;
-}
-
-#ifdef RTL8192SU
-/*-----------------------------------------------------------------------------
- * Function: QueryRxPhyStatus8192S()
- *
- * Overview:
- *
- * Input: NONE
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Revised History:
- * When Who Remark
- * 06/01/2007 MHC Create Version 0.
- * 06/05/2007 MHC Accordign to HW's new data sheet, we add CCK and OFDM
- * descriptor definition.
- * 07/04/2007 MHC According to Jerry and Bryant's document. We read
- * ir_isolation and ext_lna for RF's init value and use
- * to compensate RSSI after receiving packets.
- * 09/10/2008 MHC Modify name and PHY status field for 92SE.
- * 09/19/2008 MHC Add CCK/OFDM SS/SQ for 92S series.
- *
- *---------------------------------------------------------------------------*/
-static void rtl8192SU_query_rxphystatus(
- struct r8192_priv * priv,
- struct ieee80211_rx_stats * pstats,
- rx_desc_819x_usb *pDesc,
- rx_drvinfo_819x_usb * pdrvinfo,
- struct ieee80211_rx_stats * precord_stats,
- bool bpacket_match_bssid,
- bool bpacket_toself,
- bool bPacketBeacon,
- bool bToSelfBA
- )
-{
- //PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
- //PHY_STS_CCK_8192S_T *pCck_buf;
- phy_sts_cck_819xusb_t * pcck_buf;
- phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
- //u8 *prxpkt;
- //u8 i, max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
- u8 i, max_spatial_stream, rxsc_sgien_exflg;
- char rx_pwr[4], rx_pwr_all=0;
- //long rx_avg_pwr = 0;
- //char rx_snrX, rx_evmX;
- u8 evm, pwdb_all;
- u32 RSSI, total_rssi=0;//, total_evm=0;
-// long signal_strength_index = 0;
- u8 is_cck_rate=0;
- u8 rf_rx_num = 0;
-
-
-
- priv->stats.numqry_phystatus++;
-
- is_cck_rate = rx_hal_is_cck_rate(pDesc);
-
- // Record it for next packet processing
- memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
- pstats->bPacketMatchBSSID = precord_stats->bPacketMatchBSSID = bpacket_match_bssid;
- pstats->bPacketToSelf = precord_stats->bPacketToSelf = bpacket_toself;
- pstats->bIsCCK = precord_stats->bIsCCK = is_cck_rate;//RX_HAL_IS_CCK_RATE(pDrvInfo);
- pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
- pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
-
-#ifndef RTL8192SU
- phy_sts_ofdm_819xusb_t* pofdm_buf = NULL;
- prxpkt = (u8*)pdrvinfo;
-
- /* Move pointer to the 16th bytes. Phy status start address. */
- prxpkt += sizeof(rx_drvinfo_819x_usb);
-
- /* Initial the cck and ofdm buffer pointer */
- pcck_buf = (phy_sts_cck_819xusb_t *)prxpkt;
- pofdm_buf = (phy_sts_ofdm_819xusb_t *)prxpkt;
-#endif
-
- pstats->RxMIMOSignalQuality[0] = -1;
- pstats->RxMIMOSignalQuality[1] = -1;
- precord_stats->RxMIMOSignalQuality[0] = -1;
- precord_stats->RxMIMOSignalQuality[1] = -1;
-
- if(is_cck_rate)
- {
- u8 report;//, tmp_pwdb;
- //char cck_adc_pwdb[4];
-
- // CCK Driver info Structure is not the same as OFDM packet.
- pcck_buf = (phy_sts_cck_819xusb_t *)pdrvinfo;
-
- //
- // (1)Hardware does not provide RSSI for CCK
- //
-
- //
- // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
- //
-
- priv->stats.numqry_phystatusCCK++;
-
- if(!priv->bCckHighPower)
- {
- report = pcck_buf->cck_agc_rpt & 0xc0;
- report = report>>6;
- switch(report)
- {
- //Fixed by Jacken from Bryant 2008-03-20
- //Original value is -38 , -26 , -14 , -2
- //Fixed value is -35 , -23 , -11 , 6
- case 0x3:
- rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt & 0x3e);
- break;
- case 0x2:
- rx_pwr_all = -23 - (pcck_buf->cck_agc_rpt & 0x3e);
- break;
- case 0x1:
- rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
- break;
- case 0x0:
- rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);//6->8
- break;
- }
+ priv->undecorated_smoothed_pwdb =
+ ( ((priv->undecorated_smoothed_pwdb)*(Rx_Smooth_Factor-1)) +
+ (pprevious_stats->RxPWDBAll)) /(Rx_Smooth_Factor);
+ }
+#else
+ //Fixed by Jacken 2008-03-20
+ if(pPreviousRfd->Status.RxPWDBAll > (u32)pHalData->UndecoratedSmoothedPWDB)
+ {
+ pHalData->UndecoratedSmoothedPWDB =
+ ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
+ pHalData->UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB + 1;
}
else
{
- report = pdrvinfo->cfosho[0] & 0x60;
- report = report>>5;
- switch(report)
- {
- case 0x3:
- rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
- break;
- case 0x2:
- rx_pwr_all = -23 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
- break;
- case 0x1:
- rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
- break;
- case 0x0:
- rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;//6->-8
- break;
- }
+ pHalData->UndecoratedSmoothedPWDB =
+ ( ((pHalData->UndecoratedSmoothedPWDB)* 5) + (pPreviousRfd->Status.RxPWDBAll)) / 6;
}
+#endif
- pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);//check it
- pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
- //pstats->RecvSignalPower = pwdb_all;
- pstats->RecvSignalPower = rx_pwr_all;
+ }
- //
- // (3) Get Signal Quality (EVM)
- //
- //if(bpacket_match_bssid)
+ //
+ // Check EVM
+ //
+ /* record the general EVM to the sliding window. */
+ if(pprevious_stats->SignalQuality == 0)
{
- u8 sq;
-
- if(pstats->RxPWDBAll > 40)
- {
- sq = 100;
- }else
- {
- sq = pcck_buf->sq_rpt;
-
- if(pcck_buf->sq_rpt > 64)
- sq = 0;
- else if (pcck_buf->sq_rpt < 20)
- sq = 100;
- else
- sq = ((64-sq) * 100) / 44;
- }
- pstats->SignalQuality = precord_stats->SignalQuality = sq;
- pstats->RxMIMOSignalQuality[0] = precord_stats->RxMIMOSignalQuality[0] = sq;
- pstats->RxMIMOSignalQuality[1] = precord_stats->RxMIMOSignalQuality[1] = -1;
- }
}
else
{
- priv->stats.numqry_phystatusHT++;
-
- // 2008/09/19 MH For 92S debug, RX RF path always enable!!
- priv->brfpath_rxenable[0] = priv->brfpath_rxenable[1] = TRUE;
-
- //
- // (1)Get RSSI for HT rate
- //
- //for(i=RF90_PATH_A; i<priv->NumTotalRFPath; i++)
- for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
- {
- // 2008/01/30 MH we will judge RF RX path now.
- if (priv->brfpath_rxenable[i])
- rf_rx_num++;
- //else
- // continue;
-
- //if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, i))
- // continue;
-
- //Fixed by Jacken from Bryant 2008-03-20
- //Original value is 106
- //rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
- rx_pwr[i] = ((pdrvinfo->gain_trsw[i]&0x3F)*2) - 110;
+ if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA){
+ if(slide_evm_statistics++ >= PHY_RSSI_SLID_WIN_MAX){
+ slide_evm_statistics = PHY_RSSI_SLID_WIN_MAX;
+ last_evm = priv->stats.slide_evm[slide_evm_index];
+ priv->stats.slide_evm_total -= last_evm;
+ }
- /* Translate DBM to percentage. */
- RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]); //check ok
- total_rssi += RSSI;
- RT_TRACE(COMP_RF, "RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI);
+ priv->stats.slide_evm_total += pprevious_stats->SignalQuality;
- //Get Rx snr value in DB
- //tmp_rxsnr = pofdm_buf->rxsnr_X[i];
- //rx_snrX = (char)(tmp_rxsnr);
- //rx_snrX /= 2;
- //priv->stats.rxSNRdB[i] = (long)rx_snrX;
- priv->stats.rxSNRdB[i] = (long)(pdrvinfo->rxsnr[i]/2);
+ priv->stats.slide_evm[slide_evm_index++] = pprevious_stats->SignalQuality;
+ if(slide_evm_index >= PHY_RSSI_SLID_WIN_MAX)
+ slide_evm_index = 0;
- /* Translate DBM to percentage. */
- //RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
- //total_rssi += RSSI;
+ // <1> Showed on UI for user, in percentage.
+ tmp_val = priv->stats.slide_evm_total/slide_evm_statistics;
+ priv->stats.signal_quality = tmp_val;
+ //cosa add 10/11/2007, Showed on UI for user in Windows Vista, for Link quality.
+ priv->stats.last_signal_strength_inpercent = tmp_val;
+ }
- /* Record Signal Strength for next packet */
- //if(bpacket_match_bssid)
+ // <2> Showed on UI for engineering
+ if(pprevious_stats->bPacketToSelf || pprevious_stats->bPacketBeacon || pprevious_stats->bToSelfBA)
+ {
+ for(nspatial_stream = 0; nspatial_stream<2 ; nspatial_stream++) // 2 spatial stream
{
- pstats->RxMIMOSignalStrength[i] =(u8) RSSI;
- precord_stats->RxMIMOSignalStrength[i] =(u8) RSSI;
+ if(pprevious_stats->RxMIMOSignalQuality[nspatial_stream] != -1)
+ {
+ if(priv->stats.rx_evm_percentage[nspatial_stream] == 0) // initialize
+ {
+ priv->stats.rx_evm_percentage[nspatial_stream] = pprevious_stats->RxMIMOSignalQuality[nspatial_stream];
+ }
+ priv->stats.rx_evm_percentage[nspatial_stream] =
+ ( (priv->stats.rx_evm_percentage[nspatial_stream]* (Rx_Smooth_Factor-1)) +
+ (pprevious_stats->RxMIMOSignalQuality[nspatial_stream]* 1)) / (Rx_Smooth_Factor);
+ }
}
}
+ }
- //
- // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
- //
- //Fixed by Jacken from Bryant 2008-03-20
- //Original value is 106
- //rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
- rx_pwr_all = (((pdrvinfo->pwdb_all ) >> 1 )& 0x7f) -106;
- pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
-
- pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
- pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
- pstats->RecvSignalPower = rx_pwr_all;
-
- //
- // (3)EVM of HT rate
- //
- //if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
- // pdrvinfo->RxRate<=DESC90_RATEMCS15)
- if(pDesc->RxHT && pDesc->RxMCS>=DESC92S_RATEMCS8 &&
- pDesc->RxMCS<=DESC92S_RATEMCS15)
- max_spatial_stream = 2; //both spatial stream make sense
- else
- max_spatial_stream = 1; //only spatial stream 1 makes sense
+}
- for(i=0; i<max_spatial_stream; i++)
- {
- //tmp_rxevm = pofdm_buf->rxevm_X[i];
- //rx_evmX = (char)(tmp_rxevm);
+/*-----------------------------------------------------------------------------
+ * Function: rtl819x_query_rxpwrpercentage()
+ *
+ * Overview:
+ *
+ * Input: char antpower
+ *
+ * Output: NONE
+ *
+ * Return: 0-100 percentage
+ *
+ * Revised History:
+ * When Who Remark
+ * 05/26/2008 amy Create Version 0 porting from windows code.
+ *
+ *---------------------------------------------------------------------------*/
+static u8 rtl819x_query_rxpwrpercentage(
+ char antpower
+ )
+{
+ if ((antpower <= -100) || (antpower >= 20))
+ {
+ return 0;
+ }
+ else if (antpower >= 0)
+ {
+ return 100;
+ }
+ else
+ {
+ return (100+antpower);
+ }
- // Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
- // fill most significant bit to "zero" when doing shifting operation which may change a negative
- // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
- //rx_evmX /= 2; //dbm
+} /* QueryRxPwrPercentage */
- //evm = rtl819x_evm_dbtopercentage(rx_evmX);
- evm = rtl819x_evm_dbtopercentage( (pdrvinfo->rxevm[i] /*/ 2*/)); //dbm
- RT_TRACE(COMP_RF, "RXRATE=%x RXEVM=%x EVM=%s%d\n", pDesc->RxMCS, pdrvinfo->rxevm[i], "%", evm);
-#if 0
- EVM = SignalScaleMapping(EVM);//make it good looking, from 0~100//=====>from here
-#endif
+static u8
+rtl819x_evm_dbtopercentage(
+ char value
+ )
+{
+ char ret_val;
- //if(bpacket_match_bssid)
- {
- if(i==0) // Fill value in RFD, Get the first spatial stream only
- pstats->SignalQuality = precord_stats->SignalQuality = (u8)(evm & 0xff);
- pstats->RxMIMOSignalQuality[i] = precord_stats->RxMIMOSignalQuality[i] = (u8)(evm & 0xff);
- }
- }
+ ret_val = value;
+ if(ret_val >= 0)
+ ret_val = 0;
+ if(ret_val <= -33)
+ ret_val = -33;
+ ret_val = 0 - ret_val;
+ ret_val*=3;
+ if(ret_val == 99)
+ ret_val = 100;
+ return(ret_val);
+}
+//
+// Description:
+// We want good-looking for signal strength/quality
+// 2007/7/19 01:09, by cosa.
+//
+long
+rtl819x_signal_scale_mapping(
+ long currsig
+ )
+{
+ long retsig;
- /* record rx statistics for debug */
- //rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
- prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
- //if(pdrvinfo->BW) //40M channel
- if(pDesc->BW) //40M channel
- priv->stats.received_bwtype[1+pdrvinfo->rxsc]++;
- else //20M channel
- priv->stats.received_bwtype[0]++;
+ // Step 1. Scale mapping.
+ if(currsig >= 61 && currsig <= 100)
+ {
+ retsig = 90 + ((currsig - 60) / 4);
}
-
- //UI BSS List signal strength(in percentage), make it good looking, from 0~100.
- //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
- if(is_cck_rate)
+ else if(currsig >= 41 && currsig <= 60)
{
- pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;//check ok
-
+ retsig = 78 + ((currsig - 40) / 2);
+ }
+ else if(currsig >= 31 && currsig <= 40)
+ {
+ retsig = 66 + (currsig - 30);
+ }
+ else if(currsig >= 21 && currsig <= 30)
+ {
+ retsig = 54 + (currsig - 20);
+ }
+ else if(currsig >= 5 && currsig <= 20)
+ {
+ retsig = 42 + (((currsig - 5) * 2) / 3);
+ }
+ else if(currsig == 4)
+ {
+ retsig = 36;
+ }
+ else if(currsig == 3)
+ {
+ retsig = 27;
+ }
+ else if(currsig == 2)
+ {
+ retsig = 18;
+ }
+ else if(currsig == 1)
+ {
+ retsig = 9;
}
else
{
- //pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u8)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u8)(total_rssi/=RF90_PATH_MAX);
- // We can judge RX path number now.
- if (rf_rx_num != 0)
- pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
+ retsig = currsig;
}
-}/* QueryRxPhyStatus8192S */
-#else
-static void rtl8192_query_rxphystatus(
+
+ return retsig;
+}
+
+/*-----------------------------------------------------------------------------
+ * Function: QueryRxPhyStatus8192S()
+ *
+ * Overview:
+ *
+ * Input: NONE
+ *
+ * Output: NONE
+ *
+ * Return: NONE
+ *
+ * Revised History:
+ * When Who Remark
+ * 06/01/2007 MHC Create Version 0.
+ * 06/05/2007 MHC Accordign to HW's new data sheet, we add CCK and OFDM
+ * descriptor definition.
+ * 07/04/2007 MHC According to Jerry and Bryant's document. We read
+ * ir_isolation and ext_lna for RF's init value and use
+ * to compensate RSSI after receiving packets.
+ * 09/10/2008 MHC Modify name and PHY status field for 92SE.
+ * 09/19/2008 MHC Add CCK/OFDM SS/SQ for 92S series.
+ *
+ *---------------------------------------------------------------------------*/
+static void rtl8192SU_query_rxphystatus(
struct r8192_priv * priv,
struct ieee80211_rx_stats * pstats,
+ rx_desc_819x_usb *pDesc,
rx_drvinfo_819x_usb * pdrvinfo,
struct ieee80211_rx_stats * precord_stats,
bool bpacket_match_bssid,
)
{
//PRT_RFD_STATUS pRtRfdStatus = &(pRfd->Status);
- phy_sts_ofdm_819xusb_t* pofdm_buf;
+ //PHY_STS_CCK_8192S_T *pCck_buf;
phy_sts_cck_819xusb_t * pcck_buf;
phy_ofdm_rx_status_rxsc_sgien_exintfflag* prxsc;
- u8 *prxpkt;
- u8 i, max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
+ //u8 *prxpkt;
+ //u8 i, max_spatial_stream, tmp_rxsnr, tmp_rxevm, rxsc_sgien_exflg;
+ u8 i, max_spatial_stream, rxsc_sgien_exflg;
char rx_pwr[4], rx_pwr_all=0;
//long rx_avg_pwr = 0;
- char rx_snrX, rx_evmX;
+ //char rx_snrX, rx_evmX;
u8 evm, pwdb_all;
u32 RSSI, total_rssi=0;//, total_evm=0;
// long signal_strength_index = 0;
u8 rf_rx_num = 0;
+
priv->stats.numqry_phystatus++;
- is_cck_rate = rx_hal_is_cck_rate(pdrvinfo);
+ is_cck_rate = rx_hal_is_cck_rate(pDesc);
// Record it for next packet processing
memset(precord_stats, 0, sizeof(struct ieee80211_rx_stats));
pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon;
pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA;
- prxpkt = (u8*)pdrvinfo;
-
- /* Move pointer to the 16th bytes. Phy status start address. */
- prxpkt += sizeof(rx_drvinfo_819x_usb);
-
- /* Initial the cck and ofdm buffer pointer */
- pcck_buf = (phy_sts_cck_819xusb_t *)prxpkt;
- pofdm_buf = (phy_sts_ofdm_819xusb_t *)prxpkt;
pstats->RxMIMOSignalQuality[0] = -1;
pstats->RxMIMOSignalQuality[1] = -1;
if(is_cck_rate)
{
+ u8 report;//, tmp_pwdb;
+ //char cck_adc_pwdb[4];
+
+ // CCK Driver info Structure is not the same as OFDM packet.
+ pcck_buf = (phy_sts_cck_819xusb_t *)pdrvinfo;
+
//
// (1)Hardware does not provide RSSI for CCK
//
//
// (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
//
- u8 report;//, cck_agc_rpt;
priv->stats.numqry_phystatusCCK++;
rx_pwr_all = -11 - (pcck_buf->cck_agc_rpt & 0x3e);
break;
case 0x0:
- rx_pwr_all = 6 - (pcck_buf->cck_agc_rpt & 0x3e);
+ rx_pwr_all = 8 - (pcck_buf->cck_agc_rpt & 0x3e);//6->8
break;
}
}
else
{
- report = pcck_buf->cck_agc_rpt & 0x60;
+ report = pdrvinfo->cfosho[0] & 0x60;
report = report>>5;
switch(report)
{
rx_pwr_all = -11 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
break;
case 0x0:
- rx_pwr_all = 6 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;
+ rx_pwr_all = -8 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1) ;//6->-8
break;
}
}
- pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
+ pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);//check it
pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
- pstats->RecvSignalPower = pwdb_all;
+ //pstats->RecvSignalPower = pwdb_all;
+ pstats->RecvSignalPower = rx_pwr_all;
//
// (3) Get Signal Quality (EVM)
//
- //if(bpacket_match_bssid)
- {
+ //if(bpacket_match_bssid)
+ {
u8 sq;
if(pstats->RxPWDBAll > 40)
else
{
priv->stats.numqry_phystatusHT++;
+
+ // 2008/09/19 MH For 92S debug, RX RF path always enable!!
+ priv->brfpath_rxenable[0] = priv->brfpath_rxenable[1] = TRUE;
+
//
// (1)Get RSSI for HT rate
//
- for(i=RF90_PATH_A; i<priv->NumTotalRFPath; i++)
+ //for(i=RF90_PATH_A; i<priv->NumTotalRFPath; i++)
+ for(i=RF90_PATH_A; i<RF90_PATH_MAX; i++)
{
// 2008/01/30 MH we will judge RF RX path now.
if (priv->brfpath_rxenable[i])
rf_rx_num++;
- else
- continue;
+ //else
+ // continue;
- if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, i))
- continue;
+ //if (!rtl8192_phy_CheckIsLegalRFPath(priv->ieee80211->dev, i))
+ // continue;
//Fixed by Jacken from Bryant 2008-03-20
//Original value is 106
- rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
+ //rx_pwr[i] = ((pofdm_buf->trsw_gain_X[i]&0x3F)*2) - 106;
+ rx_pwr[i] = ((pdrvinfo->gain_trsw[i]&0x3F)*2) - 110;
+
+ /* Translate DBM to percentage. */
+ RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]); //check ok
+ total_rssi += RSSI;
+ RT_TRACE(COMP_RF, "RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI);
//Get Rx snr value in DB
- tmp_rxsnr = pofdm_buf->rxsnr_X[i];
- rx_snrX = (char)(tmp_rxsnr);
- //rx_snrX >>= 1;;
- rx_snrX /= 2;
- priv->stats.rxSNRdB[i] = (long)rx_snrX;
+ //tmp_rxsnr = pofdm_buf->rxsnr_X[i];
+ //rx_snrX = (char)(tmp_rxsnr);
+ //rx_snrX /= 2;
+ //priv->stats.rxSNRdB[i] = (long)rx_snrX;
+ priv->stats.rxSNRdB[i] = (long)(pdrvinfo->rxsnr[i]/2);
/* Translate DBM to percentage. */
- RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
- total_rssi += RSSI;
+ //RSSI = rtl819x_query_rxpwrpercentage(rx_pwr[i]);
+ //total_rssi += RSSI;
/* Record Signal Strength for next packet */
//if(bpacket_match_bssid)
//
//Fixed by Jacken from Bryant 2008-03-20
//Original value is 106
- rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
+ //rx_pwr_all = (((pofdm_buf->pwdb_all ) >> 1 )& 0x7f) -106;
+ rx_pwr_all = (((pdrvinfo->pwdb_all ) >> 1 )& 0x7f) -106;
pwdb_all = rtl819x_query_rxpwrpercentage(rx_pwr_all);
pstats->RxPWDBAll = precord_stats->RxPWDBAll = pwdb_all;
pstats->RxPower = precord_stats->RxPower = rx_pwr_all;
+ pstats->RecvSignalPower = rx_pwr_all;
//
// (3)EVM of HT rate
//
- if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
- pdrvinfo->RxRate<=DESC90_RATEMCS15)
+ //if(pdrvinfo->RxHT && pdrvinfo->RxRate>=DESC90_RATEMCS8 &&
+ // pdrvinfo->RxRate<=DESC90_RATEMCS15)
+ if(pDesc->RxHT && pDesc->RxMCS>=DESC92S_RATEMCS8 &&
+ pDesc->RxMCS<=DESC92S_RATEMCS15)
max_spatial_stream = 2; //both spatial stream make sense
else
max_spatial_stream = 1; //only spatial stream 1 makes sense
for(i=0; i<max_spatial_stream; i++)
{
- tmp_rxevm = pofdm_buf->rxevm_X[i];
- rx_evmX = (char)(tmp_rxevm);
+ //tmp_rxevm = pofdm_buf->rxevm_X[i];
+ //rx_evmX = (char)(tmp_rxevm);
// Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
// fill most significant bit to "zero" when doing shifting operation which may change a negative
// value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
- rx_evmX /= 2; //dbm
+ //rx_evmX /= 2; //dbm
+
+ //evm = rtl819x_evm_dbtopercentage(rx_evmX);
+ evm = rtl819x_evm_dbtopercentage( (pdrvinfo->rxevm[i] /*/ 2*/)); //dbm
+ RT_TRACE(COMP_RF, "RXRATE=%x RXEVM=%x EVM=%s%d\n", pDesc->RxMCS, pdrvinfo->rxevm[i], "%", evm);
- evm = rtl819x_evm_dbtopercentage(rx_evmX);
-#if 0
- EVM = SignalScaleMapping(EVM);//make it good looking, from 0~100
-#endif
//if(bpacket_match_bssid)
{
if(i==0) // Fill value in RFD, Get the first spatial stream only
/* record rx statistics for debug */
- rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
+ //rxsc_sgien_exflg = pofdm_buf->rxsc_sgien_exflg;
prxsc = (phy_ofdm_rx_status_rxsc_sgien_exintfflag *)&rxsc_sgien_exflg;
- if(pdrvinfo->BW) //40M channel
- priv->stats.received_bwtype[1+prxsc->rxsc]++;
+ //if(pdrvinfo->BW) //40M channel
+ if(pDesc->BW) //40M channel
+ priv->stats.received_bwtype[1+pdrvinfo->rxsc]++;
else //20M channel
priv->stats.received_bwtype[0]++;
}
//It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
if(is_cck_rate)
{
- pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;
+ pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)pwdb_all));//PWDB_ALL;//check ok
}
else
{
//pRfd->Status.SignalStrength = pRecordRfd->Status.SignalStrength = (u8)(SignalScaleMapping(total_rssi/=RF90_PATH_MAX));//(u8)(total_rssi/=RF90_PATH_MAX);
- // We can judge RX path number now.
- if (rf_rx_num != 0)
- pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
- }
-} /* QueryRxPhyStatus8190Pci */
-#endif
-
-void
-rtl8192_record_rxdesc_forlateruse(
- struct ieee80211_rx_stats * psrc_stats,
- struct ieee80211_rx_stats * ptarget_stats
-)
-{
- ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
- ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
- ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
-}
-
-#ifdef RTL8192SU
-static void rtl8192SU_query_rxphystatus(
- struct r8192_priv * priv,
- struct ieee80211_rx_stats * pstats,
- rx_desc_819x_usb *pDesc,
- rx_drvinfo_819x_usb * pdrvinfo,
- struct ieee80211_rx_stats * precord_stats,
- bool bpacket_match_bssid,
- bool bpacket_toself,
- bool bPacketBeacon,
- bool bToSelfBA
- );
-void rtl8192SU_TranslateRxSignalStuff(struct sk_buff *skb,
- struct ieee80211_rx_stats * pstats,
- rx_desc_819x_usb *pDesc,
- rx_drvinfo_819x_usb *pdrvinfo)
-{
- // TODO: We must only check packet for current MAC address. Not finish
- rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
- struct net_device *dev=info->dev;
- struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
- bool bpacket_match_bssid, bpacket_toself;
- bool bPacketBeacon=FALSE, bToSelfBA=FALSE;
- static struct ieee80211_rx_stats previous_stats;
- struct ieee80211_hdr_3addr *hdr;//by amy
- u16 fc,type;
-
- // Get Signal Quality for only RX data queue (but not command queue)
-
- u8* tmp_buf;
- //u16 tmp_buf_len = 0;
- u8 *praddr;
-
- /* Get MAC frame start address. */
- tmp_buf = (u8*)skb->data;// + get_rxpacket_shiftbytes_819xusb(pstats);
-
- hdr = (struct ieee80211_hdr_3addr *)tmp_buf;
- fc = le16_to_cpu(hdr->frame_ctl);
- type = WLAN_FC_GET_TYPE(fc);
- praddr = hdr->addr1;
-
- /* Check if the received packet is acceptabe. */
- bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
- (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
- && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
- bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
-
-#if 1//cosa
- if(WLAN_FC_GET_FRAMETYPE(fc)== IEEE80211_STYPE_BEACON)
- {
- bPacketBeacon = true;
- //DbgPrint("Beacon 2, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
- }
- if(WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BLOCKACK)
- {
- if((eqMacAddr(praddr,dev->dev_addr)))
- bToSelfBA = true;
- //DbgPrint("BlockAck, MatchBSSID = %d, ToSelf = %d \n", bPacketMatchBSSID, bPacketToSelf);
- }
-
-#endif
-
-
- if(bpacket_match_bssid)
- {
- priv->stats.numpacket_matchbssid++;
- }
- if(bpacket_toself){
- priv->stats.numpacket_toself++;
- }
- //
- // Process PHY information for previous packet (RSSI/PWDB/EVM)
- //
- // Because phy information is contained in the last packet of AMPDU only, so driver
- // should process phy information of previous packet
- rtl8192_process_phyinfo(priv, tmp_buf, &previous_stats, pstats);
- rtl8192SU_query_rxphystatus(priv, pstats, pDesc, pdrvinfo, &previous_stats, bpacket_match_bssid,bpacket_toself,bPacketBeacon,bToSelfBA);
- rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
+ // We can judge RX path number now.
+ if (rf_rx_num != 0)
+ pstats->SignalStrength = precord_stats->SignalStrength = (u8)(rtl819x_signal_scale_mapping((long)(total_rssi/=rf_rx_num)));
+ }
+}/* QueryRxPhyStatus8192S */
+void
+rtl8192_record_rxdesc_forlateruse(
+ struct ieee80211_rx_stats * psrc_stats,
+ struct ieee80211_rx_stats * ptarget_stats
+)
+{
+ ptarget_stats->bIsAMPDU = psrc_stats->bIsAMPDU;
+ ptarget_stats->bFirstMPDU = psrc_stats->bFirstMPDU;
+ ptarget_stats->Seq_Num = psrc_stats->Seq_Num;
}
-#else
-void TranslateRxSignalStuff819xUsb(struct sk_buff *skb,
+
+static void rtl8192SU_query_rxphystatus(
+ struct r8192_priv * priv,
+ struct ieee80211_rx_stats * pstats,
+ rx_desc_819x_usb *pDesc,
+ rx_drvinfo_819x_usb * pdrvinfo,
+ struct ieee80211_rx_stats * precord_stats,
+ bool bpacket_match_bssid,
+ bool bpacket_toself,
+ bool bPacketBeacon,
+ bool bToSelfBA
+ );
+void rtl8192SU_TranslateRxSignalStuff(struct sk_buff *skb,
struct ieee80211_rx_stats * pstats,
+ rx_desc_819x_usb *pDesc,
rx_drvinfo_819x_usb *pdrvinfo)
{
// TODO: We must only check packet for current MAC address. Not finish
// Because phy information is contained in the last packet of AMPDU only, so driver
// should process phy information of previous packet
rtl8192_process_phyinfo(priv, tmp_buf, &previous_stats, pstats);
- rtl8192_query_rxphystatus(priv, pstats, pdrvinfo, &previous_stats, bpacket_match_bssid,bpacket_toself,bPacketBeacon,bToSelfBA);
+ rtl8192SU_query_rxphystatus(priv, pstats, pDesc, pdrvinfo, &previous_stats, bpacket_match_bssid,bpacket_toself,bPacketBeacon,bToSelfBA);
rtl8192_record_rxdesc_forlateruse(pstats, &previous_stats);
}
-#endif
/**
* Function: UpdateReceivedRateHistogramStatistics
priv->stats.received_rate_histogram[rcvType][rateIndex]++;
}
-#ifdef RTL8192SU
void rtl8192SU_query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe)
{
rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
rtl8192SU_TranslateRxSignalStuff(skb, stats, desc, driver_info);
}
}
-#else
-void query_rxdesc_status(struct sk_buff *skb, struct ieee80211_rx_stats *stats, bool bIsRxAggrSubframe)
-{
- rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
- struct net_device *dev=info->dev;
- struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
- //rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
- rx_drvinfo_819x_usb *driver_info = NULL;
-
- //
- //Get Rx Descriptor Information
- //
- {
- rx_desc_819x_usb *desc = (rx_desc_819x_usb *)skb->data;
-
- stats->Length = desc->Length;
- stats->RxDrvInfoSize = desc->RxDrvInfoSize;
- stats->RxBufShift = 0;//desc->Shift&0x03;
- stats->bICV = desc->ICV;
- stats->bCRC = desc->CRC32;
- stats->bHwError = stats->bCRC|stats->bICV;
- //RTL8190 set this bit to indicate that Hw does not decrypt packet
- stats->Decrypted = !desc->SWDec;
- }
-
- if((priv->ieee80211->pHTInfo->bCurrentHTSupport == true) && (priv->ieee80211->pairwise_key_type == KEY_TYPE_CCMP))
- {
- stats->bHwError = false;
- }
- else
- {
- stats->bHwError = stats->bCRC|stats->bICV;
- }
-
- if(stats->Length < 24 || stats->Length > MAX_8192U_RX_SIZE)
- stats->bHwError |= 1;
- //
- //Get Driver Info
- //
- // TODO: Need to verify it on FGPA platform
- //Driver info are written to the RxBuffer following rx desc
- if (stats->RxDrvInfoSize != 0) {
- driver_info = (rx_drvinfo_819x_usb *)(skb->data + sizeof(rx_desc_819x_usb) + \
- stats->RxBufShift);
- /* unit: 0.5M */
- /* TODO */
- if(!stats->bHwError){
- u8 ret_rate;
- ret_rate = HwRateToMRate90(driver_info->RxHT, driver_info->RxRate);
- if(ret_rate == 0xff)
- {
- // Abnormal Case: Receive CRC OK packet with Rx descriptor indicating non supported rate.
- // Special Error Handling here, 2008.05.16, by Emily
-
- stats->bHwError = 1;
- stats->rate = MGN_1M; //Set 1M rate by default
- }else
- {
- stats->rate = ret_rate;
- }
- }
- else
- stats->rate = 0x02;
-
- stats->bShortPreamble = driver_info->SPLCP;
-
-
- UpdateReceivedRateHistogramStatistics8190(dev, stats);
-
- stats->bIsAMPDU = (driver_info->PartAggr==1);
- stats->bFirstMPDU = (driver_info->PartAggr==1) && (driver_info->FirstAGGR==1);
-#if 0
- // TODO: it is debug only. It should be disabled in released driver. 2007.1.12 by Joseph
- UpdateRxAMPDUHistogramStatistics8190(Adapter, pRfd);
-#endif
- stats->TimeStampLow = driver_info->TSFL;
- // xiong mask it, 070514
- //pRfd->Status.TimeStampHigh = PlatformEFIORead4Byte(Adapter, TSFR+4);
- // stats->TimeStampHigh = read_nic_dword(dev, TSFR+4);
-
- UpdateRxPktTimeStamp8190(dev, stats);
-
- //
- // Rx A-MPDU
- //
- if(driver_info->FirstAGGR==1 || driver_info->PartAggr == 1)
- RT_TRACE(COMP_RXDESC, "driver_info->FirstAGGR = %d, driver_info->PartAggr = %d\n",
- driver_info->FirstAGGR, driver_info->PartAggr);
-
- }
-
- skb_pull(skb,sizeof(rx_desc_819x_usb));
- //
- // Get Total offset of MPDU Frame Body
- //
- if((stats->RxBufShift + stats->RxDrvInfoSize) > 0) {
- stats->bShift = 1;
- skb_pull(skb,stats->RxBufShift + stats->RxDrvInfoSize);
- }
-
- /* for debug 2008.5.29 */
-#if 0
- {
- int i;
- printk("\n>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n");
- for(i = 0; i < skb->len; i++) {
- if(i % 10 == 0) printk("\n");
- printk("%02x ", skb->data[i]);
- }
- printk("\n<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<\n");
- }
-#endif
-
- //added by vivi, for MP, 20080108
- stats->RxIs40MHzPacket = driver_info->BW;
- if(stats->RxDrvInfoSize != 0)
- TranslateRxSignalStuff819xUsb(skb, stats, driver_info);
-
-}
-#endif
-
-#ifdef RTL8192SU
-#if 0
-/*-----------------------------------------------------------------------------
- * Function: UpdateRxAMPDUHistogramStatistics8192S
- *
- * Overview: Recored down the received A-MPDU aggregation size and pkt number
- *
- * Input: Adapter
- *
- * Output: Adapter
- * (Adapter->RxStats.RxAMPDUSizeHistogram[] is updated)
- * (Adapter->RxStats.RxAMPDUNumHistogram[] is updated)
- *
- * Return: NONE
- *
- * Revised History:
- * When Who Remark
- * 09/18/2008 MHC Create Version 0.
- *
- *---------------------------------------------------------------------------*/
-static void
-UpdateRxAMPDUHistogramStatistics8192S(
- struct net_device *dev,
- struct ieee80211_rx_stats *stats
- )
-{
- //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
- u8 size_index;
- u8 num_index;
- u16 update_size = 0;
- u8 update_num = 0;
-
- if(stats->bIsAMPDU)
- {
- if(stats->bFirstMPDU)
- {
- if(stats->nRxAMPDU_Size!=0 && stats->nRxAMPDU_AggrNum!=0)
- {
- update_size = stats->nRxAMPDU_Size;
- update_num = stats->nRxAMPDU_AggrNum;
- }
- stats->nRxAMPDU_Size = stats->Length;
- stats->nRxAMPDU_AggrNum = 1;
- }
- else
- {
- stats->nRxAMPDU_Size += stats->Length;
- stats->nRxAMPDU_AggrNum++;
- }
- }
- else
- {
- if(stats->nRxAMPDU_Size!=0 && stats->nRxAMPDU_AggrNum!=0)
- {
- update_size = stats->nRxAMPDU_Size;
- update_num = stats->nRxAMPDU_AggrNum;
- }
- stats->nRxAMPDU_Size = 0;
- stats->nRxAMPDU_AggrNum = 0;
- }
-
- if(update_size!=0 && update_num!= 0)
- {
- if(update_size < 4096)
- size_index = 0;
- else if(update_size < 8192)
- size_index = 1;
- else if(update_size < 16384)
- size_index = 2;
- else if(update_size < 32768)
- size_index = 3;
- else if(update_size < 65536)
- size_index = 4;
- else
- {
- RT_TRACE(COMP_RXDESC,
- ("UpdateRxAMPDUHistogramStatistics8192S(): A-MPDU too large\n");
- }
-
- Adapter->RxStats.RxAMPDUSizeHistogram[size_index]++;
-
- if(update_num < 5)
- num_index = 0;
- else if(update_num < 10)
- num_index = 1;
- else if(update_num < 20)
- num_index = 2;
- else if(update_num < 40)
- num_index = 3;
- else
- num_index = 4;
-
- Adapter->RxStats.RxAMPDUNumHistogram[num_index]++;
- }
-} // UpdateRxAMPDUHistogramStatistics8192S
-#endif
-#endif
-
-
-#ifdef RTL8192SU
//
// Description:
// The strarting address of wireless lan header will shift 1 or 2 or 3 or "more" bytes for the following reason :
}
}
-#else
-u32 GetRxPacketShiftBytes819xUsb(struct ieee80211_rx_stats *Status, bool bIsRxAggrSubframe)
-{
- return (sizeof(rx_desc_819x_usb) + Status->RxDrvInfoSize
- + Status->RxBufShift);
-}
-
-void rtl8192_rx_nomal(struct sk_buff* skb)
-{
- rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
- struct net_device *dev=info->dev;
- struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
- struct ieee80211_rx_stats stats = {
- .signal = 0,
- .noise = -98,
- .rate = 0,
- // .mac_time = jiffies,
- .freq = IEEE80211_24GHZ_BAND,
- };
- u32 rx_pkt_len = 0;
- struct ieee80211_hdr_1addr *ieee80211_hdr = NULL;
- bool unicast_packet = false;
-
- /* 20 is for ps-poll */
- if((skb->len >=(20 + sizeof(rx_desc_819x_usb))) && (skb->len < RX_URB_SIZE)) {
- /* first packet should not contain Rx aggregation header */
- query_rxdesc_status(skb, &stats, false);
- /* TODO */
- /* hardware related info */
- /* Process the MPDU recevied */
- skb_trim(skb, skb->len - 4/*sCrcLng*/);
-
- rx_pkt_len = skb->len;
- ieee80211_hdr = (struct ieee80211_hdr_1addr *)skb->data;
- unicast_packet = false;
- if(is_broadcast_ether_addr(ieee80211_hdr->addr1)) {
- //TODO
- }else if(is_multicast_ether_addr(ieee80211_hdr->addr1)){
- //TODO
- }else {
- /* unicast packet */
- unicast_packet = true;
- }
-
- if(!ieee80211_rx(priv->ieee80211,skb, &stats)) {
- dev_kfree_skb_any(skb);
- } else {
- priv->stats.rxoktotal++;
- if(unicast_packet) {
- priv->stats.rxbytesunicast += rx_pkt_len;
- }
- }
- } else {
- priv->stats.rxurberr++;
- printk("actual_length:%d\n", skb->len);
- dev_kfree_skb_any(skb);
- }
-
-}
-
-#endif
void
rtl819xusb_process_received_packet(
stats->ntotalfrag = 1;
}
-#ifdef RTL8192SU
void rtl8192SU_rx_cmd(struct sk_buff *skb)
{
struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
//
// Collection information in Rx descriptor.
//
-#if 0
- pRxDesc = pContext->Buffer;
-
- pRfd->Buffer.VirtualAddress = pContext->Buffer; // 061109, rcnjko, for multi-platform consideration..
-
- pRtRfdStatus->Length = (u2Byte)GET_RX_DESC_PKT_LEN(pRxDesc);
- pRtRfdStatus->RxDrvInfoSize = 0;
- pRtRfdStatus->RxBufShift = 0;
-
- pRfd->PacketLength = pRfd->Status.Length - sCrcLng;
- pRfd->FragLength = pRfd->PacketLength;
- pRfd->FragOffset = 0;
- pRfd->nTotalFrag = 1;
- pRfd->queue_id = PipeIndex;
-#endif
query_rx_cmdpkt_desc_status(skb,&stats);
// this is to be done by amy 080508 prfd->queue_id = 1;
RT_TRACE(COMP_RECV, "<--- HalUsbInCommandComplete8192SUsb()\n");
}
-#else
-void rtl8192_rx_cmd(struct sk_buff *skb)
-{
- struct rtl8192_rx_info *info = (struct rtl8192_rx_info *)skb->cb;
- struct net_device *dev = info->dev;
- //int ret;
-// struct urb *rx_urb = info->urb;
- /* TODO */
- struct ieee80211_rx_stats stats = {
- .signal = 0,
- .noise = -98,
- .rate = 0,
- // .mac_time = jiffies,
- .freq = IEEE80211_24GHZ_BAND,
- };
-
- if((skb->len >=(20 + sizeof(rx_desc_819x_usb))) && (skb->len < RX_URB_SIZE))
- {
-
- query_rx_cmdpkt_desc_status(skb,&stats);
- // this is to be done by amy 080508 prfd->queue_id = 1;
-
-
- //
- // Process the command packet received.
- //
-
- rtl819xusb_process_received_packet(dev,&stats);
-
- dev_kfree_skb_any(skb);
- }
- else
- ;
-
-
-#if 0
- desc = (u32*)(skb->data);
- cmd = (desc[0] >> 30) & 0x03;
-
- if(cmd == 0x00) {//beacon interrupt
- //send beacon packet
- skb = ieee80211_get_beacon(priv->ieee80211);
-
- if(!skb){
- DMESG("not enought memory for allocating beacon");
- return;
- }
- skb->cb[0] = BEACON_PRIORITY;
- skb->cb[1] = 0;
- skb->cb[2] = ieeerate2rtlrate(priv->ieee80211->basic_rate);
- ret = rtl8192_tx(dev, skb);
-
- if( ret != 0 ){
- printk(KERN_ALERT "tx beacon packet error : %d !\n", ret);
- }
- dev_kfree_skb_any(skb);
- } else {//0x00
- //{ log the device information
- // At present, It is not implemented just now.
- //}
- }
-#endif
-}
-#endif
void rtl8192_irq_rx_tasklet(struct r8192_priv *priv)
{
priv->ieee80211 = netdev_priv(dev);
priv->udev=udev;
-#ifdef RTL8192SU
HalUsbSetQueuePipeMapping8192SUsb(intf, dev);
-#endif
-#ifdef RTL8192SU
//printk("===============>NIC 8192SU\n");
priv->ops = &rtl8192su_ops;
-#else
- //printk("===============>NIC 8192U\n");
- priv->ops = &rtl8192u_ops;
-#endif
dev->netdev_ops = &rtl8192_netdev_ops;
RT_TRACE(COMP_DOWN, "wlan driver removed\n");
}
+/* fun with the built-in ieee80211 stack... */
+extern int ieee80211_debug_init(void);
+extern void ieee80211_debug_exit(void);
+extern int ieee80211_crypto_init(void);
+extern void ieee80211_crypto_deinit(void);
+extern int ieee80211_crypto_tkip_init(void);
+extern void ieee80211_crypto_tkip_exit(void);
+extern int ieee80211_crypto_ccmp_init(void);
+extern void ieee80211_crypto_ccmp_exit(void);
+extern int ieee80211_crypto_wep_init(void);
+extern void ieee80211_crypto_wep_exit(void);
+
static int __init rtl8192_usb_module_init(void)
{
+ int ret;
+
+#ifdef CONFIG_IEEE80211_DEBUG
+ ret = ieee80211_debug_init();
+ if (ret) {
+ printk(KERN_ERR "ieee80211_debug_init() failed %d\n", ret);
+ return ret;
+ }
+#endif
+ ret = ieee80211_crypto_init();
+ if (ret) {
+ printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
+ return ret;
+ }
+
+ ret = ieee80211_crypto_tkip_init();
+ if (ret) {
+ printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n",
+ ret);
+ return ret;
+ }
+
+ ret = ieee80211_crypto_ccmp_init();
+ if (ret) {
+ printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n",
+ ret);
+ return ret;
+ }
+
+ ret = ieee80211_crypto_wep_init();
+ if (ret) {
+ printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
+ return ret;
+ }
+
printk(KERN_INFO "\nLinux kernel driver for RTL8192 based WLAN cards\n");
printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan\n");
RT_TRACE(COMP_INIT, "Initializing module");
RT_TRACE(COMP_DOWN, "Exiting");
rtl8192_proc_module_remove();
+
+ ieee80211_crypto_tkip_exit();
+ ieee80211_crypto_ccmp_exit();
+ ieee80211_crypto_wep_exit();
+ ieee80211_crypto_deinit();
+#ifdef CONFIG_IEEE80211_DEBUG
+ ieee80211_debug_exit();
+#endif
}
ieee80211_wake_queue(priv->ieee80211);
}
-#if 0
-void DisableHWSecurityConfig8192SUsb(struct net_device *dev)
-{
- u8 SECR_value = 0x0;
- write_nic_byte(dev, SECR, SECR_value);//SECR_value | SCR_UseDK );
-}
-#endif
-
void EnableHWSecurityConfig8192(struct net_device *dev)
{
u8 SECR_value = 0x0;
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff