#undef DPRINTK
#ifdef PCI_DIO_EXTDEBUG
-#define DPRINTK(fmt, args...) rt_printk(fmt, ## args)
+#define DPRINTK(fmt, args...) printk(fmt, ## args)
#else
#define DPRINTK(fmt, args...)
#endif
-// hardware types of the cards
-typedef enum {
+/* hardware types of the cards */
+enum hw_cards_id {
TYPE_PCI1730, TYPE_PCI1733, TYPE_PCI1734, TYPE_PCI1736,
TYPE_PCI1750,
TYPE_PCI1751,
TYPE_PCI1754, TYPE_PCI1756,
TYPE_PCI1760,
TYPE_PCI1762
-} hw_cards_id;
+};
-// which I/O instructions to use
-typedef enum {
+/* which I/O instructions to use */
+enum hw_io_access {
IO_8b, IO_16b
-} hw_io_access;
+};
#define MAX_DI_SUBDEVS 2 /* max number of DI subdevices per card */
#define MAX_DO_SUBDEVS 2 /* max number of DO subdevices per card */
#define PCIDIO_MAINREG 2 /* main I/O region for all Advantech cards? */
/* Register offset definitions */
-// Advantech PCI-1730/3/4
+/* Advantech PCI-1730/3/4 */
#define PCI1730_IDI 0 /* R: Isolated digital input 0-15 */
#define PCI1730_IDO 0 /* W: Isolated digital output 0-15 */
#define PCI1730_DI 2 /* R: Digital input 0-15 */
#define PCI1734_IDO 0 /* W: Isolated digital output 0-31 */
#define PCI173x_BOARDID 4 /* R: Board I/D switch for 1730/3/4 */
-// Advantech PCI-1736UP
-#define PCI1736_IDI 0 /* R: Isolated digital input 0-15 */
-#define PCI1736_IDO 0 /* W: Isolated digital output 0-15 */
-#define PCI1736_3_INT_EN 0x08 /* R/W: enable/disable interrupts */
-#define PCI1736_3_INT_RF 0x0c /* R/W: set falling/raising edge for interrupts */
-#define PCI1736_3_INT_CLR 0x10 /* R/W: clear interrupts */
-#define PCI1736_BOARDID 4 /* R: Board I/D switch for 1736UP */
-#define PCI1736_MAINREG 0 /* Normal register (2) doesn't work */
+/* Advantech PCI-1736UP */
+#define PCI1736_IDI 0 /* R: Isolated digital input 0-15 */
+#define PCI1736_IDO 0 /* W: Isolated digital output 0-15 */
+#define PCI1736_3_INT_EN 0x08 /* R/W: enable/disable interrupts */
+#define PCI1736_3_INT_RF 0x0c /* R/W: set falling/raising edge for interrupts */
+#define PCI1736_3_INT_CLR 0x10 /* R/W: clear interrupts */
+#define PCI1736_BOARDID 4 /* R: Board I/D switch for 1736UP */
+#define PCI1736_MAINREG 0 /* Normal register (2) doesn't work */
-// Advantech PCI-1750
+/* Advantech PCI-1750 */
#define PCI1750_IDI 0 /* R: Isolated digital input 0-15 */
#define PCI1750_IDO 0 /* W: Isolated digital output 0-15 */
#define PCI1750_ICR 32 /* W: Interrupt control register */
#define PCI1750_ISR 32 /* R: Interrupt status register */
-// Advantech PCI-1751/3/3E
+/* Advantech PCI-1751/3/3E */
#define PCI1751_DIO 0 /* R/W: begin of 8255 registers block */
#define PCI1751_ICR 32 /* W: Interrupt control register */
#define PCI1751_ISR 32 /* R: Interrupt status register */
#define PCI1753E_ICR2 50 /* R/W: Interrupt control register group 2 */
#define PCI1753E_ICR3 51 /* R/W: Interrupt control register group 3 */
-// Advantech PCI-1752/4/6
+/* Advantech PCI-1752/4/6 */
#define PCI1752_IDO 0 /* R/W: Digital output 0-31 */
#define PCI1752_IDO2 4 /* R/W: Digital output 32-63 */
#define PCI1754_IDI 0 /* R: Digital input 0-31 */
#define PCI1752_6_CFC 0x12 /* R/W: set/read channel freeze function */
#define PCI175x_BOARDID 0x10 /* R: Board I/D switch for 1752/4/6 */
-// Advantech PCI-1762 registers
+/* Advantech PCI-1762 registers */
#define PCI1762_RO 0 /* R/W: Relays status/output */
#define PCI1762_IDI 2 /* R: Isolated input status */
#define PCI1762_BOARDID 4 /* R: Board I/D switch */
#define PCI1762_ICR 6 /* W: Interrupt control register */
#define PCI1762_ISR 6 /* R: Interrupt status register */
-// Advantech PCI-1760 registers
+/* Advantech PCI-1760 registers */
#define OMB0 0x0c /* W: Mailbox outgoing registers */
#define OMB1 0x0d
#define OMB2 0x0e
#define INTCSR2 0x3a
#define INTCSR3 0x3b
-// PCI-1760 mailbox commands
+/* PCI-1760 mailbox commands */
#define CMD_ClearIMB2 0x00 /* Clear IMB2 status and return actaul DI status in IMB3 */
#define CMD_SetRelaysOutput 0x01 /* Set relay output from OMB0 */
#define CMD_GetRelaysStatus 0x02 /* Get relay status to IMB0 */
#define OMBCMD_RETRY 0x03 /* 3 times try request before error */
-static int pci_dio_attach(struct comedi_device * dev, struct comedi_devconfig * it);
-static int pci_dio_detach(struct comedi_device * dev);
+static int pci_dio_attach(struct comedi_device *dev,
+ struct comedi_devconfig *it);
+static int pci_dio_detach(struct comedi_device *dev);
-typedef struct {
- int chans; // num of chans
- int addr; // PCI address ofset
- int regs; // number of registers to read or 8255 subdevices
- unsigned int specflags; // addon subdevice flags
-} diosubd_data;
+struct diosubd_data {
+ int chans; /* num of chans */
+ int addr; /* PCI address ofset */
+ int regs; /* number of registers to read or 8255 subdevices */
+ unsigned int specflags; /* addon subdevice flags */
+};
-typedef struct {
- const char *name; // board name
- int vendor_id; // vendor/device PCI ID
+struct dio_boardtype {
+ const char *name; /* board name */
+ int vendor_id; /* vendor/device PCI ID */
int device_id;
- int main_pci_region; // main I/O PCI region
- hw_cards_id cardtype; // {enum hw_cards_id_enum}
- diosubd_data sdi[MAX_DI_SUBDEVS]; // DI chans
- diosubd_data sdo[MAX_DO_SUBDEVS]; // DO chans
- diosubd_data sdio[MAX_DIO_SUBDEVG]; // DIO 8255 chans
- diosubd_data boardid; // card supports board ID switch
- hw_io_access io_access; // {enum hw_io_access_enum}
-} boardtype;
+ int main_pci_region; /* main I/O PCI region */
+ enum hw_cards_id cardtype;
+ struct diosubd_data sdi[MAX_DI_SUBDEVS]; /* DI chans */
+ struct diosubd_data sdo[MAX_DO_SUBDEVS]; /* DO chans */
+ struct diosubd_data sdio[MAX_DIO_SUBDEVG]; /* DIO 8255 chans */
+ struct diosubd_data boardid; /* card supports board ID switch */
+ enum hw_io_access io_access;
+};
static DEFINE_PCI_DEVICE_TABLE(pci_dio_pci_table) = {
- {PCI_VENDOR_ID_ADVANTECH, 0x1730, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- {PCI_VENDOR_ID_ADVANTECH, 0x1733, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- {PCI_VENDOR_ID_ADVANTECH, 0x1734, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- {PCI_VENDOR_ID_ADVANTECH, 0x1736, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- {PCI_VENDOR_ID_ADVANTECH, 0x1750, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- {PCI_VENDOR_ID_ADVANTECH, 0x1751, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- {PCI_VENDOR_ID_ADVANTECH, 0x1752, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- {PCI_VENDOR_ID_ADVANTECH, 0x1753, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- {PCI_VENDOR_ID_ADVANTECH, 0x1754, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- {PCI_VENDOR_ID_ADVANTECH, 0x1756, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- {PCI_VENDOR_ID_ADVANTECH, 0x1760, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- {PCI_VENDOR_ID_ADVANTECH, 0x1762, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- {0}
+ {
+ PCI_VENDOR_ID_ADVANTECH, 0x1730, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
+ PCI_VENDOR_ID_ADVANTECH, 0x1733, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
+ PCI_VENDOR_ID_ADVANTECH, 0x1734, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
+ PCI_VENDOR_ID_ADVANTECH, 0x1736, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
+ PCI_VENDOR_ID_ADVANTECH, 0x1750, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
+ PCI_VENDOR_ID_ADVANTECH, 0x1751, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
+ PCI_VENDOR_ID_ADVANTECH, 0x1752, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
+ PCI_VENDOR_ID_ADVANTECH, 0x1753, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
+ PCI_VENDOR_ID_ADVANTECH, 0x1754, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
+ PCI_VENDOR_ID_ADVANTECH, 0x1756, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
+ PCI_VENDOR_ID_ADVANTECH, 0x1760, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
+ PCI_VENDOR_ID_ADVANTECH, 0x1762, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
+ 0}
};
MODULE_DEVICE_TABLE(pci, pci_dio_pci_table);
-static const boardtype boardtypes[] = {
+static const struct dio_boardtype boardtypes[] = {
{"pci1730", PCI_VENDOR_ID_ADVANTECH, 0x1730, PCIDIO_MAINREG,
- TYPE_PCI1730,
- {{16, PCI1730_DI, 2, 0}, {16, PCI1730_IDI, 2, 0}},
- {{16, PCI1730_DO, 2, 0}, {16, PCI1730_IDO, 2, 0}},
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {4, PCI173x_BOARDID, 1, SDF_INTERNAL},
- IO_8b,
- },
+ TYPE_PCI1730,
+ {{16, PCI1730_DI, 2, 0}, {16, PCI1730_IDI, 2, 0}},
+ {{16, PCI1730_DO, 2, 0}, {16, PCI1730_IDO, 2, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {4, PCI173x_BOARDID, 1, SDF_INTERNAL},
+ IO_8b,
+ },
{"pci1733", PCI_VENDOR_ID_ADVANTECH, 0x1733, PCIDIO_MAINREG,
- TYPE_PCI1733,
- {{0, 0, 0, 0}, {32, PCI1733_IDI, 4, 0}},
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {4, PCI173x_BOARDID, 1, SDF_INTERNAL},
- IO_8b},
+ TYPE_PCI1733,
+ {{0, 0, 0, 0}, {32, PCI1733_IDI, 4, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {4, PCI173x_BOARDID, 1, SDF_INTERNAL},
+ IO_8b},
{"pci1734", PCI_VENDOR_ID_ADVANTECH, 0x1734, PCIDIO_MAINREG,
- TYPE_PCI1734,
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {{0, 0, 0, 0}, {32, PCI1734_IDO, 4, 0}},
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {4, PCI173x_BOARDID, 1, SDF_INTERNAL},
- IO_8b},
+ TYPE_PCI1734,
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {{0, 0, 0, 0}, {32, PCI1734_IDO, 4, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {4, PCI173x_BOARDID, 1, SDF_INTERNAL},
+ IO_8b},
{"pci1736", PCI_VENDOR_ID_ADVANTECH, 0x1736, PCI1736_MAINREG,
- TYPE_PCI1736,
- {{0, 0, 0, 0}, {16, PCI1736_IDI, 2, 0}},
- {{0, 0, 0, 0}, {16, PCI1736_IDO, 2, 0}},
- {{ 0, 0, 0, 0}, { 0, 0, 0, 0}},
- { 4, PCI1736_BOARDID, 1, SDF_INTERNAL},
- IO_8b,
- },
+ TYPE_PCI1736,
+ {{0, 0, 0, 0}, {16, PCI1736_IDI, 2, 0}},
+ {{0, 0, 0, 0}, {16, PCI1736_IDO, 2, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {4, PCI1736_BOARDID, 1, SDF_INTERNAL},
+ IO_8b,
+ },
{"pci1750", PCI_VENDOR_ID_ADVANTECH, 0x1750, PCIDIO_MAINREG,
- TYPE_PCI1750,
- {{0, 0, 0, 0}, {16, PCI1750_IDI, 2, 0}},
- {{0, 0, 0, 0}, {16, PCI1750_IDO, 2, 0}},
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {0, 0, 0, 0},
- IO_8b},
+ TYPE_PCI1750,
+ {{0, 0, 0, 0}, {16, PCI1750_IDI, 2, 0}},
+ {{0, 0, 0, 0}, {16, PCI1750_IDO, 2, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {0, 0, 0, 0},
+ IO_8b},
{"pci1751", PCI_VENDOR_ID_ADVANTECH, 0x1751, PCIDIO_MAINREG,
- TYPE_PCI1751,
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {{48, PCI1751_DIO, 2, 0}, {0, 0, 0, 0}},
- {0, 0, 0, 0},
- IO_8b},
+ TYPE_PCI1751,
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {{48, PCI1751_DIO, 2, 0}, {0, 0, 0, 0}},
+ {0, 0, 0, 0},
+ IO_8b},
{"pci1752", PCI_VENDOR_ID_ADVANTECH, 0x1752, PCIDIO_MAINREG,
- TYPE_PCI1752,
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {{32, PCI1752_IDO, 2, 0}, {32, PCI1752_IDO2, 2, 0}},
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {4, PCI175x_BOARDID, 1, SDF_INTERNAL},
- IO_16b},
+ TYPE_PCI1752,
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {{32, PCI1752_IDO, 2, 0}, {32, PCI1752_IDO2, 2, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {4, PCI175x_BOARDID, 1, SDF_INTERNAL},
+ IO_16b},
{"pci1753", PCI_VENDOR_ID_ADVANTECH, 0x1753, PCIDIO_MAINREG,
- TYPE_PCI1753,
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {{96, PCI1753_DIO, 4, 0}, {0, 0, 0, 0}},
- {0, 0, 0, 0},
- IO_8b},
+ TYPE_PCI1753,
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {{96, PCI1753_DIO, 4, 0}, {0, 0, 0, 0}},
+ {0, 0, 0, 0},
+ IO_8b},
{"pci1753e", PCI_VENDOR_ID_ADVANTECH, 0x1753, PCIDIO_MAINREG,
- TYPE_PCI1753E,
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {{96, PCI1753_DIO, 4, 0}, {96, PCI1753E_DIO, 4, 0}},
- {0, 0, 0, 0},
- IO_8b},
+ TYPE_PCI1753E,
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {{96, PCI1753_DIO, 4, 0}, {96, PCI1753E_DIO, 4, 0}},
+ {0, 0, 0, 0},
+ IO_8b},
{"pci1754", PCI_VENDOR_ID_ADVANTECH, 0x1754, PCIDIO_MAINREG,
- TYPE_PCI1754,
- {{32, PCI1754_IDI, 2, 0}, {32, PCI1754_IDI2, 2, 0}},
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {4, PCI175x_BOARDID, 1, SDF_INTERNAL},
- IO_16b},
+ TYPE_PCI1754,
+ {{32, PCI1754_IDI, 2, 0}, {32, PCI1754_IDI2, 2, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {4, PCI175x_BOARDID, 1, SDF_INTERNAL},
+ IO_16b},
{"pci1756", PCI_VENDOR_ID_ADVANTECH, 0x1756, PCIDIO_MAINREG,
- TYPE_PCI1756,
- {{0, 0, 0, 0}, {32, PCI1756_IDI, 2, 0}},
- {{0, 0, 0, 0}, {32, PCI1756_IDO, 2, 0}},
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {4, PCI175x_BOARDID, 1, SDF_INTERNAL},
- IO_16b},
+ TYPE_PCI1756,
+ {{0, 0, 0, 0}, {32, PCI1756_IDI, 2, 0}},
+ {{0, 0, 0, 0}, {32, PCI1756_IDO, 2, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {4, PCI175x_BOARDID, 1, SDF_INTERNAL},
+ IO_16b},
{"pci1760", PCI_VENDOR_ID_ADVANTECH, 0x1760, 0,
- TYPE_PCI1760,
- {{0, 0, 0, 0}, {0, 0, 0, 0}}, // This card have own setup work
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {0, 0, 0, 0},
- IO_8b},
+ TYPE_PCI1760,
+ {{0, 0, 0, 0}, {0, 0, 0, 0}}, /* This card have own setup work */
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {0, 0, 0, 0},
+ IO_8b},
{"pci1762", PCI_VENDOR_ID_ADVANTECH, 0x1762, PCIDIO_MAINREG,
- TYPE_PCI1762,
- {{0, 0, 0, 0}, {16, PCI1762_IDI, 1, 0}},
- {{0, 0, 0, 0}, {16, PCI1762_RO, 1, 0}},
- {{0, 0, 0, 0}, {0, 0, 0, 0}},
- {4, PCI1762_BOARDID, 1, SDF_INTERNAL},
- IO_16b}
+ TYPE_PCI1762,
+ {{0, 0, 0, 0}, {16, PCI1762_IDI, 1, 0}},
+ {{0, 0, 0, 0}, {16, PCI1762_RO, 1, 0}},
+ {{0, 0, 0, 0}, {0, 0, 0, 0}},
+ {4, PCI1762_BOARDID, 1, SDF_INTERNAL},
+ IO_16b}
};
-#define n_boardtypes (sizeof(boardtypes)/sizeof(boardtype))
+#define n_boardtypes (sizeof(boardtypes)/sizeof(struct dio_boardtype))
static struct comedi_driver driver_pci_dio = {
- driver_name:"adv_pci_dio",
- module:THIS_MODULE,
- attach:pci_dio_attach,
- detach:pci_dio_detach
+ .driver_name = "adv_pci_dio",
+ .module = THIS_MODULE,
+ .attach = pci_dio_attach,
+ .detach = pci_dio_detach
};
-typedef struct pci_dio_private_st pci_dio_private;
-struct pci_dio_private_st {
- pci_dio_private *prev; // previous private struct
- pci_dio_private *next; // next private struct
- struct pci_dev *pcidev; // pointer to board's pci_dev
- char valid; // card is usable
- char GlobalIrqEnabled; // 1= any IRQ source is enabled
- // PCI-1760 specific data
- unsigned char IDICntEnable; // counter's counting enable status
- unsigned char IDICntOverEnable; // counter's overflow interrupts enable status
- unsigned char IDICntMatchEnable; // counter's match interrupts enable status
- unsigned char IDICntEdge; // counter's count edge value (bit=0 - rising, =1 - falling)
- unsigned short CntResValue[8]; // counters' reset value
- unsigned short CntMatchValue[8]; // counters' match interrupt value
- unsigned char IDIFiltersEn; // IDI's digital filters enable status
- unsigned char IDIPatMatchEn; // IDI's pattern match enable status
- unsigned char IDIPatMatchValue; // IDI's pattern match value
- unsigned short IDIFiltrLow[8]; // IDI's filter value low signal
- unsigned short IDIFiltrHigh[8]; // IDI's filter value high signal
+
+struct pci_dio_private {
+ struct pci_dio_private *prev; /* previous private struct */
+ struct pci_dio_private *next; /* next private struct */
+ struct pci_dev *pcidev; /* pointer to board's pci_dev */
+ char valid; /* card is usable */
+ char GlobalIrqEnabled; /* 1= any IRQ source is enabled */
+ /* PCI-1760 specific data */
+ unsigned char IDICntEnable; /* counter's counting enable status */
+ unsigned char IDICntOverEnable; /* counter's overflow interrupts enable status */
+ unsigned char IDICntMatchEnable; /* counter's match interrupts enable status */
+ unsigned char IDICntEdge; /* counter's count edge value (bit=0 - rising, =1 - falling) */
+ unsigned short CntResValue[8]; /* counters' reset value */
+ unsigned short CntMatchValue[8]; /* counters' match interrupt value */
+ unsigned char IDIFiltersEn; /* IDI's digital filters enable status */
+ unsigned char IDIPatMatchEn; /* IDI's pattern match enable status */
+ unsigned char IDIPatMatchValue; /* IDI's pattern match value */
+ unsigned short IDIFiltrLow[8]; /* IDI's filter value low signal */
+ unsigned short IDIFiltrHigh[8]; /* IDI's filter value high signal */
};
-static pci_dio_private *pci_priv = NULL; /* list of allocated cards */
+static struct pci_dio_private *pci_priv = NULL; /* list of allocated cards */
-#define devpriv ((pci_dio_private *)dev->private)
-#define this_board ((const boardtype *)dev->board_ptr)
+#define devpriv ((struct pci_dio_private *)dev->private)
+#define this_board ((const struct dio_boardtype *)dev->board_ptr)
/*
==============================================================================
*/
-static int pci_dio_insn_bits_di_b(struct comedi_device * dev, struct comedi_subdevice * s,
- struct comedi_insn * insn, unsigned int * data)
+static int pci_dio_insn_bits_di_b(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
- const diosubd_data *d = (const diosubd_data *)s->private;
+ const struct diosubd_data *d = (const struct diosubd_data *)s->private;
int i;
data[1] = 0;
/*
==============================================================================
*/
-static int pci_dio_insn_bits_di_w(struct comedi_device * dev, struct comedi_subdevice * s,
- struct comedi_insn * insn, unsigned int * data)
+static int pci_dio_insn_bits_di_w(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
- const diosubd_data *d = (const diosubd_data *)s->private;
+ const struct diosubd_data *d = (const struct diosubd_data *)s->private;
int i;
data[1] = 0;
/*
==============================================================================
*/
-static int pci_dio_insn_bits_do_b(struct comedi_device * dev, struct comedi_subdevice * s,
- struct comedi_insn * insn, unsigned int * data)
+static int pci_dio_insn_bits_do_b(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
- const diosubd_data *d = (const diosubd_data *)s->private;
+ const struct diosubd_data *d = (const struct diosubd_data *)s->private;
int i;
if (data[0]) {
s->state |= (data[0] & data[1]);
for (i = 0; i < d->regs; i++)
outb((s->state >> (8 * i)) & 0xff,
- dev->iobase + d->addr + i);
+ dev->iobase + d->addr + i);
}
data[1] = s->state;
/*
==============================================================================
*/
-static int pci_dio_insn_bits_do_w(struct comedi_device * dev, struct comedi_subdevice * s,
- struct comedi_insn * insn, unsigned int * data)
+static int pci_dio_insn_bits_do_w(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
- const diosubd_data *d = (const diosubd_data *)s->private;
+ const struct diosubd_data *d = (const struct diosubd_data *)s->private;
int i;
if (data[0]) {
s->state |= (data[0] & data[1]);
for (i = 0; i < d->regs; i++)
outw((s->state >> (16 * i)) & 0xffff,
- dev->iobase + d->addr + 2 * i);
+ dev->iobase + d->addr + 2 * i);
}
data[1] = s->state;
/*
==============================================================================
*/
-static int pci1760_unchecked_mbxrequest(struct comedi_device * dev,
- unsigned char *omb, unsigned char *imb, int repeats)
+static int pci1760_unchecked_mbxrequest(struct comedi_device *dev,
+ unsigned char *omb, unsigned char *imb,
+ int repeats)
{
int cnt, tout, ok = 0;
outb(omb[2], dev->iobase + OMB2);
outb(omb[3], dev->iobase + OMB3);
for (tout = 0; tout < 251; tout++) {
- if ((imb[2] = inb(dev->iobase + IMB2)) == omb[2]) {
+ imb[2] = inb(dev->iobase + IMB2);
+ if (imb[2] == omb[2]) {
imb[0] = inb(dev->iobase + IMB0);
imb[1] = inb(dev->iobase + IMB1);
imb[3] = inb(dev->iobase + IMB3);
ok = 1;
break;
}
- comedi_udelay(1);
+ udelay(1);
}
if (ok)
return 0;
return -ETIME;
}
-static int pci1760_clear_imb2(struct comedi_device * dev)
+static int pci1760_clear_imb2(struct comedi_device *dev)
{
unsigned char omb[4] = { 0x0, 0x0, CMD_ClearIMB2, 0x0 };
unsigned char imb[4];
return pci1760_unchecked_mbxrequest(dev, omb, imb, OMBCMD_RETRY);
}
-static int pci1760_mbxrequest(struct comedi_device * dev,
- unsigned char *omb, unsigned char *imb)
+static int pci1760_mbxrequest(struct comedi_device *dev,
+ unsigned char *omb, unsigned char *imb)
{
if (omb[2] == CMD_ClearIMB2) {
comedi_error(dev,
- "bug! this function should not be used for CMD_ClearIMB2 command");
+ "bug! this function should not be used for CMD_ClearIMB2 command");
return -EINVAL;
}
if (inb(dev->iobase + IMB2) == omb[2]) {
/*
==============================================================================
*/
-static int pci1760_insn_bits_di(struct comedi_device * dev, struct comedi_subdevice * s,
- struct comedi_insn * insn, unsigned int * data)
+static int pci1760_insn_bits_di(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
data[1] = inb(dev->iobase + IMB3);
/*
==============================================================================
*/
-static int pci1760_insn_bits_do(struct comedi_device * dev, struct comedi_subdevice * s,
- struct comedi_insn * insn, unsigned int * data)
+static int pci1760_insn_bits_do(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
int ret;
unsigned char omb[4] = {
s->state &= ~data[0];
s->state |= (data[0] & data[1]);
omb[0] = s->state;
- if (!(ret = pci1760_mbxrequest(dev, omb, imb)))
+ ret = pci1760_mbxrequest(dev, omb, imb);
+ if (!ret)
return ret;
}
data[1] = s->state;
/*
==============================================================================
*/
-static int pci1760_insn_cnt_read(struct comedi_device * dev, struct comedi_subdevice * s,
- struct comedi_insn * insn, unsigned int * data)
+static int pci1760_insn_cnt_read(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
int ret, n;
unsigned char omb[4] = {
unsigned char imb[4];
for (n = 0; n < insn->n; n++) {
- if (!(ret = pci1760_mbxrequest(dev, omb, imb)))
+ ret = pci1760_mbxrequest(dev, omb, imb);
+ if (!ret)
return ret;
data[n] = (imb[1] << 8) + imb[0];
}
/*
==============================================================================
*/
-static int pci1760_insn_cnt_write(struct comedi_device * dev, struct comedi_subdevice * s,
- struct comedi_insn * insn, unsigned int * data)
+static int pci1760_insn_cnt_write(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
int ret;
unsigned char chan = CR_CHAN(insn->chanspec) & 0x07;
};
unsigned char imb[4];
- if (devpriv->CntResValue[chan] != (data[0] & 0xffff)) { // Set reset value if different
- if (!(ret = pci1760_mbxrequest(dev, omb, imb)))
+ if (devpriv->CntResValue[chan] != (data[0] & 0xffff)) { /* Set reset value if different */
+ ret = pci1760_mbxrequest(dev, omb, imb);
+ if (!ret)
return ret;
devpriv->CntResValue[chan] = data[0] & 0xffff;
}
- omb[0] = bitmask; // reset counter to it reset value
+ omb[0] = bitmask; /* reset counter to it reset value */
omb[2] = CMD_ResetIDICounters;
- if (!(ret = pci1760_mbxrequest(dev, omb, imb)))
+ ret = pci1760_mbxrequest(dev, omb, imb);
+ if (!ret)
return ret;
- if (!(bitmask & devpriv->IDICntEnable)) { // start counter if it don't run
+ if (!(bitmask & devpriv->IDICntEnable)) { /* start counter if it don't run */
omb[0] = bitmask;
omb[2] = CMD_EnableIDICounters;
- if (!(ret = pci1760_mbxrequest(dev, omb, imb)))
+ ret = pci1760_mbxrequest(dev, omb, imb);
+ if (!ret)
return ret;
devpriv->IDICntEnable |= bitmask;
}
/*
==============================================================================
*/
-static int pci1760_reset(struct comedi_device * dev)
+static int pci1760_reset(struct comedi_device *dev)
{
int i;
unsigned char omb[4] = { 0x00, 0x00, 0x00, 0x00 };
unsigned char imb[4];
- outb(0, dev->iobase + INTCSR0); // disable IRQ
+ outb(0, dev->iobase + INTCSR0); /* disable IRQ */
outb(0, dev->iobase + INTCSR1);
outb(0, dev->iobase + INTCSR2);
outb(0, dev->iobase + INTCSR3);
devpriv->GlobalIrqEnabled = 0;
omb[0] = 0x00;
- omb[2] = CMD_SetRelaysOutput; // reset relay outputs
+ omb[2] = CMD_SetRelaysOutput; /* reset relay outputs */
pci1760_mbxrequest(dev, omb, imb);
omb[0] = 0x00;
- omb[2] = CMD_EnableIDICounters; // disable IDI up counters
+ omb[2] = CMD_EnableIDICounters; /* disable IDI up counters */
pci1760_mbxrequest(dev, omb, imb);
devpriv->IDICntEnable = 0;
omb[0] = 0x00;
- omb[2] = CMD_OverflowIDICounters; // disable counters overflow interrupts
+ omb[2] = CMD_OverflowIDICounters; /* disable counters overflow interrupts */
pci1760_mbxrequest(dev, omb, imb);
devpriv->IDICntOverEnable = 0;
omb[0] = 0x00;
- omb[2] = CMD_MatchIntIDICounters; // disable counters match value interrupts
+ omb[2] = CMD_MatchIntIDICounters; /* disable counters match value interrupts */
pci1760_mbxrequest(dev, omb, imb);
devpriv->IDICntMatchEnable = 0;
omb[0] = 0x00;
omb[1] = 0x80;
- for (i = 0; i < 8; i++) { // set IDI up counters match value
+ for (i = 0; i < 8; i++) { /* set IDI up counters match value */
omb[2] = CMD_SetIDI0CntMatchValue + i;
pci1760_mbxrequest(dev, omb, imb);
devpriv->CntMatchValue[i] = 0x8000;
omb[0] = 0x00;
omb[1] = 0x00;
- for (i = 0; i < 8; i++) { // set IDI up counters reset value
+ for (i = 0; i < 8; i++) { /* set IDI up counters reset value */
omb[2] = CMD_SetIDI0CntResetValue + i;
pci1760_mbxrequest(dev, omb, imb);
devpriv->CntResValue[i] = 0x0000;
}
omb[0] = 0xff;
- omb[2] = CMD_ResetIDICounters; // reset IDI up counters to reset values
+ omb[2] = CMD_ResetIDICounters; /* reset IDI up counters to reset values */
pci1760_mbxrequest(dev, omb, imb);
omb[0] = 0x00;
- omb[2] = CMD_EdgeIDICounters; // set IDI up counters count edge
+ omb[2] = CMD_EdgeIDICounters; /* set IDI up counters count edge */
pci1760_mbxrequest(dev, omb, imb);
devpriv->IDICntEdge = 0x00;
omb[0] = 0x00;
- omb[2] = CMD_EnableIDIFilters; // disable all digital in filters
+ omb[2] = CMD_EnableIDIFilters; /* disable all digital in filters */
pci1760_mbxrequest(dev, omb, imb);
devpriv->IDIFiltersEn = 0x00;
omb[0] = 0x00;
- omb[2] = CMD_EnableIDIPatternMatch; // disable pattern matching
+ omb[2] = CMD_EnableIDIPatternMatch; /* disable pattern matching */
pci1760_mbxrequest(dev, omb, imb);
devpriv->IDIPatMatchEn = 0x00;
omb[0] = 0x00;
- omb[2] = CMD_SetIDIPatternMatch; // set pattern match value
+ omb[2] = CMD_SetIDIPatternMatch; /* set pattern match value */
pci1760_mbxrequest(dev, omb, imb);
devpriv->IDIPatMatchValue = 0x00;
/*
==============================================================================
*/
-static int pci_dio_reset(struct comedi_device * dev)
+static int pci_dio_reset(struct comedi_device *dev)
{
DPRINTK("adv_pci_dio EDBG: BGN: pci171x_reset(...)\n");
switch (this_board->cardtype) {
case TYPE_PCI1730:
- outb(0, dev->iobase + PCI1730_DO); // clear outputs
+ outb(0, dev->iobase + PCI1730_DO); /* clear outputs */
outb(0, dev->iobase + PCI1730_DO + 1);
outb(0, dev->iobase + PCI1730_IDO);
outb(0, dev->iobase + PCI1730_IDO + 1);
/* NO break there! */
case TYPE_PCI1733:
- outb(0, dev->iobase + PCI1730_3_INT_EN); // disable interrupts
- outb(0x0f, dev->iobase + PCI1730_3_INT_CLR); // clear interrupts
- outb(0, dev->iobase + PCI1730_3_INT_RF); // set rising edge trigger
+ outb(0, dev->iobase + PCI1730_3_INT_EN); /* disable interrupts */
+ outb(0x0f, dev->iobase + PCI1730_3_INT_CLR); /* clear interrupts */
+ outb(0, dev->iobase + PCI1730_3_INT_RF); /* set rising edge trigger */
break;
case TYPE_PCI1734:
- outb(0, dev->iobase + PCI1734_IDO); // clear outputs
+ outb(0, dev->iobase + PCI1734_IDO); /* clear outputs */
outb(0, dev->iobase + PCI1734_IDO + 1);
outb(0, dev->iobase + PCI1734_IDO + 2);
outb(0, dev->iobase + PCI1734_IDO + 3);
break;
case TYPE_PCI1736:
- outb(0, dev->iobase+PCI1736_IDO);
- outb(0, dev->iobase+PCI1736_IDO+1);
- outb(0, dev->iobase+PCI1736_3_INT_EN); // disable interrupts
- outb(0x0f, dev->iobase+PCI1736_3_INT_CLR);// clear interrupts
- outb(0, dev->iobase+PCI1736_3_INT_RF); // set rising edge trigger
+ outb(0, dev->iobase + PCI1736_IDO);
+ outb(0, dev->iobase + PCI1736_IDO + 1);
+ outb(0, dev->iobase + PCI1736_3_INT_EN); /* disable interrupts */
+ outb(0x0f, dev->iobase + PCI1736_3_INT_CLR); /* clear interrupts */
+ outb(0, dev->iobase + PCI1736_3_INT_RF); /* set rising edge trigger */
break;
case TYPE_PCI1750:
case TYPE_PCI1751:
- outb(0x88, dev->iobase + PCI1750_ICR); // disable & clear interrupts
+ outb(0x88, dev->iobase + PCI1750_ICR); /* disable & clear interrupts */
break;
case TYPE_PCI1752:
- outw(0, dev->iobase + PCI1752_6_CFC); // disable channel freeze function
- outw(0, dev->iobase + PCI1752_IDO); // clear outputs
+ outw(0, dev->iobase + PCI1752_6_CFC); /* disable channel freeze function */
+ outw(0, dev->iobase + PCI1752_IDO); /* clear outputs */
outw(0, dev->iobase + PCI1752_IDO + 2);
outw(0, dev->iobase + PCI1752_IDO2);
outw(0, dev->iobase + PCI1752_IDO2 + 2);
break;
case TYPE_PCI1753E:
- outb(0x88, dev->iobase + PCI1753E_ICR0); // disable & clear interrupts
+ outb(0x88, dev->iobase + PCI1753E_ICR0); /* disable & clear interrupts */
outb(0x80, dev->iobase + PCI1753E_ICR1);
outb(0x80, dev->iobase + PCI1753E_ICR2);
outb(0x80, dev->iobase + PCI1753E_ICR3);
/* NO break there! */
case TYPE_PCI1753:
- outb(0x88, dev->iobase + PCI1753_ICR0); // disable & clear interrupts
+ outb(0x88, dev->iobase + PCI1753_ICR0); /* disable & clear interrupts */
outb(0x80, dev->iobase + PCI1753_ICR1);
outb(0x80, dev->iobase + PCI1753_ICR2);
outb(0x80, dev->iobase + PCI1753_ICR3);
break;
case TYPE_PCI1754:
- outw(0x08, dev->iobase + PCI1754_6_ICR0); // disable and clear interrupts
+ outw(0x08, dev->iobase + PCI1754_6_ICR0); /* disable and clear interrupts */
outw(0x08, dev->iobase + PCI1754_6_ICR1);
outw(0x08, dev->iobase + PCI1754_ICR2);
outw(0x08, dev->iobase + PCI1754_ICR3);
break;
case TYPE_PCI1756:
- outw(0, dev->iobase + PCI1752_6_CFC); // disable channel freeze function
- outw(0x08, dev->iobase + PCI1754_6_ICR0); // disable and clear interrupts
+ outw(0, dev->iobase + PCI1752_6_CFC); /* disable channel freeze function */
+ outw(0x08, dev->iobase + PCI1754_6_ICR0); /* disable and clear interrupts */
outw(0x08, dev->iobase + PCI1754_6_ICR1);
- outw(0, dev->iobase + PCI1756_IDO); // clear outputs
+ outw(0, dev->iobase + PCI1756_IDO); /* clear outputs */
outw(0, dev->iobase + PCI1756_IDO + 2);
break;
case TYPE_PCI1760:
pci1760_reset(dev);
break;
case TYPE_PCI1762:
- outw(0x0101, dev->iobase + PCI1762_ICR); // disable & clear interrupts
+ outw(0x0101, dev->iobase + PCI1762_ICR); /* disable & clear interrupts */
break;
}
/*
==============================================================================
*/
-static int pci1760_attach(struct comedi_device * dev, struct comedi_devconfig * it)
+static int pci1760_attach(struct comedi_device *dev,
+ struct comedi_devconfig *it)
{
struct comedi_subdevice *s;
int subdev = 0;
s->n_chan = 2;
s->maxdata = 0xffffffff;
s->len_chanlist = 2;
-// s->insn_config=pci1760_insn_pwm_cfg;
+/* s->insn_config=pci1760_insn_pwm_cfg; */
subdev++;
s = dev->subdevices + subdev;
s->len_chanlist = 8;
s->insn_read = pci1760_insn_cnt_read;
s->insn_write = pci1760_insn_cnt_write;
-// s->insn_config=pci1760_insn_cnt_cfg;
+/* s->insn_config=pci1760_insn_cnt_cfg; */
subdev++;
return 0;
/*
==============================================================================
*/
-static int pci_dio_add_di(struct comedi_device * dev, struct comedi_subdevice * s,
- const diosubd_data * d, int subdev)
+static int pci_dio_add_di(struct comedi_device *dev, struct comedi_subdevice *s,
+ const struct diosubd_data *d, int subdev)
{
s->type = COMEDI_SUBD_DI;
s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON | d->specflags;
/*
==============================================================================
*/
-static int pci_dio_add_do(struct comedi_device * dev, struct comedi_subdevice * s,
- const diosubd_data * d, int subdev)
+static int pci_dio_add_do(struct comedi_device *dev, struct comedi_subdevice *s,
+ const struct diosubd_data *d, int subdev)
{
s->type = COMEDI_SUBD_DO;
s->subdev_flags = SDF_WRITABLE | SDF_GROUND | SDF_COMMON;
/*
==============================================================================
*/
-static int CheckAndAllocCard(struct comedi_device * dev, struct comedi_devconfig * it,
- struct pci_dev *pcidev)
+static int CheckAndAllocCard(struct comedi_device *dev,
+ struct comedi_devconfig *it,
+ struct pci_dev *pcidev)
{
- pci_dio_private *pr, *prev;
+ struct pci_dio_private *pr, *prev;
for (pr = pci_priv, prev = NULL; pr != NULL; prev = pr, pr = pr->next) {
if (pr->pcidev == pcidev) {
- return 0; // this card is used, look for another
+ return 0; /* this card is used, look for another */
}
}
/*
==============================================================================
*/
-static int pci_dio_attach(struct comedi_device * dev, struct comedi_devconfig * it)
+static int pci_dio_attach(struct comedi_device *dev,
+ struct comedi_devconfig *it)
{
struct comedi_subdevice *s;
int ret, subdev, n_subdevices, i, j;
unsigned long iobase;
struct pci_dev *pcidev;
- rt_printk("comedi%d: adv_pci_dio: ", dev->minor);
+ printk("comedi%d: adv_pci_dio: ", dev->minor);
- if ((ret = alloc_private(dev, sizeof(pci_dio_private))) < 0) {
- rt_printk(", Error: Cann't allocate private memory!\n");
+ ret = alloc_private(dev, sizeof(struct pci_dio_private));
+ if (ret < 0) {
+ printk(", Error: Cann't allocate private memory!\n");
return -ENOMEM;
}
for (pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL);
- pcidev != NULL;
- pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pcidev)) {
- // loop through cards supported by this driver
+ pcidev != NULL;
+ pcidev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pcidev)) {
+ /* loop through cards supported by this driver */
for (i = 0; i < n_boardtypes; ++i) {
if (boardtypes[i].vendor_id != pcidev->vendor)
continue;
if (boardtypes[i].device_id != pcidev->device)
continue;
- // was a particular bus/slot requested?
+ /* was a particular bus/slot requested? */
if (it->options[0] || it->options[1]) {
- // are we on the wrong bus/slot?
+ /* are we on the wrong bus/slot? */
if (pcidev->bus->number != it->options[0] ||
- PCI_SLOT(pcidev->devfn) !=
- it->options[1]) {
+ PCI_SLOT(pcidev->devfn) != it->options[1]) {
continue;
}
}
ret = CheckAndAllocCard(dev, it, pcidev);
- if (ret != 1) continue;
+ if (ret != 1)
+ continue;
dev->board_ptr = boardtypes + i;
break;
}
}
if (!dev->board_ptr) {
- rt_printk
- (", Error: Requested type of the card was not found!\n");
+ printk(", Error: Requested type of the card was not found!\n");
return -EIO;
}
if (comedi_pci_enable(pcidev, driver_pci_dio.driver_name)) {
- rt_printk
- (", Error: Can't enable PCI device and request regions!\n");
+ printk
+ (", Error: Can't enable PCI device and request regions!\n");
return -EIO;
}
iobase = pci_resource_start(pcidev, this_board->main_pci_region);
- rt_printk(", b:s:f=%d:%d:%d, io=0x%4lx",
- pcidev->bus->number, PCI_SLOT(pcidev->devfn),
- PCI_FUNC(pcidev->devfn), iobase);
+ printk(", b:s:f=%d:%d:%d, io=0x%4lx",
+ pcidev->bus->number, PCI_SLOT(pcidev->devfn),
+ PCI_FUNC(pcidev->devfn), iobase);
dev->iobase = iobase;
dev->board_name = this_board->name;
if (this_board->cardtype == TYPE_PCI1760) {
- n_subdevices = 4; // 8 IDI, 8 IDO, 2 PWM, 8 CNT
+ n_subdevices = 4; /* 8 IDI, 8 IDO, 2 PWM, 8 CNT */
} else {
n_subdevices = 0;
for (i = 0; i < MAX_DI_SUBDEVS; i++)
n_subdevices++;
}
- if ((ret = alloc_subdevices(dev, n_subdevices)) < 0) {
- rt_printk(", Error: Cann't allocate subdevice memory!\n");
+ ret = alloc_subdevices(dev, n_subdevices);
+ if (ret < 0) {
+ printk(", Error: Cann't allocate subdevice memory!\n");
return ret;
}
- rt_printk(".\n");
+ printk(".\n");
subdev = 0;
for (j = 0; j < this_board->sdio[i].regs; j++) {
s = dev->subdevices + subdev;
subdev_8255_init(dev, s, NULL,
- dev->iobase + this_board->sdio[i].addr +
- SIZE_8255 * j);
+ dev->iobase +
+ this_board->sdio[i].addr +
+ SIZE_8255 * j);
subdev++;
}
/*
==============================================================================
*/
-static int pci_dio_detach(struct comedi_device * dev)
+static int pci_dio_detach(struct comedi_device *dev)
{
int i, j;
struct comedi_subdevice *s;
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff