include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[safe/jmp/linux-2.6] / drivers / spi / omap_uwire.c
index 60b5381..160d326 100644 (file)
@@ -41,6 +41,7 @@
 #include <linux/interrupt.h>
 #include <linux/err.h>
 #include <linux/clk.h>
+#include <linux/slab.h>
 
 #include <linux/spi/spi.h>
 #include <linux/spi/spi_bitbang.h>
@@ -51,8 +52,8 @@
 #include <asm/io.h>
 #include <asm/mach-types.h>
 
-#include <mach/mux.h>
-#include <mach/omap730.h>      /* OMAP730_IO_CONF registers */
+#include <plat/mux.h>
+#include <plat/omap7xx.h>      /* OMAP7XX_IO_CONF registers */
 
 
 /* FIXME address is now a platform device resource,
@@ -213,7 +214,7 @@ static int uwire_txrx(struct spi_device *spi, struct spi_transfer *t)
        unsigned        bits = ust->bits_per_word;
        unsigned        bytes;
        u16             val, w;
-       int             status = 0;;
+       int             status = 0;
 
        if (!t->tx_buf && !t->rx_buf)
                return 0;
@@ -339,8 +340,6 @@ static int uwire_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
        bits = spi->bits_per_word;
        if (t != NULL && t->bits_per_word)
                bits = t->bits_per_word;
-       if (!bits)
-               bits = 8;
 
        if (bits > 16) {
                pr_debug("%s: wordsize %d?\n", dev_name(&spi->dev), bits);
@@ -449,19 +448,10 @@ done:
        return status;
 }
 
-/* the spi->mode bits understood by this driver: */
-#define MODEBITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH)
-
 static int uwire_setup(struct spi_device *spi)
 {
        struct uwire_state *ust = spi->controller_state;
 
-       if (spi->mode & ~MODEBITS) {
-               dev_dbg(&spi->dev, "setup: unsupported mode bits %x\n",
-                       spi->mode & ~MODEBITS);
-               return -EINVAL;
-       }
-
        if (ust == NULL) {
                ust = kzalloc(sizeof(*ust), GFP_KERNEL);
                if (ust == NULL)
@@ -506,21 +496,27 @@ static int __init uwire_probe(struct platform_device *pdev)
 
        dev_set_drvdata(&pdev->dev, uwire);
 
-       uwire->ck = clk_get(&pdev->dev, "armxor_ck");
-       if (!uwire->ck || IS_ERR(uwire->ck)) {
-               dev_dbg(&pdev->dev, "no mpu_xor_clk ?\n");
+       uwire->ck = clk_get(&pdev->dev, "fck");
+       if (IS_ERR(uwire->ck)) {
+               status = PTR_ERR(uwire->ck);
+               dev_dbg(&pdev->dev, "no functional clock?\n");
                spi_master_put(master);
-               return -ENODEV;
+               return status;
        }
        clk_enable(uwire->ck);
 
-       if (cpu_is_omap730())
+       if (cpu_is_omap7xx())
                uwire_idx_shift = 1;
        else
                uwire_idx_shift = 2;
 
        uwire_write_reg(UWIRE_SR3, 1);
 
+       /* the spi->mode bits understood by this driver: */
+       master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
+
+       master->flags = SPI_MASTER_HALF_DUPLEX;
+
        master->bus_num = 2;    /* "official" */
        master->num_chipselect = 4;
        master->setup = uwire_setup;
@@ -578,8 +574,8 @@ static int __init omap_uwire_init(void)
        }
        if (machine_is_omap_perseus2()) {
                /* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */
-               int val = omap_readl(OMAP730_IO_CONF_9) & ~0x00EEE000;
-               omap_writel(val | 0x00AAA000, OMAP730_IO_CONF_9);
+               int val = omap_readl(OMAP7XX_IO_CONF_9) & ~0x00EEE000;
+               omap_writel(val | 0x00AAA000, OMAP7XX_IO_CONF_9);
        }
 
        return platform_driver_probe(&uwire_driver, uwire_probe);