#define SN_SAL_BUFFER_SIZE (64 * (1 << 10))
#define SN_SAL_UART_FIFO_DEPTH 16
-#define SN_SAL_UART_FIFO_SPEED_CPS 9600/10
+#define SN_SAL_UART_FIFO_SPEED_CPS (9600/10)
/* sn_transmit_chars() calling args */
#define TRANSMIT_BUFFERED 0
return;
}
- if (port->sc_port.info) {
+ if (port->sc_port.state) {
/* The serial_core stuffs are initilized, use them */
- tty = port->sc_port.info->port.tty;
+ tty = port->sc_port.state->port.tty;
}
else {
/* Not registered yet - can't pass to tty layer. */
BUG_ON(!port->sc_is_asynch);
- if (port->sc_port.info) {
+ if (port->sc_port.state) {
/* We're initilized, using serial core infrastructure */
- xmit = &port->sc_port.info->xmit;
+ xmit = &port->sc_port.state->xmit;
} else {
/* Probably sn_sal_switch_to_asynch has been run but serial core isn't
* initilized yet. Just return. Writes are going through
/* We can't look at the xmit buffer if we're not registered with serial core
* yet. So only do the fancy recovery after registering
*/
- if (!port->sc_port.info) {
+ if (!port->sc_port.state) {
/* Not yet registered with serial core - simple case */
puts_raw_fixed(port->sc_ops->sal_puts_raw, s, count);
return;
/* somebody really wants this output, might be an
* oops, kdb, panic, etc. make sure they get it. */
if (spin_is_locked(&port->sc_port.lock)) {
- int lhead = port->sc_port.info->xmit.head;
- int ltail = port->sc_port.info->xmit.tail;
+ int lhead = port->sc_port.state->xmit.head;
+ int ltail = port->sc_port.state->xmit.tail;
int counter, got_lock = 0;
/*
break;
} else {
/* still locked */
- if ((lhead != port->sc_port.info->xmit.head)
+ if ((lhead != port->sc_port.state->xmit.head)
|| (ltail !=
- port->sc_port.info->xmit.tail)) {
+ port->sc_port.state->xmit.tail)) {
lhead =
- port->sc_port.info->xmit.head;
+ port->sc_port.state->xmit.head;
ltail =
- port->sc_port.info->xmit.tail;
+ port->sc_port.state->xmit.tail;
counter = 0;
}
}