*
* SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
*
- * Copyright (C) 2002, 2003, 2004 Paul Mundt
+ * Copyright (C) 2002 - 2008 Paul Mundt
+ * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
*
* based off of the old drivers/char/sh-sci.c by:
*
* Modified to support multiple serial ports. Stuart Menefy (May 2000).
* Modified to support SecureEdge. David McCullough (2002)
* Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
+ * Removed SH7300 support (Jul 2007).
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
+#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+#define SUPPORT_SYSRQ
+#endif
#undef DEBUG
-#include <linux/config.h>
#include <linux/module.h>
#include <linux/errno.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/tty.h>
#include <linux/major.h>
#include <linux/string.h>
#include <linux/sysrq.h>
-#include <linux/fcntl.h>
-#include <linux/ptrace.h>
#include <linux/ioport.h>
#include <linux/mm.h>
-#include <linux/slab.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/console.h>
-#include <linux/bitops.h>
-#include <linux/generic_serial.h>
-
-#ifdef CONFIG_CPU_FREQ
+#include <linux/platform_device.h>
+#include <linux/serial_sci.h>
#include <linux/notifier.h>
#include <linux/cpufreq.h>
-#endif
-
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-
-#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
-#include <asm/clock.h>
-#endif
+#include <linux/clk.h>
+#include <linux/ctype.h>
+#include <linux/err.h>
+#include <linux/list.h>
-#ifdef CONFIG_SH_STANDARD_BIOS
+#ifdef CONFIG_SUPERH
#include <asm/sh_bios.h>
#endif
-#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
-#define SUPPORT_SYSRQ
+#ifdef CONFIG_H8300
+#include <asm/gpio.h>
#endif
#include "sh-sci.h"
-#ifdef CONFIG_SH_KGDB
-#include <asm/kgdb.h>
+struct sci_port {
+ struct uart_port port;
-static int kgdb_get_char(struct sci_port *port);
-static void kgdb_put_char(struct sci_port *port, char c);
-static void kgdb_handle_error(struct sci_port *port);
-static struct sci_port *kgdb_sci_port;
-#endif /* CONFIG_SH_KGDB */
+ /* Port type */
+ unsigned int type;
-#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
-static struct sci_port *serial_console_port = 0;
-#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
+ /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
+ unsigned int irqs[SCIx_NR_IRQS];
+
+ /* Port enable callback */
+ void (*enable)(struct uart_port *port);
+
+ /* Port disable callback */
+ void (*disable)(struct uart_port *port);
+
+ /* Break timer */
+ struct timer_list break_timer;
+ int break_flag;
+
+ /* Interface clock */
+ struct clk *iclk;
+ /* Data clock */
+ struct clk *dclk;
+
+ struct list_head node;
+};
+
+struct sh_sci_priv {
+ spinlock_t lock;
+ struct list_head ports;
+ struct notifier_block clk_nb;
+};
/* Function prototypes */
static void sci_stop_tx(struct uart_port *port);
-static void sci_start_tx(struct uart_port *port);
-static void sci_start_rx(struct uart_port *port, unsigned int tty_start);
-static void sci_stop_rx(struct uart_port *port);
-static int sci_request_irq(struct sci_port *port);
-static void sci_free_irq(struct sci_port *port);
-static struct sci_port sci_ports[];
+#define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
+
+static struct sci_port sci_ports[SCI_NPORTS];
static struct uart_driver sci_uart_driver;
-#define SCI_NPORTS sci_uart_driver.nr
+static inline struct sci_port *
+to_sci_port(struct uart_port *uart)
+{
+ return container_of(uart, struct sci_port, port);
+}
-#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
+#if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
-static void handle_error(struct uart_port *port)
-{ /* Clear error flags */
+#ifdef CONFIG_CONSOLE_POLL
+static inline void handle_error(struct uart_port *port)
+{
+ /* Clear error flags */
sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
}
-static int get_char(struct uart_port *port)
+static int sci_poll_get_char(struct uart_port *port)
{
- unsigned long flags;
unsigned short status;
int c;
- local_irq_save(flags);
- do {
+ do {
status = sci_in(port, SCxSR);
if (status & SCxSR_ERRORS(port)) {
handle_error(port);
continue;
}
} while (!(status & SCxSR_RDxF(port)));
+
c = sci_in(port, SCxRDR);
- sci_in(port, SCxSR); /* Dummy read */
+
+ /* Dummy read */
+ sci_in(port, SCxSR);
sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
- local_irq_restore(flags);
return c;
}
+#endif
-/* Taken from sh-stub.c of GDB 4.18 */
-static const char hexchars[] = "0123456789abcdef";
-
-static __inline__ char highhex(int x)
-{
- return hexchars[(x >> 4) & 0xf];
-}
-
-static __inline__ char lowhex(int x)
-{
- return hexchars[x & 0xf];
-}
-
-#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
-
-/*
- * Send the packet in buffer. The host gets one chance to read it.
- * This routine does not wait for a positive acknowledge.
- */
-
-#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
-static void put_char(struct uart_port *port, char c)
+static void sci_poll_put_char(struct uart_port *port, unsigned char c)
{
- unsigned long flags;
unsigned short status;
- local_irq_save(flags);
-
do {
status = sci_in(port, SCxSR);
} while (!(status & SCxSR_TDxE(port)));
sci_out(port, SCxTDR, c);
- sci_in(port, SCxSR); /* Dummy read */
- sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
-
- local_irq_restore(flags);
+ sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port));
}
+#endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
-static void put_string(struct sci_port *sci_port, const char *buffer, int count)
+#if defined(__H8300H__) || defined(__H8300S__)
+static void sci_init_pins(struct uart_port *port, unsigned int cflag)
{
- struct uart_port *port = &sci_port->port;
- const unsigned char *p = buffer;
- int i;
+ int ch = (port->mapbase - SMR0) >> 3;
-#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
- int checksum;
- int usegdb=0;
+ /* set DDR regs */
+ H8300_GPIO_DDR(h8300_sci_pins[ch].port,
+ h8300_sci_pins[ch].rx,
+ H8300_GPIO_INPUT);
+ H8300_GPIO_DDR(h8300_sci_pins[ch].port,
+ h8300_sci_pins[ch].tx,
+ H8300_GPIO_OUTPUT);
-#ifdef CONFIG_SH_STANDARD_BIOS
- /* This call only does a trap the first time it is
- * called, and so is safe to do here unconditionally
- */
- usegdb |= sh_bios_in_gdb_mode();
-#endif
-#ifdef CONFIG_SH_KGDB
- usegdb |= (kgdb_in_gdb_mode && (port == kgdb_sci_port));
-#endif
+ /* tx mark output*/
+ H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
+}
+#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
+static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
+{
+ if (port->mapbase == 0xA4400000) {
+ __raw_writew(__raw_readw(PACR) & 0xffc0, PACR);
+ __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR);
+ } else if (port->mapbase == 0xA4410000)
+ __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR);
+}
+#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
+static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
+{
+ unsigned short data;
- if (usegdb) {
- /* $<packet info>#<checksum>. */
- do {
- unsigned char c;
- put_char(port, '$');
- put_char(port, 'O'); /* 'O'utput to console */
- checksum = 'O';
-
- for (i=0; i<count; i++) { /* Don't use run length encoding */
- int h, l;
-
- c = *p++;
- h = highhex(c);
- l = lowhex(c);
- put_char(port, h);
- put_char(port, l);
- checksum += h + l;
+ if (cflag & CRTSCTS) {
+ /* enable RTS/CTS */
+ if (port->mapbase == 0xa4430000) { /* SCIF0 */
+ /* Clear PTCR bit 9-2; enable all scif pins but sck */
+ data = __raw_readw(PORT_PTCR);
+ __raw_writew((data & 0xfc03), PORT_PTCR);
+ } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
+ /* Clear PVCR bit 9-2 */
+ data = __raw_readw(PORT_PVCR);
+ __raw_writew((data & 0xfc03), PORT_PVCR);
+ }
+ } else {
+ if (port->mapbase == 0xa4430000) { /* SCIF0 */
+ /* Clear PTCR bit 5-2; enable only tx and rx */
+ data = __raw_readw(PORT_PTCR);
+ __raw_writew((data & 0xffc3), PORT_PTCR);
+ } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
+ /* Clear PVCR bit 5-2 */
+ data = __raw_readw(PORT_PVCR);
+ __raw_writew((data & 0xffc3), PORT_PVCR);
}
- put_char(port, '#');
- put_char(port, highhex(checksum));
- put_char(port, lowhex(checksum));
- } while (get_char(port) != '+');
- } else
-#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
- for (i=0; i<count; i++) {
- if (*p == 10)
- put_char(port, '\r');
- put_char(port, *p++);
}
}
-#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
-
-
-#ifdef CONFIG_SH_KGDB
-
-/* Is the SCI ready, ie is there a char waiting? */
-static int kgdb_is_char_ready(struct sci_port *port)
+#elif defined(CONFIG_CPU_SH3)
+/* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
+static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
{
- unsigned short status = sci_in(port, SCxSR);
+ unsigned short data;
- if (status & (SCxSR_ERRORS(port) | SCxSR_BRK(port)))
- kgdb_handle_error(port);
+ /* We need to set SCPCR to enable RTS/CTS */
+ data = __raw_readw(SCPCR);
+ /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
+ __raw_writew(data & 0x0fcf, SCPCR);
- return (status & SCxSR_RDxF(port));
-}
+ if (!(cflag & CRTSCTS)) {
+ /* We need to set SCPCR to enable RTS/CTS */
+ data = __raw_readw(SCPCR);
+ /* Clear out SCP7MD1,0, SCP4MD1,0,
+ Set SCP6MD1,0 = {01} (output) */
+ __raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
-/* Write a char */
-static void kgdb_put_char(struct sci_port *port, char c)
+ data = __raw_readb(SCPDR);
+ /* Set /RTS2 (bit6) = 0 */
+ __raw_writeb(data & 0xbf, SCPDR);
+ }
+}
+#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
+static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
{
- unsigned short status;
+ unsigned short data;
- do
- status = sci_in(port, SCxSR);
- while (!(status & SCxSR_TDxE(port)));
+ if (port->mapbase == 0xffe00000) {
+ data = __raw_readw(PSCR);
+ data &= ~0x03cf;
+ if (!(cflag & CRTSCTS))
+ data |= 0x0340;
- sci_out(port, SCxTDR, c);
- sci_in(port, SCxSR); /* Dummy read */
- sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
+ __raw_writew(data, PSCR);
+ }
}
-
-/* Get a char if there is one, else ret -1 */
-static int kgdb_get_char(struct sci_port *port)
+#elif defined(CONFIG_CPU_SUBTYPE_SH7757) || \
+ defined(CONFIG_CPU_SUBTYPE_SH7763) || \
+ defined(CONFIG_CPU_SUBTYPE_SH7780) || \
+ defined(CONFIG_CPU_SUBTYPE_SH7785) || \
+ defined(CONFIG_CPU_SUBTYPE_SH7786) || \
+ defined(CONFIG_CPU_SUBTYPE_SHX3)
+static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
{
- int c;
-
- if (kgdb_is_char_ready(port) == 0)
- c = -1;
- else {
- c = sci_in(port, SCxRDR);
- sci_in(port, SCxSR); /* Dummy read */
- sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
- }
-
- return c;
+ if (!(cflag & CRTSCTS))
+ __raw_writew(0x0080, SCSPTR0); /* Set RTS = 1 */
}
-
-/* Called from kgdbstub.c to get a character, i.e. is blocking */
-static int kgdb_sci_getchar(void)
+#elif defined(CONFIG_CPU_SH4) && !defined(CONFIG_CPU_SH4A)
+static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
{
- volatile int c;
-
- /* Keep trying to read a character, this could be neater */
- while ((c = kgdb_get_char(kgdb_sci_port)) < 0);
-
- return c;
+ if (!(cflag & CRTSCTS))
+ __raw_writew(0x0080, SCSPTR2); /* Set RTS = 1 */
}
-
-/* Called from kgdbstub.c to put a character, just a wrapper */
-static void kgdb_sci_putchar(int c)
+#else
+static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
{
-
- kgdb_put_char(kgdb_sci_port, c);
+ /* Nothing to do */
}
+#endif
-/* Clear any errors on the SCI */
-static void kgdb_handle_error(struct sci_port *port)
+#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
+ defined(CONFIG_CPU_SUBTYPE_SH7780) || \
+ defined(CONFIG_CPU_SUBTYPE_SH7785) || \
+ defined(CONFIG_CPU_SUBTYPE_SH7786)
+static inline int scif_txroom(struct uart_port *port)
{
- sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); /* Clear error flags */
+ return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
}
-/* Breakpoint if there's a break sent on the serial port */
-static void kgdb_break_interrupt(int irq, void *ptr, struct pt_regs *regs)
+static inline int scif_rxroom(struct uart_port *port)
{
- struct sci_port *port = ptr;
- unsigned short status = sci_in(port, SCxSR);
-
- if (status & SCxSR_BRK(port)) {
-
- /* Break into the debugger if a break is detected */
- BREAKPOINT();
-
- /* Clear */
- sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
- }
+ return sci_in(port, SCRFDR) & 0xff;
}
-
-#endif /* CONFIG_SH_KGDB */
-
-#if defined(__H8300S__)
-enum { sci_disable, sci_enable };
-
-static void h8300_sci_enable(struct uart_port* port, unsigned int ctrl)
+#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
+static inline int scif_txroom(struct uart_port *port)
{
- volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL;
- int ch = (port->mapbase - SMR0) >> 3;
- unsigned char mask = 1 << (ch+1);
-
- if (ctrl == sci_disable) {
- *mstpcrl |= mask;
+ if ((port->mapbase == 0xffe00000) ||
+ (port->mapbase == 0xffe08000)) {
+ /* SCIF0/1*/
+ return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
} else {
- *mstpcrl &= ~mask;
+ /* SCIF2 */
+ return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
}
}
-#endif
-
-#if defined(SCI_ONLY) || defined(SCI_AND_SCIF)
-#if defined(__H8300H__) || defined(__H8300S__)
-static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
-{
- int ch = (port->mapbase - SMR0) >> 3;
-
- /* set DDR regs */
- H8300_GPIO_DDR(h8300_sci_pins[ch].port,h8300_sci_pins[ch].rx,H8300_GPIO_INPUT);
- H8300_GPIO_DDR(h8300_sci_pins[ch].port,h8300_sci_pins[ch].tx,H8300_GPIO_OUTPUT);
- /* tx mark output*/
- H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
-}
-#endif
-#endif
-#if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
-#if defined(CONFIG_CPU_SUBTYPE_SH7300)
-/* SH7300 doesn't use RTS/CTS */
-static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
+static inline int scif_rxroom(struct uart_port *port)
{
- sci_out(port, SCFCR, 0);
+ if ((port->mapbase == 0xffe00000) ||
+ (port->mapbase == 0xffe08000)) {
+ /* SCIF0/1*/
+ return sci_in(port, SCRFDR) & 0xff;
+ } else {
+ /* SCIF2 */
+ return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
+ }
}
-#elif defined(CONFIG_CPU_SH3)
-/* For SH7705, SH7707, SH7709, SH7709A, SH7729 */
-static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
+#else
+static inline int scif_txroom(struct uart_port *port)
{
- unsigned int fcr_val = 0;
- unsigned short data;
-
- /* We need to set SCPCR to enable RTS/CTS */
- data = ctrl_inw(SCPCR);
- /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
- ctrl_outw(data & 0x0fcf, SCPCR);
-
- if (cflag & CRTSCTS)
- fcr_val |= SCFCR_MCE;
- else {
- /* We need to set SCPCR to enable RTS/CTS */
- data = ctrl_inw(SCPCR);
- /* Clear out SCP7MD1,0, SCP4MD1,0,
- Set SCP6MD1,0 = {01} (output) */
- ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR);
-
- data = ctrl_inb(SCPDR);
- /* Set /RTS2 (bit6) = 0 */
- ctrl_outb(data & 0xbf, SCPDR);
- }
-
- sci_out(port, SCFCR, fcr_val);
+ return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
}
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
-static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
+static inline int scif_rxroom(struct uart_port *port)
{
- unsigned int fcr_val = 0;
-
- if (cflag & CRTSCTS)
- fcr_val |= SCFCR_MCE;
-
- sci_out(port, SCFCR, fcr_val);
+ return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
}
#endif
-#else
-/* For SH7750 */
-static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
+static inline int sci_txroom(struct uart_port *port)
{
- unsigned int fcr_val = 0;
-
- if (cflag & CRTSCTS) {
- fcr_val |= SCFCR_MCE;
- } else {
-#ifdef CONFIG_CPU_SUBTYPE_SH7780
- ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
-#else
- ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
-#endif
- }
- sci_out(port, SCFCR, fcr_val);
+ return (sci_in(port, SCxSR) & SCI_TDRE) != 0;
}
-#endif
-#endif /* SCIF_ONLY || SCI_AND_SCIF */
+static inline int sci_rxroom(struct uart_port *port)
+{
+ return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
+}
/* ********************************************************************** *
* the interrupt related routines *
static void sci_transmit_chars(struct uart_port *port)
{
- struct circ_buf *xmit = &port->info->xmit;
+ struct circ_buf *xmit = &port->state->xmit;
unsigned int stopped = uart_tx_stopped(port);
- unsigned long flags;
unsigned short status;
unsigned short ctrl;
- int count, txroom;
+ int count;
status = sci_in(port, SCxSR);
if (!(status & SCxSR_TDxE(port))) {
- local_irq_save(flags);
ctrl = sci_in(port, SCSCR);
- if (uart_circ_empty(xmit)) {
+ if (uart_circ_empty(xmit))
ctrl &= ~SCI_CTRL_FLAGS_TIE;
- } else {
+ else
ctrl |= SCI_CTRL_FLAGS_TIE;
- }
sci_out(port, SCSCR, ctrl);
- local_irq_restore(flags);
return;
}
-#if !defined(SCI_ONLY)
- if (port->type == PORT_SCIF) {
-#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
- txroom = SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f);
-#else
- txroom = SCIF_TXROOM_MAX - (sci_in(port, SCFDR)>>8);
-#endif
- } else {
- txroom = (sci_in(port, SCxSR) & SCI_TDRE)?1:0;
- }
-#else
- txroom = (sci_in(port, SCxSR) & SCI_TDRE)?1:0;
-#endif
-
- count = txroom;
+ if (port->type == PORT_SCI)
+ count = sci_txroom(port);
+ else
+ count = scif_txroom(port);
do {
unsigned char c;
if (uart_circ_empty(xmit)) {
sci_stop_tx(port);
} else {
- local_irq_save(flags);
ctrl = sci_in(port, SCSCR);
-#if !defined(SCI_ONLY)
- if (port->type == PORT_SCIF) {
+ if (port->type != PORT_SCI) {
sci_in(port, SCxSR); /* Dummy read */
sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
}
-#endif
ctrl |= SCI_CTRL_FLAGS_TIE;
sci_out(port, SCSCR, ctrl);
- local_irq_restore(flags);
}
}
/* On SH3, SCIF may read end-of-break as a space->mark char */
-#define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
+#define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
-static inline void sci_receive_chars(struct uart_port *port,
- struct pt_regs *regs)
+static inline void sci_receive_chars(struct uart_port *port)
{
- struct tty_struct *tty = port->info->tty;
+ struct sci_port *sci_port = to_sci_port(port);
+ struct tty_struct *tty = port->state->port.tty;
int i, count, copied = 0;
unsigned short status;
unsigned char flag;
return;
while (1) {
-#if !defined(SCI_ONLY)
- if (port->type == PORT_SCIF) {
-#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
- count = sci_in(port, SCRFDR) & 0x7f;
-#else
- count = sci_in(port, SCFDR)&SCIF_RFDC_MASK ;
-#endif
- } else {
- count = (sci_in(port, SCxSR)&SCxSR_RDxF(port))?1:0;
- }
-#else
- count = (sci_in(port, SCxSR)&SCxSR_RDxF(port))?1:0;
-#endif
+ if (port->type == PORT_SCI)
+ count = sci_rxroom(port);
+ else
+ count = scif_rxroom(port);
/* Don't copy more bytes than there is room for in the buffer */
count = tty_buffer_request_room(tty, count);
if (port->type == PORT_SCI) {
char c = sci_in(port, SCxRDR);
- if(((struct sci_port *)port)->break_flag
- || uart_handle_sysrq_char(port, c, regs)) {
+ if (uart_handle_sysrq_char(port, c) ||
+ sci_port->break_flag)
count = 0;
- } else {
- tty_insert_flip_char(tty, c, TTY_NORMAL);
- }
+ else
+ tty_insert_flip_char(tty, c, TTY_NORMAL);
} else {
- for (i=0; i<count; i++) {
+ for (i = 0; i < count; i++) {
char c = sci_in(port, SCxRDR);
status = sci_in(port, SCxSR);
#if defined(CONFIG_CPU_SH3)
/* Skip "chars" during break */
- if (((struct sci_port *)port)->break_flag) {
+ if (sci_port->break_flag) {
if ((c == 0) &&
(status & SCxSR_FER(port))) {
count--; i--;
continue;
}
+
/* Nonzero => end-of-break */
- pr_debug("scif: debounce<%02x>\n", c);
- ((struct sci_port *)port)->break_flag = 0;
+ dev_dbg(port->dev, "debounce<%02x>\n", c);
+ sci_port->break_flag = 0;
+
if (STEPFN(c)) {
count--; i--;
continue;
}
}
#endif /* CONFIG_CPU_SH3 */
- if (uart_handle_sysrq_char(port, c, regs)) {
+ if (uart_handle_sysrq_char(port, c)) {
count--; i--;
continue;
}
/* Store data and status */
if (status&SCxSR_FER(port)) {
flag = TTY_FRAME;
- pr_debug("sci: frame error\n");
+ dev_notice(port->dev, "frame error\n");
} else if (status&SCxSR_PER(port)) {
flag = TTY_PARITY;
- pr_debug("sci: parity error\n");
+ dev_notice(port->dev, "parity error\n");
} else
flag = TTY_NORMAL;
+
tty_insert_flip_char(tty, c, flag);
}
}
/* Ensure that two consecutive samples find the break over. */
static void sci_break_timer(unsigned long data)
{
- struct sci_port * port = (struct sci_port *)data;
- if(sci_rxd_in(&port->port) == 0) {
+ struct sci_port *port = (struct sci_port *)data;
+
+ if (sci_rxd_in(&port->port) == 0) {
port->break_flag = 1;
- sci_schedule_break_timer(port);
- } else if(port->break_flag == 1){
+ sci_schedule_break_timer(port);
+ } else if (port->break_flag == 1) {
/* break is over. */
port->break_flag = 2;
- sci_schedule_break_timer(port);
- } else port->break_flag = 0;
+ sci_schedule_break_timer(port);
+ } else
+ port->break_flag = 0;
}
static inline int sci_handle_errors(struct uart_port *port)
{
int copied = 0;
unsigned short status = sci_in(port, SCxSR);
- struct tty_struct *tty = port->info->tty;
+ struct tty_struct *tty = port->state->port.tty;
- if (status&SCxSR_ORER(port)) {
+ if (status & SCxSR_ORER(port)) {
/* overrun error */
- if(tty_insert_flip_char(tty, 0, TTY_OVERRUN))
+ if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
copied++;
- pr_debug("sci: overrun error\n");
+
+ dev_notice(port->dev, "overrun error");
}
- if (status&SCxSR_FER(port)) {
+ if (status & SCxSR_FER(port)) {
if (sci_rxd_in(port) == 0) {
/* Notify of BREAK */
- struct sci_port * sci_port = (struct sci_port *)port;
- if(!sci_port->break_flag) {
- sci_port->break_flag = 1;
- sci_schedule_break_timer((struct sci_port *)port);
+ struct sci_port *sci_port = to_sci_port(port);
+
+ if (!sci_port->break_flag) {
+ sci_port->break_flag = 1;
+ sci_schedule_break_timer(sci_port);
+
/* Do sysrq handling. */
- if(uart_handle_break(port))
+ if (uart_handle_break(port))
return 0;
- pr_debug("sci: BREAK detected\n");
- if(tty_insert_flip_char(tty, 0, TTY_BREAK))
- copied++;
- }
- }
- else {
+
+ dev_dbg(port->dev, "BREAK detected\n");
+
+ if (tty_insert_flip_char(tty, 0, TTY_BREAK))
+ copied++;
+ }
+
+ } else {
/* frame error */
- if(tty_insert_flip_char(tty, 0, TTY_FRAME))
+ if (tty_insert_flip_char(tty, 0, TTY_FRAME))
copied++;
- pr_debug("sci: frame error\n");
+
+ dev_notice(port->dev, "frame error\n");
}
}
- if (status&SCxSR_PER(port)) {
- if(tty_insert_flip_char(tty, 0, TTY_PARITY))
- copied++;
+ if (status & SCxSR_PER(port)) {
/* parity error */
- pr_debug("sci: parity error\n");
+ if (tty_insert_flip_char(tty, 0, TTY_PARITY))
+ copied++;
+
+ dev_notice(port->dev, "parity error");
}
if (copied)
return copied;
}
+static inline int sci_handle_fifo_overrun(struct uart_port *port)
+{
+ struct tty_struct *tty = port->state->port.tty;
+ int copied = 0;
+
+ if (port->type != PORT_SCIF)
+ return 0;
+
+ if ((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
+ sci_out(port, SCLSR, 0);
+
+ tty_insert_flip_char(tty, 0, TTY_OVERRUN);
+ tty_flip_buffer_push(tty);
+
+ dev_notice(port->dev, "overrun error\n");
+ copied++;
+ }
+
+ return copied;
+}
+
static inline int sci_handle_breaks(struct uart_port *port)
{
int copied = 0;
unsigned short status = sci_in(port, SCxSR);
- struct tty_struct *tty = port->info->tty;
- struct sci_port *s = &sci_ports[port->line];
+ struct tty_struct *tty = port->state->port.tty;
+ struct sci_port *s = to_sci_port(port);
+
+ if (uart_handle_break(port))
+ return 0;
if (!s->break_flag && status & SCxSR_BRK(port)) {
#if defined(CONFIG_CPU_SH3)
s->break_flag = 1;
#endif
/* Notify of BREAK */
- if(tty_insert_flip_char(tty, 0, TTY_BREAK))
+ if (tty_insert_flip_char(tty, 0, TTY_BREAK))
copied++;
- pr_debug("sci: BREAK detected\n");
- }
-#if defined(SCIF_ORER)
- /* XXX: Handle SCIF overrun error */
- if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
- sci_out(port, SCLSR, 0);
- if(tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
- copied++;
- pr_debug("sci: overrun error\n");
- }
+ dev_dbg(port->dev, "BREAK detected\n");
}
-#endif
if (copied)
tty_flip_buffer_push(tty);
+
+ copied += sci_handle_fifo_overrun(port);
+
return copied;
}
-static irqreturn_t sci_rx_interrupt(int irq, void *ptr, struct pt_regs *regs)
+static irqreturn_t sci_rx_interrupt(int irq, void *port)
{
- struct uart_port *port = ptr;
-
/* I think sci_receive_chars has to be called irrespective
* of whether the I_IXOFF is set, otherwise, how is the interrupt
* to be disabled?
*/
- sci_receive_chars(port, regs);
+ sci_receive_chars(port);
return IRQ_HANDLED;
}
-static irqreturn_t sci_tx_interrupt(int irq, void *ptr, struct pt_regs *regs)
+static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
{
struct uart_port *port = ptr;
+ unsigned long flags;
+ spin_lock_irqsave(&port->lock, flags);
sci_transmit_chars(port);
+ spin_unlock_irqrestore(&port->lock, flags);
return IRQ_HANDLED;
}
-static irqreturn_t sci_er_interrupt(int irq, void *ptr, struct pt_regs *regs)
+static irqreturn_t sci_er_interrupt(int irq, void *ptr)
{
struct uart_port *port = ptr;
sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
}
} else {
-#if defined(SCIF_ORER)
- if((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
- struct tty_struct *tty = port->info->tty;
-
- sci_out(port, SCLSR, 0);
- tty_insert_flip_char(tty, 0, TTY_OVERRUN);
- tty_flip_buffer_push(tty);
- pr_debug("scif: overrun error\n");
- }
-#endif
- sci_rx_interrupt(irq, ptr, regs);
+ sci_handle_fifo_overrun(port);
+ sci_rx_interrupt(irq, ptr);
}
sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
/* Kick the transmission */
- sci_tx_interrupt(irq, ptr, regs);
+ sci_tx_interrupt(irq, ptr);
return IRQ_HANDLED;
}
-static irqreturn_t sci_br_interrupt(int irq, void *ptr, struct pt_regs *regs)
+static irqreturn_t sci_br_interrupt(int irq, void *ptr)
{
struct uart_port *port = ptr;
return IRQ_HANDLED;
}
-static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr, struct pt_regs *regs)
+static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
{
- unsigned short ssr_status, scr_status;
- struct uart_port *port = ptr;
+ unsigned short ssr_status, scr_status, err_enabled;
+ struct uart_port *port = ptr;
+ irqreturn_t ret = IRQ_NONE;
- ssr_status = sci_in(port,SCxSR);
- scr_status = sci_in(port,SCSCR);
+ ssr_status = sci_in(port, SCxSR);
+ scr_status = sci_in(port, SCSCR);
+ err_enabled = scr_status & (SCI_CTRL_FLAGS_REIE | SCI_CTRL_FLAGS_RIE);
/* Tx Interrupt */
- if ((ssr_status&0x0020) && (scr_status&0x0080))
- sci_tx_interrupt(irq, ptr, regs);
+ if ((ssr_status & SCxSR_TDxE(port)) && (scr_status & SCI_CTRL_FLAGS_TIE))
+ ret = sci_tx_interrupt(irq, ptr);
/* Rx Interrupt */
- if ((ssr_status&0x0002) && (scr_status&0x0040))
- sci_rx_interrupt(irq, ptr, regs);
+ if ((ssr_status & SCxSR_RDxF(port)) && (scr_status & SCI_CTRL_FLAGS_RIE))
+ ret = sci_rx_interrupt(irq, ptr);
/* Error Interrupt */
- if ((ssr_status&0x0080) && (scr_status&0x0400))
- sci_er_interrupt(irq, ptr, regs);
+ if ((ssr_status & SCxSR_ERRORS(port)) && err_enabled)
+ ret = sci_er_interrupt(irq, ptr);
/* Break Interrupt */
- if ((ssr_status&0x0010) && (scr_status&0x0200))
- sci_br_interrupt(irq, ptr, regs);
+ if ((ssr_status & SCxSR_BRK(port)) && err_enabled)
+ ret = sci_br_interrupt(irq, ptr);
- return IRQ_HANDLED;
+ return ret;
}
-#ifdef CONFIG_CPU_FREQ
/*
* Here we define a transistion notifier so that we can update all of our
* ports' baud rate when the peripheral clock changes.
*/
-static int sci_notifier(struct notifier_block *self, unsigned long phase, void *p)
+static int sci_notifier(struct notifier_block *self,
+ unsigned long phase, void *p)
{
- struct cpufreq_freqs *freqs = p;
- int i;
+ struct sh_sci_priv *priv = container_of(self,
+ struct sh_sci_priv, clk_nb);
+ struct sci_port *sci_port;
+ unsigned long flags;
if ((phase == CPUFREQ_POSTCHANGE) ||
- (phase == CPUFREQ_RESUMECHANGE)){
- for (i = 0; i < SCI_NPORTS; i++) {
- struct uart_port *port = &sci_ports[i].port;
- struct clk *clk;
-
- /*
- * Update the uartclk per-port if frequency has
- * changed, since it will no longer necessarily be
- * consistent with the old frequency.
- *
- * Really we want to be able to do something like
- * uart_change_speed() or something along those lines
- * here to implicitly reset the per-port baud rate..
- *
- * Clean this up later..
- */
- clk = clk_get("module_clk");
- port->uartclk = clk_get_rate(clk) * 16;
- clk_put(clk);
- }
-
- printk("%s: got a postchange notification for cpu %d (old %d, new %d)\n",
- __FUNCTION__, freqs->cpu, freqs->old, freqs->new);
+ (phase == CPUFREQ_RESUMECHANGE)) {
+ spin_lock_irqsave(&priv->lock, flags);
+ list_for_each_entry(sci_port, &priv->ports, node)
+ sci_port->port.uartclk = clk_get_rate(sci_port->dclk);
+ spin_unlock_irqrestore(&priv->lock, flags);
}
return NOTIFY_OK;
}
-static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
-#endif /* CONFIG_CPU_FREQ */
+static void sci_clk_enable(struct uart_port *port)
+{
+ struct sci_port *sci_port = to_sci_port(port);
+
+ clk_enable(sci_port->dclk);
+ sci_port->port.uartclk = clk_get_rate(sci_port->dclk);
+
+ if (sci_port->iclk)
+ clk_enable(sci_port->iclk);
+}
+
+static void sci_clk_disable(struct uart_port *port)
+{
+ struct sci_port *sci_port = to_sci_port(port);
+
+ if (sci_port->iclk)
+ clk_disable(sci_port->iclk);
+
+ clk_disable(sci_port->dclk);
+}
static int sci_request_irq(struct sci_port *port)
{
int i;
- irqreturn_t (*handlers[4])(int irq, void *ptr, struct pt_regs *regs) = {
+ irqreturn_t (*handlers[4])(int irq, void *ptr) = {
sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
sci_br_interrupt,
};
"SCI Transmit Data Empty", "SCI Break" };
if (port->irqs[0] == port->irqs[1]) {
- if (!port->irqs[0]) {
- printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n");
+ if (unlikely(!port->irqs[0]))
return -ENODEV;
- }
- if (request_irq(port->irqs[0], sci_mpxed_interrupt, SA_INTERRUPT,
- "sci", port)) {
- printk(KERN_ERR "sci: Cannot allocate irq.\n");
+
+ if (request_irq(port->irqs[0], sci_mpxed_interrupt,
+ IRQF_DISABLED, "sci", port)) {
+ dev_err(port->port.dev, "Can't allocate IRQ\n");
return -ENODEV;
}
} else {
for (i = 0; i < ARRAY_SIZE(handlers); i++) {
- if (!port->irqs[i])
+ if (unlikely(!port->irqs[i]))
continue;
- if (request_irq(port->irqs[i], handlers[i], SA_INTERRUPT,
- desc[i], port)) {
- printk(KERN_ERR "sci: Cannot allocate irq.\n");
+
+ if (request_irq(port->irqs[i], handlers[i],
+ IRQF_DISABLED, desc[i], port)) {
+ dev_err(port->port.dev, "Can't allocate IRQ\n");
return -ENODEV;
}
}
{
int i;
- if (port->irqs[0] == port->irqs[1]) {
- if (!port->irqs[0])
- printk("sci: sci_free_irq error\n");
- else
- free_irq(port->irqs[0], port);
- } else {
+ if (port->irqs[0] == port->irqs[1])
+ free_irq(port->irqs[0], port);
+ else {
for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
if (!port->irqs[i])
continue;
static unsigned int sci_tx_empty(struct uart_port *port)
{
- /* Can't detect */
- return TIOCSER_TEMT;
+ unsigned short status = sci_in(port, SCxSR);
+ return status & SCxSR_TEND(port) ? TIOCSER_TEMT : 0;
}
static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
static void sci_start_tx(struct uart_port *port)
{
- struct sci_port *s = &sci_ports[port->line];
+ unsigned short ctrl;
- disable_irq(s->irqs[SCIx_TXI_IRQ]);
- sci_transmit_chars(port);
- enable_irq(s->irqs[SCIx_TXI_IRQ]);
+ /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
+ ctrl = sci_in(port, SCSCR);
+ ctrl |= SCI_CTRL_FLAGS_TIE;
+ sci_out(port, SCSCR, ctrl);
}
static void sci_stop_tx(struct uart_port *port)
{
- unsigned long flags;
unsigned short ctrl;
/* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
- local_irq_save(flags);
ctrl = sci_in(port, SCSCR);
ctrl &= ~SCI_CTRL_FLAGS_TIE;
sci_out(port, SCSCR, ctrl);
- local_irq_restore(flags);
}
static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
{
- unsigned long flags;
unsigned short ctrl;
/* Set RIE (Receive Interrupt Enable) bit in SCSCR */
- local_irq_save(flags);
ctrl = sci_in(port, SCSCR);
ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
sci_out(port, SCSCR, ctrl);
- local_irq_restore(flags);
}
static void sci_stop_rx(struct uart_port *port)
{
- unsigned long flags;
unsigned short ctrl;
/* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
- local_irq_save(flags);
ctrl = sci_in(port, SCSCR);
ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
sci_out(port, SCSCR, ctrl);
- local_irq_restore(flags);
}
static void sci_enable_ms(struct uart_port *port)
static int sci_startup(struct uart_port *port)
{
- struct sci_port *s = &sci_ports[port->line];
+ struct sci_port *s = to_sci_port(port);
-#if defined(__H8300S__)
- h8300_sci_enable(port, sci_enable);
-#endif
+ if (s->enable)
+ s->enable(port);
sci_request_irq(s);
sci_start_tx(port);
static void sci_shutdown(struct uart_port *port)
{
- struct sci_port *s = &sci_ports[port->line];
+ struct sci_port *s = to_sci_port(port);
sci_stop_rx(port);
sci_stop_tx(port);
sci_free_irq(s);
-#if defined(__H8300S__)
- h8300_sci_enable(port, sci_disable);
-#endif
+ if (s->disable)
+ s->disable(port);
}
-static void sci_set_termios(struct uart_port *port, struct termios *termios,
- struct termios *old)
+static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
+ struct ktermios *old)
{
- struct sci_port *s = &sci_ports[port->line];
- unsigned int status, baud, smr_val;
- unsigned long flags;
- int t;
+ unsigned int status, baud, smr_val, max_baud;
+ int t = -1;
- baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
+ /*
+ * earlyprintk comes here early on with port->uartclk set to zero.
+ * the clock framework is not up and running at this point so here
+ * we assume that 115200 is the maximum baud rate. please note that
+ * the baud rate is not programmed during earlyprintk - it is assumed
+ * that the previous boot loader has enabled required clocks and
+ * setup the baud rate generator hardware for us already.
+ */
+ max_baud = port->uartclk ? port->uartclk / 16 : 115200;
- spin_lock_irqsave(&port->lock, flags);
+ baud = uart_get_baud_rate(port, termios, old, 0, max_baud);
+ if (likely(baud && port->uartclk))
+ t = SCBRR_VALUE(baud, port->uartclk);
do {
status = sci_in(port, SCxSR);
sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
-#if !defined(SCI_ONLY)
- if (port->type == PORT_SCIF) {
+ if (port->type != PORT_SCI)
sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
- }
-#endif
smr_val = sci_in(port, SCSMR) & 3;
if ((termios->c_cflag & CSIZE) == CS7)
sci_out(port, SCSMR, smr_val);
- switch (baud) {
- case 0:
- t = -1;
- break;
- default:
- {
-#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
- struct clk *clk = clk_get("module_clk");
- t = SCBRR_VALUE(baud, clk_get_rate(clk));
- clk_put(clk);
-#else
- t = SCBRR_VALUE(baud);
-#endif
- }
- break;
- }
-
if (t > 0) {
- if(t >= 256) {
+ if (t >= 256) {
sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
t >>= 2;
- } else {
+ } else
sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
- }
+
sci_out(port, SCBRR, t);
udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
}
- if (likely(s->init_pins))
- s->init_pins(port, termios->c_cflag);
+ sci_init_pins(port, termios->c_cflag);
+ sci_out(port, SCFCR, (termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0);
sci_out(port, SCSCR, SCSCR_INIT(port));
if ((termios->c_cflag & CREAD) != 0)
- sci_start_rx(port,0);
-
- spin_unlock_irqrestore(&port->lock, flags);
+ sci_start_rx(port, 0);
}
static const char *sci_type(struct uart_port *port)
{
switch (port->type) {
- case PORT_SCI: return "sci";
- case PORT_SCIF: return "scif";
- case PORT_IRDA: return "irda";
+ case PORT_IRDA:
+ return "irda";
+ case PORT_SCI:
+ return "sci";
+ case PORT_SCIF:
+ return "scif";
+ case PORT_SCIFA:
+ return "scifa";
}
- return 0;
+ return NULL;
}
static void sci_release_port(struct uart_port *port)
static void sci_config_port(struct uart_port *port, int flags)
{
- struct sci_port *s = &sci_ports[port->line];
+ struct sci_port *s = to_sci_port(port);
port->type = s->type;
-#if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
- if (port->mapbase == 0)
- port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
+ if (port->membase)
+ return;
- port->membase = (void *)port->mapbase;
-#endif
+ if (port->flags & UPF_IOREMAP) {
+ port->membase = ioremap_nocache(port->mapbase, 0x40);
+
+ if (IS_ERR(port->membase))
+ dev_err(port->dev, "can't remap port#%d\n", port->line);
+ } else {
+ /*
+ * For the simple (and majority of) cases where we don't
+ * need to do any remapping, just cast the cookie
+ * directly.
+ */
+ port->membase = (void __iomem *)port->mapbase;
+ }
}
static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
{
- struct sci_port *s = &sci_ports[port->line];
+ struct sci_port *s = to_sci_port(port);
- if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > NR_IRQS)
+ if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs)
return -EINVAL;
if (ser->baud_base < 2400)
/* No paper tape reader for Mitch.. */
.request_port = sci_request_port,
.config_port = sci_config_port,
.verify_port = sci_verify_port,
+#ifdef CONFIG_CONSOLE_POLL
+ .poll_get_char = sci_poll_get_char,
+ .poll_put_char = sci_poll_put_char,
+#endif
};
-static struct sci_port sci_ports[] = {
-#if defined(CONFIG_CPU_SUBTYPE_SH7708)
- {
- .port = {
- .membase = (void *)0xfffffe80,
- .mapbase = 0xfffffe80,
- .iotype = UPIO_MEM,
- .irq = 25,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 0,
- },
- .type = PORT_SCI,
- .irqs = SCI_IRQS,
- },
-#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
- {
- .port = {
- .membase = (void *)SCIF0,
- .mapbase = SCIF0,
- .iotype = UPIO_MEM,
- .irq = 55,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 0,
- },
- .type = PORT_SCIF,
- .irqs = SH3_IRDA_IRQS,
- .init_pins = sci_init_pins_scif,
- },
- {
- .port = {
- .membase = (void *)SCIF2,
- .mapbase = SCIF2,
- .iotype = UPIO_MEM,
- .irq = 59,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 1,
- },
- .type = PORT_SCIF,
- .irqs = SH3_SCIF_IRQS,
- .init_pins = sci_init_pins_scif,
+static void __devinit sci_init_single(struct platform_device *dev,
+ struct sci_port *sci_port,
+ unsigned int index,
+ struct plat_sci_port *p)
+{
+ sci_port->port.ops = &sci_uart_ops;
+ sci_port->port.iotype = UPIO_MEM;
+ sci_port->port.line = index;
+
+ switch (p->type) {
+ case PORT_SCIFA:
+ sci_port->port.fifosize = 64;
+ break;
+ case PORT_SCIF:
+ sci_port->port.fifosize = 16;
+ break;
+ default:
+ sci_port->port.fifosize = 1;
+ break;
}
-#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
- {
- .port = {
- .membase = (void *)0xfffffe80,
- .mapbase = 0xfffffe80,
- .iotype = UPIO_MEM,
- .irq = 25,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 0,
- },
- .type = PORT_SCI,
- .irqs = SCI_IRQS,
- },
- {
- .port = {
- .membase = (void *)0xa4000150,
- .mapbase = 0xa4000150,
- .iotype = UPIO_MEM,
- .irq = 59,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 1,
- },
- .type = PORT_SCIF,
- .irqs = SH3_SCIF_IRQS,
- .init_pins = sci_init_pins_scif,
- },
- {
- .port = {
- .membase = (void *)0xa4000140,
- .mapbase = 0xa4000140,
- .iotype = UPIO_MEM,
- .irq = 55,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 2,
- },
- .type = PORT_IRDA,
- .irqs = SH3_IRDA_IRQS,
- .init_pins = sci_init_pins_irda,
+
+ if (dev) {
+ sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL;
+ sci_port->dclk = clk_get(&dev->dev, "peripheral_clk");
+ sci_port->enable = sci_clk_enable;
+ sci_port->disable = sci_clk_disable;
+ sci_port->port.dev = &dev->dev;
}
-#elif defined(CONFIG_CPU_SUBTYPE_SH7300)
- {
- .port = {
- .membase = (void *)0xA4430000,
- .mapbase = 0xA4430000,
- .iotype = UPIO_MEM,
- .irq = 25,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 0,
- },
- .type = PORT_SCIF,
- .irqs = SH7300_SCIF0_IRQS,
- .init_pins = sci_init_pins_scif,
- },
-#elif defined(CONFIG_CPU_SUBTYPE_SH73180)
- {
- .port = {
- .membase = (void *)0xffe00000,
- .mapbase = 0xffe00000,
- .iotype = UPIO_MEM,
- .irq = 25,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 0,
- },
- .type = PORT_SCIF,
- .irqs = SH73180_SCIF_IRQS,
- .init_pins = sci_init_pins_scif,
- },
-#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
- {
- .port = {
- .membase = (void *)0xffe80000,
- .mapbase = 0xffe80000,
- .iotype = UPIO_MEM,
- .irq = 43,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 0,
- },
- .type = PORT_SCIF,
- .irqs = SH4_SCIF_IRQS,
- .init_pins = sci_init_pins_scif,
- },
-#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751)
- {
- .port = {
- .membase = (void *)0xffe00000,
- .mapbase = 0xffe00000,
- .iotype = UPIO_MEM,
- .irq = 25,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 0,
- },
- .type = PORT_SCI,
- .irqs = SCI_IRQS,
- },
- {
- .port = {
- .membase = (void *)0xffe80000,
- .mapbase = 0xffe80000,
- .iotype = UPIO_MEM,
- .irq = 43,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 1,
- },
- .type = PORT_SCIF,
- .irqs = SH4_SCIF_IRQS,
- .init_pins = sci_init_pins_scif,
- },
-#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
- {
- .port = {
- .membase = (void *)0xfe600000,
- .mapbase = 0xfe600000,
- .iotype = UPIO_MEM,
- .irq = 55,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 0,
- },
- .type = PORT_SCIF,
- .irqs = SH7760_SCIF0_IRQS,
- .init_pins = sci_init_pins_scif,
- },
- {
- .port = {
- .membase = (void *)0xfe610000,
- .mapbase = 0xfe610000,
- .iotype = UPIO_MEM,
- .irq = 75,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 1,
- },
- .type = PORT_SCIF,
- .irqs = SH7760_SCIF1_IRQS,
- .init_pins = sci_init_pins_scif,
- },
- {
- .port = {
- .membase = (void *)0xfe620000,
- .mapbase = 0xfe620000,
- .iotype = UPIO_MEM,
- .irq = 79,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 2,
- },
- .type = PORT_SCIF,
- .irqs = SH7760_SCIF2_IRQS,
- .init_pins = sci_init_pins_scif,
- },
-#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
- {
- .port = {
- .membase = (void *)0xffe00000,
- .mapbase = 0xffe00000,
- .iotype = UPIO_MEM,
- .irq = 26,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 0,
- },
- .type = PORT_SCIF,
- .irqs = STB1_SCIF1_IRQS,
- .init_pins = sci_init_pins_scif,
- },
- {
- .port = {
- .membase = (void *)0xffe80000,
- .mapbase = 0xffe80000,
- .iotype = UPIO_MEM,
- .irq = 43,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 1,
- },
- .type = PORT_SCIF,
- .irqs = SH4_SCIF_IRQS,
- .init_pins = sci_init_pins_scif,
- },
-#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
- {
- .port = {
- .iotype = UPIO_MEM,
- .irq = 42,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 0,
- },
- .type = PORT_SCIF,
- .irqs = SH5_SCIF_IRQS,
- .init_pins = sci_init_pins_scif,
- },
-#elif defined(CONFIG_H83007) || defined(CONFIG_H83068)
- {
- .port = {
- .membase = (void *)0x00ffffb0,
- .mapbase = 0x00ffffb0,
- .iotype = UPIO_MEM,
- .irq = 54,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 0,
- },
- .type = PORT_SCI,
- .irqs = H8300H_SCI_IRQS0,
- .init_pins = sci_init_pins_sci,
- },
- {
- .port = {
- .membase = (void *)0x00ffffb8,
- .mapbase = 0x00ffffb8,
- .iotype = UPIO_MEM,
- .irq = 58,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 1,
- },
- .type = PORT_SCI,
- .irqs = H8300H_SCI_IRQS1,
- .init_pins = sci_init_pins_sci,
- },
- {
- .port = {
- .membase = (void *)0x00ffffc0,
- .mapbase = 0x00ffffc0,
- .iotype = UPIO_MEM,
- .irq = 62,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 2,
- },
- .type = PORT_SCI,
- .irqs = H8300H_SCI_IRQS2,
- .init_pins = sci_init_pins_sci,
- },
-#elif defined(CONFIG_H8S2678)
- {
- .port = {
- .membase = (void *)0x00ffff78,
- .mapbase = 0x00ffff78,
- .iotype = UPIO_MEM,
- .irq = 90,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 0,
- },
- .type = PORT_SCI,
- .irqs = H8S_SCI_IRQS0,
- .init_pins = sci_init_pins_sci,
- },
- {
- .port = {
- .membase = (void *)0x00ffff80,
- .mapbase = 0x00ffff80,
- .iotype = UPIO_MEM,
- .irq = 94,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 1,
- },
- .type = PORT_SCI,
- .irqs = H8S_SCI_IRQS1,
- .init_pins = sci_init_pins_sci,
- },
- {
- .port = {
- .membase = (void *)0x00ffff88,
- .mapbase = 0x00ffff88,
- .iotype = UPIO_MEM,
- .irq = 98,
- .ops = &sci_uart_ops,
- .flags = UPF_BOOT_AUTOCONF,
- .line = 2,
- },
- .type = PORT_SCI,
- .irqs = H8S_SCI_IRQS2,
- .init_pins = sci_init_pins_sci,
- },
-#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
- {
- .port = {
- .membase = (void *)0xff923000,
- .mapbase = 0xff923000,
- .iotype = SERIAL_IO_MEM,
- .irq = 61,
- .ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
- .line = 0,
- },
- .type = PORT_SCIF,
- .irqs = SH7770_SCIF0_IRQS,
- .init_pins = sci_init_pins_scif,
- },
- {
- .port = {
- .membase = (void *)0xff924000,
- .mapbase = 0xff924000,
- .iotype = SERIAL_IO_MEM,
- .irq = 62,
- .ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
- .line = 1,
- },
- .type = PORT_SCIF,
- .irqs = SH7770_SCIF1_IRQS,
- .init_pins = sci_init_pins_scif,
- },
- {
- .port = {
- .membase = (void *)0xff925000,
- .mapbase = 0xff925000,
- .iotype = SERIAL_IO_MEM,
- .irq = 63,
- .ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
- .line = 2,
- },
- .type = PORT_SCIF,
- .irqs = SH7770_SCIF2_IRQS,
- .init_pins = sci_init_pins_scif,
- },
-#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
- {
- .port = {
- .membase = (void *)0xffe00000,
- .mapbase = 0xffe00000,
- .iotype = SERIAL_IO_MEM,
- .irq = 43,
- .ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
- .line = 0,
- },
- .type = PORT_SCIF,
- .irqs = SH7780_SCIF0_IRQS,
- .init_pins = sci_init_pins_scif,
- },
- {
- .port = {
- .membase = (void *)0xffe10000,
- .mapbase = 0xffe10000,
- .iotype = SERIAL_IO_MEM,
- .irq = 79,
- .ops = &sci_uart_ops,
- .flags = ASYNC_BOOT_AUTOCONF,
- .line = 1,
- },
- .type = PORT_SCIF,
- .irqs = SH7780_SCIF1_IRQS,
- .init_pins = sci_init_pins_scif,
- },
-#else
-#error "CPU subtype not defined"
-#endif
-};
+
+ sci_port->break_timer.data = (unsigned long)sci_port;
+ sci_port->break_timer.function = sci_break_timer;
+ init_timer(&sci_port->break_timer);
+
+ sci_port->port.mapbase = p->mapbase;
+ sci_port->port.membase = p->membase;
+
+ sci_port->port.irq = p->irqs[SCIx_TXI_IRQ];
+ sci_port->port.flags = p->flags;
+ sci_port->type = sci_port->port.type = p->type;
+
+ memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs));
+}
#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
+static struct tty_driver *serial_console_device(struct console *co, int *index)
+{
+ struct uart_driver *p = &sci_uart_driver;
+ *index = co->index;
+ return p->tty_driver;
+}
+
+static void serial_console_putchar(struct uart_port *port, int ch)
+{
+ sci_poll_put_char(port, ch);
+}
+
/*
* Print a string to the serial port trying not to disturb
* any possible real use of the port...
static void serial_console_write(struct console *co, const char *s,
unsigned count)
{
- put_string(serial_console_port, s, count);
+ struct uart_port *port = co->data;
+ struct sci_port *sci_port = to_sci_port(port);
+ unsigned short bits;
+
+ if (sci_port->enable)
+ sci_port->enable(port);
+
+ uart_console_write(port, s, count, serial_console_putchar);
+
+ /* wait until fifo is empty and last bit has been transmitted */
+ bits = SCxSR_TDxE(port) | SCxSR_TEND(port);
+ while ((sci_in(port, SCxSR) & bits) != bits)
+ cpu_relax();
+
+ if (sci_port->disable)
+ sci_port->disable(port);
}
-static int __init serial_console_setup(struct console *co, char *options)
+static int __devinit serial_console_setup(struct console *co, char *options)
{
+ struct sci_port *sci_port;
struct uart_port *port;
int baud = 115200;
int bits = 8;
int flow = 'n';
int ret;
- serial_console_port = &sci_ports[co->index];
- port = &serial_console_port->port;
- port->type = serial_console_port->type;
+ /*
+ * Check whether an invalid uart number has been specified, and
+ * if so, search for the first available port that does have
+ * console support.
+ */
+ if (co->index >= SCI_NPORTS)
+ co->index = 0;
-#ifdef CONFIG_SUPERH64
- /* This is especially needed on sh64 to remap the SCIF */
- sci_config_port(port, 0);
-#endif
+ if (co->data) {
+ port = co->data;
+ sci_port = to_sci_port(port);
+ } else {
+ sci_port = &sci_ports[co->index];
+ port = &sci_port->port;
+ co->data = port;
+ }
/*
- * We need to set the initial uartclk here, since otherwise it will
- * only ever be setup at sci_init() time.
+ * Also need to check port->type, we don't actually have any
+ * UPIO_PORT ports, but uart_report_port() handily misreports
+ * it anyways if we don't have a port available by the time this is
+ * called.
*/
-#if defined(__H8300H__) || defined(__H8300S__)
- port->uartclk = CONFIG_CPU_CLOCK;
+ if (!port->type)
+ return -ENODEV;
+
+ sci_config_port(port, 0);
+
+ if (sci_port->enable)
+ sci_port->enable(port);
-#if defined(__H8300S__)
- h8300_sci_enable(port, sci_enable);
-#endif
-#elif defined(CONFIG_SUPERH64)
- port->uartclk = current_cpu_info.module_clock * 16;
-#else
- {
- struct clk *clk = clk_get("module_clk");
- port->uartclk = clk_get_rate(clk) * 16;
- clk_put(clk);
- }
-#endif
if (options)
uart_parse_options(options, &baud, &parity, &bits, &flow);
if (ret == 0)
sci_stop_rx(port);
#endif
+ /* TODO: disable clock */
return ret;
}
static struct console serial_console = {
.name = "ttySC",
- .device = uart_console_device,
+ .device = serial_console_device,
.write = serial_console_write,
.setup = serial_console_setup,
.flags = CON_PRINTBUFFER,
.index = -1,
- .data = &sci_uart_driver,
};
static int __init sci_console_init(void)
register_console(&serial_console);
return 0;
}
-
console_initcall(sci_console_init);
-#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
-#ifdef CONFIG_SH_KGDB
-/*
- * FIXME: Most of this can go away.. at the moment, we rely on
- * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
- * most of that can easily be done here instead.
- *
- * For the time being, just accept the values that were parsed earlier..
- */
-static void __init kgdb_console_get_options(struct uart_port *port, int *baud,
- int *parity, int *bits)
-{
- *baud = kgdb_baud;
- *parity = tolower(kgdb_parity);
- *bits = kgdb_bits - '0';
-}
-
-/*
- * The naming here is somewhat misleading, since kgdb_console_setup() takes
- * care of the early-on initialization for kgdb, regardless of whether we
- * actually use kgdb as a console or not.
- *
- * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
- */
-int __init kgdb_console_setup(struct console *co, char *options)
-{
- struct uart_port *port = &sci_ports[kgdb_portnum].port;
- int baud = 38400;
- int bits = 8;
- int parity = 'n';
- int flow = 'n';
-
- if (co->index != kgdb_portnum)
- co->index = kgdb_portnum;
-
- if (options)
- uart_parse_options(options, &baud, &parity, &bits, &flow);
- else
- kgdb_console_get_options(port, &baud, &parity, &bits);
-
- kgdb_getchar = kgdb_sci_getchar;
- kgdb_putchar = kgdb_sci_putchar;
-
- return uart_set_options(port, co, baud, parity, bits, flow);
-}
-#endif /* CONFIG_SH_KGDB */
-
-#ifdef CONFIG_SH_KGDB_CONSOLE
-static struct console kgdb_console = {
- .name = "ttySC",
- .write = kgdb_console_write,
- .setup = kgdb_console_setup,
- .flags = CON_PRINTBUFFER | CON_ENABLED,
- .index = -1,
- .data = &sci_uart_driver,
+static struct sci_port early_serial_port;
+static struct console early_serial_console = {
+ .name = "early_ttySC",
+ .write = serial_console_write,
+ .flags = CON_PRINTBUFFER,
};
+static char early_serial_buf[32];
-/* Register the KGDB console so we get messages (d'oh!) */
-static int __init kgdb_console_init(void)
-{
- register_console(&kgdb_console);
- return 0;
-}
-
-console_initcall(kgdb_console_init);
-#endif /* CONFIG_SH_KGDB_CONSOLE */
+#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
-#if defined(CONFIG_SH_KGDB_CONSOLE)
-#define SCI_CONSOLE &kgdb_console
-#elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
-#define SCI_CONSOLE &serial_console
+#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
+#define SCI_CONSOLE (&serial_console)
#else
#define SCI_CONSOLE 0
#endif
static struct uart_driver sci_uart_driver = {
.owner = THIS_MODULE,
.driver_name = "sci",
-#ifdef CONFIG_DEVFS_FS
- .devfs_name = "ttsc/",
-#endif
.dev_name = "ttySC",
.major = SCI_MAJOR,
.minor = SCI_MINOR_START,
+ .nr = SCI_NPORTS,
.cons = SCI_CONSOLE,
};
-static int __init sci_init(void)
+
+static int sci_remove(struct platform_device *dev)
{
- int chan, ret;
+ struct sh_sci_priv *priv = platform_get_drvdata(dev);
+ struct sci_port *p;
+ unsigned long flags;
- printk("%s", banner);
+ cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
- sci_uart_driver.nr = ARRAY_SIZE(sci_ports);
+ spin_lock_irqsave(&priv->lock, flags);
+ list_for_each_entry(p, &priv->ports, node)
+ uart_remove_one_port(&sci_uart_driver, &p->port);
+ spin_unlock_irqrestore(&priv->lock, flags);
- ret = uart_register_driver(&sci_uart_driver);
- if (ret == 0) {
- for (chan = 0; chan < SCI_NPORTS; chan++) {
- struct sci_port *sciport = &sci_ports[chan];
+ kfree(priv);
+ return 0;
+}
-#if defined(__H8300H__) || defined(__H8300S__)
- sciport->port.uartclk = CONFIG_CPU_CLOCK;
-#elif defined(CONFIG_SUPERH64)
- sciport->port.uartclk = current_cpu_info.module_clock * 16;
-#else
- struct clk *clk = clk_get("module_clk");
- sciport->port.uartclk = clk_get_rate(clk) * 16;
- clk_put(clk);
-#endif
- uart_add_one_port(&sci_uart_driver, &sciport->port);
- sciport->break_timer.data = (unsigned long)sciport;
- sciport->break_timer.function = sci_break_timer;
- init_timer(&sciport->break_timer);
- }
+static int __devinit sci_probe_single(struct platform_device *dev,
+ unsigned int index,
+ struct plat_sci_port *p,
+ struct sci_port *sciport)
+{
+ struct sh_sci_priv *priv = platform_get_drvdata(dev);
+ unsigned long flags;
+ int ret;
+
+ /* Sanity check */
+ if (unlikely(index >= SCI_NPORTS)) {
+ dev_notice(&dev->dev, "Attempting to register port "
+ "%d when only %d are available.\n",
+ index+1, SCI_NPORTS);
+ dev_notice(&dev->dev, "Consider bumping "
+ "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
+ return 0;
}
-#ifdef CONFIG_CPU_FREQ
- cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
- printk("sci: CPU frequency notifier registered\n");
+ sci_init_single(dev, sciport, index, p);
+
+ ret = uart_add_one_port(&sci_uart_driver, &sciport->port);
+ if (ret)
+ return ret;
+
+ INIT_LIST_HEAD(&sciport->node);
+
+ spin_lock_irqsave(&priv->lock, flags);
+ list_add(&sciport->node, &priv->ports);
+ spin_unlock_irqrestore(&priv->lock, flags);
+
+ return 0;
+}
+
+/*
+ * Register a set of serial devices attached to a platform device. The
+ * list is terminated with a zero flags entry, which means we expect
+ * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
+ * remapping (such as sh64) should also set UPF_IOREMAP.
+ */
+static int __devinit sci_probe(struct platform_device *dev)
+{
+ struct plat_sci_port *p = dev->dev.platform_data;
+ struct sh_sci_priv *priv;
+ int i, ret = -EINVAL;
+
+#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
+ if (is_early_platform_device(dev)) {
+ if (dev->id == -1)
+ return -ENOTSUPP;
+ early_serial_console.index = dev->id;
+ early_serial_console.data = &early_serial_port.port;
+ sci_init_single(NULL, &early_serial_port, dev->id, p);
+ serial_console_setup(&early_serial_console, early_serial_buf);
+ if (!strstr(early_serial_buf, "keep"))
+ early_serial_console.flags |= CON_BOOT;
+ register_console(&early_serial_console);
+ return 0;
+ }
#endif
+ priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ INIT_LIST_HEAD(&priv->ports);
+ spin_lock_init(&priv->lock);
+ platform_set_drvdata(dev, priv);
+
+ priv->clk_nb.notifier_call = sci_notifier;
+ cpufreq_register_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
+
+ if (dev->id != -1) {
+ ret = sci_probe_single(dev, dev->id, p, &sci_ports[dev->id]);
+ if (ret)
+ goto err_unreg;
+ } else {
+ for (i = 0; p && p->flags != 0; p++, i++) {
+ ret = sci_probe_single(dev, i, p, &sci_ports[i]);
+ if (ret)
+ goto err_unreg;
+ }
+ }
+
#ifdef CONFIG_SH_STANDARD_BIOS
sh_bios_gdb_detach();
#endif
+ return 0;
+
+err_unreg:
+ sci_remove(dev);
return ret;
}
-static void __exit sci_exit(void)
+static int sci_suspend(struct device *dev)
+{
+ struct sh_sci_priv *priv = dev_get_drvdata(dev);
+ struct sci_port *p;
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->lock, flags);
+ list_for_each_entry(p, &priv->ports, node)
+ uart_suspend_port(&sci_uart_driver, &p->port);
+ spin_unlock_irqrestore(&priv->lock, flags);
+
+ return 0;
+}
+
+static int sci_resume(struct device *dev)
+{
+ struct sh_sci_priv *priv = dev_get_drvdata(dev);
+ struct sci_port *p;
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->lock, flags);
+ list_for_each_entry(p, &priv->ports, node)
+ uart_resume_port(&sci_uart_driver, &p->port);
+ spin_unlock_irqrestore(&priv->lock, flags);
+
+ return 0;
+}
+
+static const struct dev_pm_ops sci_dev_pm_ops = {
+ .suspend = sci_suspend,
+ .resume = sci_resume,
+};
+
+static struct platform_driver sci_driver = {
+ .probe = sci_probe,
+ .remove = sci_remove,
+ .driver = {
+ .name = "sh-sci",
+ .owner = THIS_MODULE,
+ .pm = &sci_dev_pm_ops,
+ },
+};
+
+static int __init sci_init(void)
{
- int chan;
+ int ret;
- for (chan = 0; chan < SCI_NPORTS; chan++)
- uart_remove_one_port(&sci_uart_driver, &sci_ports[chan].port);
+ printk(banner);
+ ret = uart_register_driver(&sci_uart_driver);
+ if (likely(ret == 0)) {
+ ret = platform_driver_register(&sci_driver);
+ if (unlikely(ret))
+ uart_unregister_driver(&sci_uart_driver);
+ }
+
+ return ret;
+}
+
+static void __exit sci_exit(void)
+{
+ platform_driver_unregister(&sci_driver);
uart_unregister_driver(&sci_uart_driver);
}
+#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
+early_platform_init_buffer("earlyprintk", &sci_driver,
+ early_serial_buf, ARRAY_SIZE(early_serial_buf));
+#endif
module_init(sci_init);
module_exit(sci_exit);
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:sh-sci");
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff