/*
- * linux/drivers/char/at91_serial.c
+ * linux/drivers/char/atmel_serial.c
*
* Driver for Atmel AT91 / AT32 Serial ports
* Copyright (C) 2003 Rick Bronson
#include <linux/sysrq.h>
#include <linux/tty_flip.h>
#include <linux/platform_device.h>
+#include <linux/atmel_pdc.h>
+#include <linux/atmel_serial.h>
#include <asm/io.h>
-#include <asm/arch/at91rm9200_pdc.h>
#include <asm/mach/serial_at91.h>
#include <asm/arch/board.h>
-#include <asm/arch/system.h>
-#include <asm/arch/gpio.h>
-#include "atmel_serial.h"
+#ifdef CONFIG_ARM
+#include <asm/arch/cpu.h>
+#include <asm/arch/gpio.h>
+#endif
#if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
#define ATMEL_ISR_PASS_LIMIT 256
-#define UART_PUT_CR(port,v) writel(v, (port)->membase + ATMEL_US_CR)
-#define UART_GET_MR(port) readl((port)->membase + ATMEL_US_MR)
-#define UART_PUT_MR(port,v) writel(v, (port)->membase + ATMEL_US_MR)
-#define UART_PUT_IER(port,v) writel(v, (port)->membase + ATMEL_US_IER)
-#define UART_PUT_IDR(port,v) writel(v, (port)->membase + ATMEL_US_IDR)
-#define UART_GET_IMR(port) readl((port)->membase + ATMEL_US_IMR)
-#define UART_GET_CSR(port) readl((port)->membase + ATMEL_US_CSR)
-#define UART_GET_CHAR(port) readl((port)->membase + ATMEL_US_RHR)
-#define UART_PUT_CHAR(port,v) writel(v, (port)->membase + ATMEL_US_THR)
-#define UART_GET_BRGR(port) readl((port)->membase + ATMEL_US_BRGR)
-#define UART_PUT_BRGR(port,v) writel(v, (port)->membase + ATMEL_US_BRGR)
-#define UART_PUT_RTOR(port,v) writel(v, (port)->membase + ATMEL_US_RTOR)
-
-// #define UART_GET_CR(port) readl((port)->membase + ATMEL_US_CR) // is write-only
+#define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
+#define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
+#define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
+#define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
+#define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
+#define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
+#define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
+#define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
+#define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
+#define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
+#define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
+#define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
+
+// #define UART_GET_CR(port) __raw_readl((port)->membase + ATMEL_US_CR) // is write-only
/* PDC registers */
-#define UART_PUT_PTCR(port,v) writel(v, (port)->membase + ATMEL_PDC_PTCR)
-#define UART_GET_PTSR(port) readl((port)->membase + ATMEL_PDC_PTSR)
+#define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
+#define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
-#define UART_PUT_RPR(port,v) writel(v, (port)->membase + ATMEL_PDC_RPR)
-#define UART_GET_RPR(port) readl((port)->membase + ATMEL_PDC_RPR)
-#define UART_PUT_RCR(port,v) writel(v, (port)->membase + ATMEL_PDC_RCR)
-#define UART_PUT_RNPR(port,v) writel(v, (port)->membase + ATMEL_PDC_RNPR)
-#define UART_PUT_RNCR(port,v) writel(v, (port)->membase + ATMEL_PDC_RNCR)
+#define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
+#define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
+#define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
+#define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
+#define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
-#define UART_PUT_TPR(port,v) writel(v, (port)->membase + ATMEL_PDC_TPR)
-#define UART_PUT_TCR(port,v) writel(v, (port)->membase + ATMEL_PDC_TCR)
-//#define UART_PUT_TNPR(port,v) writel(v, (port)->membase + ATMEL_PDC_TNPR)
-//#define UART_PUT_TNCR(port,v) writel(v, (port)->membase + ATMEL_PDC_TNCR)
+#define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
+#define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
+//#define UART_PUT_TNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNPR)
+//#define UART_PUT_TNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNCR)
static int (*atmel_open_hook)(struct uart_port *);
static void (*atmel_close_hook)(struct uart_port *);
struct uart_port uart; /* uart */
struct clk *clk; /* uart clock */
unsigned short suspended; /* is port suspended? */
+ int break_active; /* break being received */
};
static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
unsigned int control = 0;
unsigned int mode;
- if (arch_identify() == ARCH_ID_AT91RM9200) {
+#ifdef CONFIG_ARCH_AT91RM9200
+ if (cpu_is_at91rm9200()) {
/*
* AT91RM9200 Errata #39: RTS0 is not internally connected to PA21.
* We need to drive the pin manually.
at91_set_gpio_value(AT91_PIN_PA21, 1);
}
}
+#endif
if (mctrl & TIOCM_RTS)
control |= ATMEL_US_RTSEN;
*/
static void atmel_stop_tx(struct uart_port *port)
{
- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-
UART_PUT_IDR(port, ATMEL_US_TXRDY);
}
*/
static void atmel_start_tx(struct uart_port *port)
{
- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-
UART_PUT_IER(port, ATMEL_US_TXRDY);
}
*/
static void atmel_stop_rx(struct uart_port *port)
{
- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-
UART_PUT_IDR(port, ATMEL_US_RXRDY);
}
/*
* Characters received (called from interrupt handler)
*/
-static void atmel_rx_chars(struct uart_port *port, struct pt_regs *regs)
+static void atmel_rx_chars(struct uart_port *port)
{
+ struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
struct tty_struct *tty = port->info->tty;
unsigned int status, ch, flg;
* note that the error handling code is
* out of the main execution path
*/
- if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
+ if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
+ | ATMEL_US_OVRE | ATMEL_US_RXBRK)
+ || atmel_port->break_active)) {
UART_PUT_CR(port, ATMEL_US_RSTSTA); /* clear error */
- if (status & ATMEL_US_RXBRK) {
+ if (status & ATMEL_US_RXBRK
+ && !atmel_port->break_active) {
status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); /* ignore side-effect */
port->icount.brk++;
+ atmel_port->break_active = 1;
+ UART_PUT_IER(port, ATMEL_US_RXBRK);
if (uart_handle_break(port))
goto ignore_char;
+ } else {
+ /*
+ * This is either the end-of-break
+ * condition or we've received at
+ * least one character without RXBRK
+ * being set. In both cases, the next
+ * RXBRK will indicate start-of-break.
+ */
+ UART_PUT_IDR(port, ATMEL_US_RXBRK);
+ status &= ~ATMEL_US_RXBRK;
+ atmel_port->break_active = 0;
}
if (status & ATMEL_US_PARE)
port->icount.parity++;
flg = TTY_FRAME;
}
- if (uart_handle_sysrq_char(port, ch, regs))
+ if (uart_handle_sysrq_char(port, ch))
goto ignore_char;
uart_insert_char(port, status, ATMEL_US_OVRE, ch, flg);
/*
* Interrupt handler
*/
-static irqreturn_t atmel_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t atmel_interrupt(int irq, void *dev_id)
{
struct uart_port *port = dev_id;
struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
while (pending) {
/* Interrupt receive */
if (pending & ATMEL_US_RXRDY)
- atmel_rx_chars(port, regs);
+ atmel_rx_chars(port);
+ else if (pending & ATMEL_US_RXBRK) {
+ /*
+ * End of break detected. If it came along
+ * with a character, atmel_rx_chars will
+ * handle it.
+ */
+ UART_PUT_CR(port, ATMEL_US_RSTSTA);
+ UART_PUT_IDR(port, ATMEL_US_RXBRK);
+ atmel_port->break_active = 0;
+ }
// TODO: All reads to CSR will clear these interrupts!
if (pending & ATMEL_US_RIIC) port->icount.rng++;
*/
static int atmel_startup(struct uart_port *port)
{
- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
int retval;
/*
*/
static void atmel_shutdown(struct uart_port *port)
{
- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-
/*
* Disable all interrupts, port and break condition.
*/
/*
* Change the port parameters
*/
-static void atmel_set_termios(struct uart_port *port, struct termios * termios, struct termios * old)
+static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old)
{
unsigned long flags;
unsigned int mode, imr, quot, baud;
+ /* Get current mode register */
+ mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
+
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
quot = uart_get_divisor(port, baud);
- /* Get current mode register */
- mode = UART_GET_MR(port) & ~(ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
+ if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
+ quot /= 8;
+ mode |= ATMEL_US_USCLKS_MCK_DIV8;
+ }
/* byte size */
switch (termios->c_cflag & CSIZE) {
struct atmel_uart_data *data = pdev->dev.platform_data;
port->iotype = UPIO_MEM;
- port->flags = UPF_BOOT_AUTOCONF;
+ port->flags = UPF_BOOT_AUTOCONF;
port->ops = &atmel_pops;
- port->fifosize = 1;
+ port->fifosize = 1;
port->line = pdev->id;
port->dev = &pdev->dev;
port->mapbase = pdev->resource[0].start;
port->irq = pdev->resource[1].start;
- if (port->mapbase == AT91_VA_BASE_SYS + AT91_DBGU) /* Part of system perpherals - already mapped */
- port->membase = (void __iomem *) port->mapbase;
+ if (data->regs)
+ /* Already mapped by setup code */
+ port->membase = data->regs;
else {
port->flags |= UPF_IOREMAP;
port->membase = NULL;
else if (mr == ATMEL_US_PAR_ODD)
*parity = 'o';
+ /*
+ * The serial core only rounds down when matching this to a
+ * supported baud rate. Make sure we don't end up slightly
+ * lower than one of those, as it would make us fall through
+ * to a much lower baud rate than we really want.
+ */
quot = UART_GET_BRGR(port);
- *baud = port->uartclk / (16 * (quot));
+ *baud = port->uartclk / (16 * (quot - 1));
}
static int __init atmel_console_setup(struct console *co, char *options)
if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
enable_irq_wake(port->irq);
else {
- disable_irq_wake(port->irq);
uart_suspend_port(&atmel_uart, port);
atmel_port->suspended = 1;
}
uart_resume_port(&atmel_uart, port);
atmel_port->suspended = 0;
}
+ else
+ disable_irq_wake(port->irq);
return 0;
}