VMware Balloon driver

[safe/jmp/linux-2.6] / drivers / scsi / ips.c

diff --git a/drivers/scsi/ips.c b/drivers/scsi/ips.c
index c450194..f83a116 100644 (file)
--- a/drivers/scsi/ips.c
+++ b/drivers/scsi/ips.c
@@ -165,7 +165,6 @@
 #include <asm/byteorder.h>
 #include <asm/page.h>
 #include <linux/stddef.h>
-#include <linux/version.h>
 #include <linux/string.h>
 #include <linux/errno.h>
 #include <linux/kernel.h>
@@ -1005,8 +1004,7 @@ static int __ips_eh_reset(struct scsi_cmnd *SC)
        DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name, ha->host_num);
 
        while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
-               scb->scsi_cmd->result =
-                   (DID_RESET << 16) | (SUGGEST_RETRY << 24);
+               scb->scsi_cmd->result = DID_RESET << 16;
                scb->scsi_cmd->scsi_done(scb->scsi_cmd);
                ips_freescb(ha, scb);
        }
@@ -2377,7 +2375,7 @@ ips_get_bios_version(ips_ha_t * ha, int intr)
                        if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
                                return;
 
-                       outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP);
+                       outl(1, ha->io_addr + IPS_REG_FLAP);
                        if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
                                udelay(25);     /* 25 us */
 
@@ -2385,21 +2383,21 @@ ips_get_bios_version(ips_ha_t * ha, int intr)
                                return;
 
                        /* Get Major version */
-                       outl(cpu_to_le32(0x1FF), ha->io_addr + IPS_REG_FLAP);
+                       outl(0x1FF, ha->io_addr + IPS_REG_FLAP);
                        if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
                                udelay(25);     /* 25 us */
 
                        major = inb(ha->io_addr + IPS_REG_FLDP);
 
                        /* Get Minor version */
-                       outl(cpu_to_le32(0x1FE), ha->io_addr + IPS_REG_FLAP);
+                       outl(0x1FE, ha->io_addr + IPS_REG_FLAP);
                        if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
                                udelay(25);     /* 25 us */
 
                        minor = inb(ha->io_addr + IPS_REG_FLDP);
 
                        /* Get SubMinor version */
-                       outl(cpu_to_le32(0x1FD), ha->io_addr + IPS_REG_FLAP);
+                       outl(0x1FD, ha->io_addr + IPS_REG_FLAP);
                        if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
                                udelay(25);     /* 25 us */
 
@@ -3819,7 +3817,7 @@ ips_send_cmd(ips_ha_t * ha, ips_scb_t * scb)
                scb->cmd.dcdb.segment_4G = 0;
                scb->cmd.dcdb.enhanced_sg = 0;
 
-               TimeOut = scb->scsi_cmd->timeout_per_command;
+               TimeOut = scb->scsi_cmd->request->timeout;
 
                if (ha->subsys->param[4] & 0x00100000) {        /* If NEW Tape DCDB is Supported */
                        if (!scb->sg_len) {
@@ -4852,7 +4850,7 @@ ips_init_copperhead(ips_ha_t * ha)
                return (0);
 
        /* setup CCCR */
-       outl(cpu_to_le32(0x1010), ha->io_addr + IPS_REG_CCCR);
+       outl(0x1010, ha->io_addr + IPS_REG_CCCR);
 
        /* Enable busmastering */
        outb(IPS_BIT_EBM, ha->io_addr + IPS_REG_SCPR);
@@ -5234,12 +5232,12 @@ ips_statinit(ips_ha_t * ha)
        ha->adapt->p_status_tail = ha->adapt->status;
 
        phys_status_start = ha->adapt->hw_status_start;
-       outl(cpu_to_le32(phys_status_start), ha->io_addr + IPS_REG_SQSR);
-       outl(cpu_to_le32(phys_status_start + IPS_STATUS_Q_SIZE),
+       outl(phys_status_start, ha->io_addr + IPS_REG_SQSR);
+       outl(phys_status_start + IPS_STATUS_Q_SIZE,
             ha->io_addr + IPS_REG_SQER);
-       outl(cpu_to_le32(phys_status_start + IPS_STATUS_SIZE),
+       outl(phys_status_start + IPS_STATUS_SIZE,
             ha->io_addr + IPS_REG_SQHR);
-       outl(cpu_to_le32(phys_status_start), ha->io_addr + IPS_REG_SQTR);
+       outl(phys_status_start, ha->io_addr + IPS_REG_SQTR);
 
        ha->adapt->hw_status_tail = phys_status_start;
 }
@@ -5296,7 +5294,7 @@ ips_statupd_copperhead(ips_ha_t * ha)
                ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
        }
 
-       outl(cpu_to_le32(ha->adapt->hw_status_tail),
+       outl(ha->adapt->hw_status_tail,
             ha->io_addr + IPS_REG_SQTR);
 
        return (ha->adapt->p_status_tail->value);
@@ -5398,8 +5396,8 @@ ips_issue_copperhead(ips_ha_t * ha, ips_scb_t * scb)
                }               /* end if */
        }                       /* end while */
 
-       outl(cpu_to_le32(scb->scb_busaddr), ha->io_addr + IPS_REG_CCSAR);
-       outw(cpu_to_le32(IPS_BIT_START_CMD), ha->io_addr + IPS_REG_CCCR);
+       outl(scb->scb_busaddr, ha->io_addr + IPS_REG_CCSAR);
+       outw(IPS_BIT_START_CMD, ha->io_addr + IPS_REG_CCCR);
 
        return (IPS_SUCCESS);
 }
@@ -5484,7 +5482,7 @@ ips_issue_i2o(ips_ha_t * ha, ips_scb_t * scb)
                          ips_name, ha->host_num, scb->cmd.basic_io.command_id);
        }
 
-       outl(cpu_to_le32(scb->scb_busaddr), ha->io_addr + IPS_REG_I2O_INMSGQ);
+       outl(scb->scb_busaddr, ha->io_addr + IPS_REG_I2O_INMSGQ);
 
        return (IPS_SUCCESS);
 }
@@ -6376,7 +6374,7 @@ ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
 
        for (i = 0; i < buffersize; i++) {
                /* write a byte */
-               outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP);
+               outl(i + offset, ha->io_addr + IPS_REG_FLAP);
                if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
                        udelay(25);     /* 25 us */
 
@@ -6561,7 +6559,7 @@ ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
        if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
                return (1);
 
-       outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP);
+       outl(1, ha->io_addr + IPS_REG_FLAP);
        if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
                udelay(25);     /* 25 us */
        if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
@@ -6570,7 +6568,7 @@ ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
        checksum = 0xff;
        for (i = 2; i < buffersize; i++) {
 
-               outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP);
+               outl(i + offset, ha->io_addr + IPS_REG_FLAP);
                if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
                        udelay(25);     /* 25 us */
 
@@ -7050,10 +7048,10 @@ ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr)
         * are guaranteed to be < 4G.
         */
        if (IPS_ENABLE_DMA64 && IPS_HAS_ENH_SGLIST(ha) &&
-           !pci_set_dma_mask(ha->pcidev, DMA_64BIT_MASK)) {
+           !pci_set_dma_mask(ha->pcidev, DMA_BIT_MASK(64))) {
                (ha)->flags |= IPS_HA_ENH_SG;
        } else {
-               if (pci_set_dma_mask(ha->pcidev, DMA_32BIT_MASK) != 0) {
+               if (pci_set_dma_mask(ha->pcidev, DMA_BIT_MASK(32)) != 0) {
                        printk(KERN_WARNING "Unable to set DMA Mask\n");
                        return ips_abort_init(ha, index);
                }