PCI: determine CLS more intelligently

[safe/jmp/linux-2.6] / drivers / pci / pci.c

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 8c663d6..1f9a7a0 100644 (file)
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -47,6 +47,19 @@ unsigned long pci_cardbus_mem_size = DEFAULT_CARDBUS_MEM_SIZE;
 unsigned long pci_hotplug_io_size  = DEFAULT_HOTPLUG_IO_SIZE;
 unsigned long pci_hotplug_mem_size = DEFAULT_HOTPLUG_MEM_SIZE;
 
+#ifndef PCI_CACHE_LINE_BYTES
+#define PCI_CACHE_LINE_BYTES L1_CACHE_BYTES
+#endif
+
+/*
+ * The default CLS is used if arch didn't set CLS explicitly and not
+ * all pci devices agree on the same value.  Arch can override either
+ * the dfl or actual value as it sees fit.  Don't forget this is
+ * measured in 32-bit words, not bytes.
+ */
+u8 pci_dfl_cache_line_size __initdata = PCI_CACHE_LINE_BYTES >> 2;
+u8 pci_cache_line_size;
+
 /**
  * pci_bus_max_busnr - returns maximum PCI bus number of given bus' children
  * @bus: pointer to PCI bus structure to search
@@ -513,7 +526,11 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)
        else if (state == PCI_D2 || dev->current_state == PCI_D2)
                udelay(PCI_PM_D2_DELAY);
 
-       dev->current_state = state;
+       pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
+       dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK);
+       if (dev->current_state != state && printk_ratelimit())
+               dev_info(&dev->dev, "Refused to change power state, "
+                       "currently in D%d\n", dev->current_state);
 
        /* According to section 5.4.1 of the "PCI BUS POWER MANAGEMENT
         * INTERFACE SPECIFICATION, REV. 1.2", a device transitioning
@@ -854,6 +871,7 @@ pci_restore_state(struct pci_dev *dev)
 
        if (!dev->state_saved)
                return 0;
+
        /* PCI Express register must be restored first */
        pci_restore_pcie_state(dev);
 
@@ -875,6 +893,8 @@ pci_restore_state(struct pci_dev *dev)
        pci_restore_msi_state(dev);
        pci_restore_iov_state(dev);
 
+       dev->state_saved = false;
+
        return 0;
 }
 
@@ -1220,30 +1240,40 @@ void pci_pme_active(struct pci_dev *dev, bool enable)
  */
 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, bool enable)
 {
-       int error = 0;
-       bool pme_done = false;
+       int ret = 0;
 
        if (enable && !device_may_wakeup(&dev->dev))
                return -EINVAL;
 
+       /* Don't do the same thing twice in a row for one device. */
+       if (!!enable == !!dev->wakeup_prepared)
+               return 0;
+
        /*
         * According to "PCI System Architecture" 4th ed. by Tom Shanley & Don
         * Anderson we should be doing PME# wake enable followed by ACPI wake
         * enable.  To disable wake-up we call the platform first, for symmetry.
         */
 
-       if (!enable && platform_pci_can_wakeup(dev))
-               error = platform_pci_sleep_wake(dev, false);
-
-       if (!enable || pci_pme_capable(dev, state)) {
-               pci_pme_active(dev, enable);
-               pme_done = true;
-       }
+       if (enable) {
+               int error;
 
-       if (enable && platform_pci_can_wakeup(dev))
+               if (pci_pme_capable(dev, state))
+                       pci_pme_active(dev, true);
+               else
+                       ret = 1;
                error = platform_pci_sleep_wake(dev, true);
+               if (ret)
+                       ret = error;
+               if (!ret)
+                       dev->wakeup_prepared = true;
+       } else {
+               platform_pci_sleep_wake(dev, false);
+               pci_pme_active(dev, false);
+               dev->wakeup_prepared = false;
+       }
 
-       return pme_done ? 0 : error;
+       return ret;
 }
 
 /**
@@ -1362,6 +1392,7 @@ void pci_pm_init(struct pci_dev *dev)
        int pm;
        u16 pmc;
 
+       dev->wakeup_prepared = false;
        dev->pm_cap = 0;
 
        /* find PCI PM capability in list */
@@ -1865,14 +1896,6 @@ void pci_clear_mwi(struct pci_dev *dev)
 
 #else
 
-#ifndef PCI_CACHE_LINE_BYTES
-#define PCI_CACHE_LINE_BYTES L1_CACHE_BYTES
-#endif
-
-/* This can be overridden by arch code. */
-/* Don't forget this is measured in 32-bit words, not bytes */
-u8 pci_cache_line_size = PCI_CACHE_LINE_BYTES / 4;
-
 /**
  * pci_set_cacheline_size - ensure the CACHE_LINE_SIZE register is programmed
  * @dev: the PCI device for which MWI is to be enabled
@@ -2528,10 +2551,10 @@ int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type)
 
 /**
  * pci_set_vga_state - set VGA decode state on device and parents if requested
- * @dev the PCI device
- * @decode - true = enable decoding, false = disable decoding
- * @command_bits PCI_COMMAND_IO and/or PCI_COMMAND_MEMORY
- * @change_bridge - traverse ancestors and change bridges
+ * @dev: the PCI device
+ * @decode: true = enable decoding, false = disable decoding
+ * @command_bits: PCI_COMMAND_IO and/or PCI_COMMAND_MEMORY
+ * @change_bridge: traverse ancestors and change bridges
  */
 int pci_set_vga_state(struct pci_dev *dev, bool decode,
                      unsigned int command_bits, bool change_bridge)
@@ -2705,17 +2728,6 @@ int __attribute__ ((weak)) pci_ext_cfg_avail(struct pci_dev *dev)
        return 1;
 }
 
-static int __devinit pci_init(void)
-{
-       struct pci_dev *dev = NULL;
-
-       while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
-               pci_fixup_device(pci_fixup_final, dev);
-       }
-
-       return 0;
-}
-
 static int __init pci_setup(char *str)
 {
        while (str) {
@@ -2753,8 +2765,6 @@ static int __init pci_setup(char *str)
 }
 early_param("pci", pci_setup);
 
-device_initcall(pci_init);
-
 EXPORT_SYMBOL(pci_reenable_device);
 EXPORT_SYMBOL(pci_enable_device_io);
 EXPORT_SYMBOL(pci_enable_device_mem);