PCI: aerdrv: rework do_recovery
[safe/jmp/linux-2.6] / drivers / pci / access.c
index 39bb96b..affb83b 100644 (file)
@@ -2,6 +2,7 @@
 #include <linux/pci.h>
 #include <linux/module.h>
 #include <linux/sched.h>
+#include <linux/slab.h>
 #include <linux/ioport.h>
 #include <linux/wait.h>
 
@@ -12,7 +13,7 @@
  * configuration space.
  */
 
-static DEFINE_SPINLOCK(pci_lock);
+static DEFINE_RAW_SPINLOCK(pci_lock);
 
 /*
  *  Wrappers for all PCI configuration access functions.  They just check
@@ -32,10 +33,10 @@ int pci_bus_read_config_##size \
        unsigned long flags;                                            \
        u32 data = 0;                                                   \
        if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
-       spin_lock_irqsave(&pci_lock, flags);                            \
+       raw_spin_lock_irqsave(&pci_lock, flags);                        \
        res = bus->ops->read(bus, devfn, pos, len, &data);              \
        *value = (type)data;                                            \
-       spin_unlock_irqrestore(&pci_lock, flags);                       \
+       raw_spin_unlock_irqrestore(&pci_lock, flags);           \
        return res;                                                     \
 }
 
@@ -46,9 +47,9 @@ int pci_bus_write_config_##size \
        int res;                                                        \
        unsigned long flags;                                            \
        if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
-       spin_lock_irqsave(&pci_lock, flags);                            \
+       raw_spin_lock_irqsave(&pci_lock, flags);                        \
        res = bus->ops->write(bus, devfn, pos, len, value);             \
-       spin_unlock_irqrestore(&pci_lock, flags);                       \
+       raw_spin_unlock_irqrestore(&pci_lock, flags);           \
        return res;                                                     \
 }
 
@@ -66,6 +67,58 @@ EXPORT_SYMBOL(pci_bus_write_config_byte);
 EXPORT_SYMBOL(pci_bus_write_config_word);
 EXPORT_SYMBOL(pci_bus_write_config_dword);
 
+/**
+ * pci_bus_set_ops - Set raw operations of pci bus
+ * @bus:       pci bus struct
+ * @ops:       new raw operations
+ *
+ * Return previous raw operations
+ */
+struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops)
+{
+       struct pci_ops *old_ops;
+       unsigned long flags;
+
+       raw_spin_lock_irqsave(&pci_lock, flags);
+       old_ops = bus->ops;
+       bus->ops = ops;
+       raw_spin_unlock_irqrestore(&pci_lock, flags);
+       return old_ops;
+}
+EXPORT_SYMBOL(pci_bus_set_ops);
+
+/**
+ * pci_read_vpd - Read one entry from Vital Product Data
+ * @dev:       pci device struct
+ * @pos:       offset in vpd space
+ * @count:     number of bytes to read
+ * @buf:       pointer to where to store result
+ *
+ */
+ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf)
+{
+       if (!dev->vpd || !dev->vpd->ops)
+               return -ENODEV;
+       return dev->vpd->ops->read(dev, pos, count, buf);
+}
+EXPORT_SYMBOL(pci_read_vpd);
+
+/**
+ * pci_write_vpd - Write entry to Vital Product Data
+ * @dev:       pci device struct
+ * @pos:       offset in vpd space
+ * @count:     number of bytes to write
+ * @buf:       buffer containing write data
+ *
+ */
+ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)
+{
+       if (!dev->vpd || !dev->vpd->ops)
+               return -ENODEV;
+       return dev->vpd->ops->write(dev, pos, count, buf);
+}
+EXPORT_SYMBOL(pci_write_vpd);
+
 /*
  * The following routines are to prevent the user from accessing PCI config
  * space when it's unsafe to do so.  Some devices require this during BIST and
@@ -83,9 +136,9 @@ static noinline void pci_wait_ucfg(struct pci_dev *dev)
        __add_wait_queue(&pci_ucfg_wait, &wait);
        do {
                set_current_state(TASK_UNINTERRUPTIBLE);
-               spin_unlock_irq(&pci_lock);
+               raw_spin_unlock_irq(&pci_lock);
                schedule();
-               spin_lock_irq(&pci_lock);
+               raw_spin_lock_irq(&pci_lock);
        } while (dev->block_ucfg_access);
        __remove_wait_queue(&pci_ucfg_wait, &wait);
 }
@@ -97,11 +150,11 @@ int pci_user_read_config_##size                                            \
        int ret = 0;                                                    \
        u32 data = -1;                                                  \
        if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
-       spin_lock_irq(&pci_lock);                                       \
+       raw_spin_lock_irq(&pci_lock);                           \
        if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev);       \
        ret = dev->bus->ops->read(dev->bus, dev->devfn,                 \
                                        pos, sizeof(type), &data);      \
-       spin_unlock_irq(&pci_lock);                                     \
+       raw_spin_unlock_irq(&pci_lock);                         \
        *val = (type)data;                                              \
        return ret;                                                     \
 }
@@ -112,11 +165,11 @@ int pci_user_write_config_##size                                  \
 {                                                                      \
        int ret = -EIO;                                                 \
        if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;       \
-       spin_lock_irq(&pci_lock);                                       \
+       raw_spin_lock_irq(&pci_lock);                           \
        if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev);       \
        ret = dev->bus->ops->write(dev->bus, dev->devfn,                \
                                        pos, sizeof(type), val);        \
-       spin_unlock_irq(&pci_lock);                                     \
+       raw_spin_unlock_irq(&pci_lock);                         \
        return ret;                                                     \
 }
 
@@ -133,125 +186,145 @@ PCI_USER_WRITE_CONFIG(dword, u32)
 
 struct pci_vpd_pci22 {
        struct pci_vpd base;
-       spinlock_t lock; /* controls access to hardware and the flags */
-       u8      cap;
+       struct mutex lock;
+       u16     flag;
        bool    busy;
-       bool    flag; /* value of F bit to wait for */
+       u8      cap;
 };
 
-/* Wait for last operation to complete */
+/*
+ * Wait for last operation to complete.
+ * This code has to spin since there is no other notification from the PCI
+ * hardware. Since the VPD is often implemented by serial attachment to an
+ * EEPROM, it may take many milliseconds to complete.
+ */
 static int pci_vpd_pci22_wait(struct pci_dev *dev)
 {
        struct pci_vpd_pci22 *vpd =
                container_of(dev->vpd, struct pci_vpd_pci22, base);
-       u16 flag, status;
-       int wait;
+       unsigned long timeout = jiffies + HZ/20 + 2;
+       u16 status;
        int ret;
 
        if (!vpd->busy)
                return 0;
 
-       flag = vpd->flag ? PCI_VPD_ADDR_F : 0;
-       wait = vpd->flag ? 10 : 1000; /* read: 100 us; write: 10 ms */
        for (;;) {
-               ret = pci_user_read_config_word(dev,
-                                               vpd->cap + PCI_VPD_ADDR,
+               ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,
                                                &status);
-               if (ret < 0)
+               if (ret)
                        return ret;
-               if ((status & PCI_VPD_ADDR_F) == flag) {
+
+               if ((status & PCI_VPD_ADDR_F) == vpd->flag) {
                        vpd->busy = false;
                        return 0;
                }
-               if (wait-- == 0)
+
+               if (time_after(jiffies, timeout))
                        return -ETIMEDOUT;
-               udelay(10);
+               if (fatal_signal_pending(current))
+                       return -EINTR;
+               if (!cond_resched())
+                       udelay(10);
        }
 }
 
-static int pci_vpd_pci22_read(struct pci_dev *dev, int pos, int size,
-                             char *buf)
+static ssize_t pci_vpd_pci22_read(struct pci_dev *dev, loff_t pos, size_t count,
+                                 void *arg)
 {
        struct pci_vpd_pci22 *vpd =
                container_of(dev->vpd, struct pci_vpd_pci22, base);
-       u32 val;
        int ret;
-       int begin, end, i;
+       loff_t end = pos + count;
+       u8 *buf = arg;
 
-       if (pos < 0 || pos > vpd->base.len || size > vpd->base.len  - pos)
+       if (pos < 0 || pos > vpd->base.len || end > vpd->base.len)
                return -EINVAL;
-       if (size == 0)
-               return 0;
 
-       spin_lock_irq(&vpd->lock);
-       ret = pci_vpd_pci22_wait(dev);
-       if (ret < 0)
-               goto out;
-       ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
-                                        pos & ~3);
-       if (ret < 0)
-               goto out;
-       vpd->busy = true;
-       vpd->flag = 1;
+       if (mutex_lock_killable(&vpd->lock))
+               return -EINTR;
+
        ret = pci_vpd_pci22_wait(dev);
        if (ret < 0)
                goto out;
-       ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA,
-                                        &val);
-out:
-       spin_unlock_irq(&vpd->lock);
-       if (ret < 0)
-               return ret;
-
-       /* Convert to bytes */
-       begin = pos & 3;
-       end = min(4, begin + size);
-       for (i = 0; i < end; ++i) {
-               if (i >= begin)
-                       *buf++ = val;
-               val >>= 8;
+
+       while (pos < end) {
+               u32 val;
+               unsigned int i, skip;
+
+               ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
+                                                pos & ~3);
+               if (ret < 0)
+                       break;
+               vpd->busy = true;
+               vpd->flag = PCI_VPD_ADDR_F;
+               ret = pci_vpd_pci22_wait(dev);
+               if (ret < 0)
+                       break;
+
+               ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA, &val);
+               if (ret < 0)
+                       break;
+
+               skip = pos & 3;
+               for (i = 0;  i < sizeof(u32); i++) {
+                       if (i >= skip) {
+                               *buf++ = val;
+                               if (++pos == end)
+                                       break;
+                       }
+                       val >>= 8;
+               }
        }
-       return end - begin;
+out:
+       mutex_unlock(&vpd->lock);
+       return ret ? ret : count;
 }
 
-static int pci_vpd_pci22_write(struct pci_dev *dev, int pos, int size,
-                              const char *buf)
+static ssize_t pci_vpd_pci22_write(struct pci_dev *dev, loff_t pos, size_t count,
+                                  const void *arg)
 {
        struct pci_vpd_pci22 *vpd =
                container_of(dev->vpd, struct pci_vpd_pci22, base);
-       u32 val;
-       int ret;
+       const u8 *buf = arg;
+       loff_t end = pos + count;
+       int ret = 0;
 
-       if (pos < 0 || pos > vpd->base.len || pos & 3 ||
-           size > vpd->base.len - pos || size < 4)
+       if (pos < 0 || (pos & 3) || (count & 3) || end > vpd->base.len)
                return -EINVAL;
 
-       val = (u8) *buf++;
-       val |= ((u8) *buf++) << 8;
-       val |= ((u8) *buf++) << 16;
-       val |= ((u32)(u8) *buf++) << 24;
+       if (mutex_lock_killable(&vpd->lock))
+               return -EINTR;
 
-       spin_lock_irq(&vpd->lock);
        ret = pci_vpd_pci22_wait(dev);
        if (ret < 0)
                goto out;
-       ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA,
-                                         val);
-       if (ret < 0)
-               goto out;
-       ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
-                                        pos | PCI_VPD_ADDR_F);
-       if (ret < 0)
-               goto out;
-       vpd->busy = true;
-       vpd->flag = 0;
-       ret = pci_vpd_pci22_wait(dev);
-out:
-       spin_unlock_irq(&vpd->lock);
-       if (ret < 0)
-               return ret;
 
-       return 4;
+       while (pos < end) {
+               u32 val;
+
+               val = *buf++;
+               val |= *buf++ << 8;
+               val |= *buf++ << 16;
+               val |= *buf++ << 24;
+
+               ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA, val);
+               if (ret < 0)
+                       break;
+               ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
+                                                pos | PCI_VPD_ADDR_F);
+               if (ret < 0)
+                       break;
+
+               vpd->busy = true;
+               vpd->flag = 0;
+               ret = pci_vpd_pci22_wait(dev);
+
+               pos += sizeof(u32);
+       }
+out:
+       mutex_unlock(&vpd->lock);
+       return ret ? ret : count;
 }
 
 static void pci_vpd_pci22_release(struct pci_dev *dev)
@@ -259,7 +332,7 @@ static void pci_vpd_pci22_release(struct pci_dev *dev)
        kfree(container_of(dev->vpd, struct pci_vpd_pci22, base));
 }
 
-static struct pci_vpd_ops pci_vpd_pci22_ops = {
+static const struct pci_vpd_ops pci_vpd_pci22_ops = {
        .read = pci_vpd_pci22_read,
        .write = pci_vpd_pci22_write,
        .release = pci_vpd_pci22_release,
@@ -279,7 +352,7 @@ int pci_vpd_pci22_init(struct pci_dev *dev)
 
        vpd->base.len = PCI_VPD_PCI22_SIZE;
        vpd->base.ops = &pci_vpd_pci22_ops;
-       spin_lock_init(&vpd->lock);
+       mutex_init(&vpd->lock);
        vpd->cap = cap;
        vpd->busy = false;
        dev->vpd = &vpd->base;
@@ -287,6 +360,30 @@ int pci_vpd_pci22_init(struct pci_dev *dev)
 }
 
 /**
+ * pci_vpd_truncate - Set available Vital Product Data size
+ * @dev:       pci device struct
+ * @size:      available memory in bytes
+ *
+ * Adjust size of available VPD area.
+ */
+int pci_vpd_truncate(struct pci_dev *dev, size_t size)
+{
+       if (!dev->vpd)
+               return -EINVAL;
+
+       /* limited by the access method */
+       if (size > dev->vpd->len)
+               return -EINVAL;
+
+       dev->vpd->len = size;
+       if (dev->vpd->attr)
+               dev->vpd->attr->size = size;
+
+       return 0;
+}
+EXPORT_SYMBOL(pci_vpd_truncate);
+
+/**
  * pci_block_user_cfg_access - Block userspace PCI config reads/writes
  * @dev:       pci device struct
  *
@@ -299,10 +396,10 @@ void pci_block_user_cfg_access(struct pci_dev *dev)
        unsigned long flags;
        int was_blocked;
 
-       spin_lock_irqsave(&pci_lock, flags);
+       raw_spin_lock_irqsave(&pci_lock, flags);
        was_blocked = dev->block_ucfg_access;
        dev->block_ucfg_access = 1;
-       spin_unlock_irqrestore(&pci_lock, flags);
+       raw_spin_unlock_irqrestore(&pci_lock, flags);
 
        /* If we BUG() inside the pci_lock, we're guaranteed to hose
         * the machine */
@@ -320,7 +417,7 @@ void pci_unblock_user_cfg_access(struct pci_dev *dev)
 {
        unsigned long flags;
 
-       spin_lock_irqsave(&pci_lock, flags);
+       raw_spin_lock_irqsave(&pci_lock, flags);
 
        /* This indicates a problem in the caller, but we don't need
         * to kill them, unlike a double-block above. */
@@ -328,6 +425,6 @@ void pci_unblock_user_cfg_access(struct pci_dev *dev)
 
        dev->block_ucfg_access = 0;
        wake_up_all(&pci_ucfg_wait);
-       spin_unlock_irqrestore(&pci_lock, flags);
+       raw_spin_unlock_irqrestore(&pci_lock, flags);
 }
 EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access);