#define rt2500pci_rfkill_poll NULL
#endif /* CONFIG_RT2500PCI_RFKILL */
+#ifdef CONFIG_RT2500PCI_LEDS
+static void rt2500pci_brightness_set(struct led_classdev *led_cdev,
+ enum led_brightness brightness)
+{
+ struct rt2x00_led *led =
+ container_of(led_cdev, struct rt2x00_led, led_dev);
+ unsigned int enabled = brightness != LED_OFF;
+ u32 reg;
+
+ rt2x00pci_register_read(led->rt2x00dev, LEDCSR, ®);
+
+ if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
+ rt2x00_set_field32(®, LEDCSR_LINK, enabled);
+ else if (led->type == LED_TYPE_ACTIVITY)
+ rt2x00_set_field32(®, LEDCSR_ACTIVITY, enabled);
+
+ rt2x00pci_register_write(led->rt2x00dev, LEDCSR, reg);
+}
+
+static int rt2500pci_blink_set(struct led_classdev *led_cdev,
+ unsigned long *delay_on,
+ unsigned long *delay_off)
+{
+ struct rt2x00_led *led =
+ container_of(led_cdev, struct rt2x00_led, led_dev);
+ u32 reg;
+
+ rt2x00pci_register_read(led->rt2x00dev, LEDCSR, ®);
+ rt2x00_set_field32(®, LEDCSR_ON_PERIOD, *delay_on);
+ rt2x00_set_field32(®, LEDCSR_OFF_PERIOD, *delay_off);
+ rt2x00pci_register_write(led->rt2x00dev, LEDCSR, reg);
+
+ return 0;
+}
+#endif /* CONFIG_RT2500PCI_LEDS */
+
/*
* Configuration handlers.
*/
+static void rt2500pci_config_filter(struct rt2x00_dev *rt2x00dev,
+ const unsigned int filter_flags)
+{
+ u32 reg;
+
+ /*
+ * Start configuration steps.
+ * Note that the version error will always be dropped
+ * and broadcast frames will always be accepted since
+ * there is no filter for it at this time.
+ */
+ rt2x00pci_register_read(rt2x00dev, RXCSR0, ®);
+ rt2x00_set_field32(®, RXCSR0_DROP_CRC,
+ !(filter_flags & FIF_FCSFAIL));
+ rt2x00_set_field32(®, RXCSR0_DROP_PHYSICAL,
+ !(filter_flags & FIF_PLCPFAIL));
+ rt2x00_set_field32(®, RXCSR0_DROP_CONTROL,
+ !(filter_flags & FIF_CONTROL));
+ rt2x00_set_field32(®, RXCSR0_DROP_NOT_TO_ME,
+ !(filter_flags & FIF_PROMISC_IN_BSS));
+ rt2x00_set_field32(®, RXCSR0_DROP_TODS,
+ !(filter_flags & FIF_PROMISC_IN_BSS) &&
+ !rt2x00dev->intf_ap_count);
+ rt2x00_set_field32(®, RXCSR0_DROP_VERSION_ERROR, 1);
+ rt2x00_set_field32(®, RXCSR0_DROP_MCAST,
+ !(filter_flags & FIF_ALLMULTI));
+ rt2x00_set_field32(®, RXCSR0_DROP_BCAST, 0);
+ rt2x00pci_register_write(rt2x00dev, RXCSR0, reg);
+}
+
static void rt2500pci_config_intf(struct rt2x00_dev *rt2x00dev,
struct rt2x00_intf *intf,
struct rt2x00intf_conf *conf,
const unsigned int flags)
{
struct data_queue *queue =
- rt2x00queue_get_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
+ rt2x00queue_get_queue(rt2x00dev, RT2X00_BCN_QUEUE_BEACON);
unsigned int bcn_preload;
u32 reg;
if (flags & CONFIG_UPDATE_TYPE) {
- rt2x00pci_register_write(rt2x00dev, CSR14, 0);
-
/*
* Enable beacon config
*/
*/
rt2x00pci_register_read(rt2x00dev, CSR14, ®);
rt2x00_set_field32(®, CSR14_TSF_COUNT, 1);
- rt2x00_set_field32(®, CSR14_TBCN,
- (conf->sync == TSF_SYNC_BEACON));
- rt2x00_set_field32(®, CSR14_BEACON_GEN, 0);
rt2x00_set_field32(®, CSR14_TSF_SYNC, conf->sync);
+ rt2x00_set_field32(®, CSR14_TBCN, 1);
rt2x00pci_register_write(rt2x00dev, CSR14, reg);
}
conf->bssid, sizeof(conf->bssid));
}
-static int rt2500pci_config_preamble(struct rt2x00_dev *rt2x00dev,
- const int short_preamble,
- const int ack_timeout,
- const int ack_consume_time)
+static void rt2500pci_config_erp(struct rt2x00_dev *rt2x00dev,
+ struct rt2x00lib_erp *erp)
{
int preamble_mask;
u32 reg;
/*
* When short preamble is enabled, we should set bit 0x08
*/
- preamble_mask = short_preamble << 3;
+ preamble_mask = erp->short_preamble << 3;
rt2x00pci_register_read(rt2x00dev, TXCSR1, ®);
- rt2x00_set_field32(®, TXCSR1_ACK_TIMEOUT, ack_timeout);
- rt2x00_set_field32(®, TXCSR1_ACK_CONSUME_TIME, ack_consume_time);
+ rt2x00_set_field32(®, TXCSR1_ACK_TIMEOUT,
+ erp->ack_timeout);
+ rt2x00_set_field32(®, TXCSR1_ACK_CONSUME_TIME,
+ erp->ack_consume_time);
rt2x00pci_register_write(rt2x00dev, TXCSR1, reg);
rt2x00pci_register_read(rt2x00dev, ARCSR2, ®);
- rt2x00_set_field32(®, ARCSR2_SIGNAL, 0x00 | preamble_mask);
+ rt2x00_set_field32(®, ARCSR2_SIGNAL, 0x00);
rt2x00_set_field32(®, ARCSR2_SERVICE, 0x04);
rt2x00_set_field32(®, ARCSR2_LENGTH, get_duration(ACK_SIZE, 10));
rt2x00pci_register_write(rt2x00dev, ARCSR2, reg);
rt2x00_set_field32(®, ARCSR5_SERVICE, 0x84);
rt2x00_set_field32(®, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110));
rt2x00pci_register_write(rt2x00dev, ARCSR5, reg);
-
- return 0;
}
static void rt2500pci_config_phymode(struct rt2x00_dev *rt2x00dev,
u8 r14;
u8 r2;
+ /*
+ * We should never come here because rt2x00lib is supposed
+ * to catch this and send us the correct antenna explicitely.
+ */
+ BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
+ ant->tx == ANTENNA_SW_DIVERSITY);
+
rt2x00pci_register_read(rt2x00dev, BBPCSR1, ®);
rt2500pci_bbp_read(rt2x00dev, 14, &r14);
rt2500pci_bbp_read(rt2x00dev, 2, &r2);
rt2x00_set_field32(®, BBPCSR1_CCK, 0);
rt2x00_set_field32(®, BBPCSR1_OFDM, 0);
break;
- case ANTENNA_HW_DIVERSITY:
- case ANTENNA_SW_DIVERSITY:
- /*
- * NOTE: We should never come here because rt2x00lib is
- * supposed to catch this and send us the correct antenna
- * explicitely. However we are nog going to bug about this.
- * Instead, just default to antenna B.
- */
case ANTENNA_B:
+ default:
rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
rt2x00_set_field32(®, BBPCSR1_CCK, 2);
rt2x00_set_field32(®, BBPCSR1_OFDM, 2);
case ANTENNA_A:
rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
break;
- case ANTENNA_HW_DIVERSITY:
- case ANTENNA_SW_DIVERSITY:
- /*
- * NOTE: We should never come here because rt2x00lib is
- * supposed to catch this and send us the correct antenna
- * explicitely. However we are nog going to bug about this.
- * Instead, just default to antenna B.
- */
case ANTENNA_B:
+ default:
rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
break;
}
}
/*
- * LED functions.
- */
-static void rt2500pci_enable_led(struct rt2x00_dev *rt2x00dev)
-{
- u32 reg;
-
- rt2x00pci_register_read(rt2x00dev, LEDCSR, ®);
-
- rt2x00_set_field32(®, LEDCSR_ON_PERIOD, 70);
- rt2x00_set_field32(®, LEDCSR_OFF_PERIOD, 30);
- rt2x00_set_field32(®, LEDCSR_LINK,
- (rt2x00dev->led_mode != LED_MODE_ASUS));
- rt2x00_set_field32(®, LEDCSR_ACTIVITY,
- (rt2x00dev->led_mode != LED_MODE_TXRX_ACTIVITY));
- rt2x00pci_register_write(rt2x00dev, LEDCSR, reg);
-}
-
-static void rt2500pci_disable_led(struct rt2x00_dev *rt2x00dev)
-{
- u32 reg;
-
- rt2x00pci_register_read(rt2x00dev, LEDCSR, ®);
- rt2x00_set_field32(®, LEDCSR_LINK, 0);
- rt2x00_set_field32(®, LEDCSR_ACTIVITY, 0);
- rt2x00pci_register_write(rt2x00dev, LEDCSR, reg);
-}
-
-/*
* Link tuning
*/
static void rt2500pci_link_stats(struct rt2x00_dev *rt2x00dev,
u32 word;
rt2x00_desc_read(priv_rx->desc, 1, &word);
- rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, priv_rx->dma);
+ rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, priv_rx->data_dma);
rt2x00_desc_write(priv_rx->desc, 1, word);
rt2x00_desc_read(priv_rx->desc, 0, &word);
u32 word;
rt2x00_desc_read(priv_tx->desc, 1, &word);
- rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, priv_tx->dma);
+ rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, priv_tx->data_dma);
rt2x00_desc_write(priv_tx->desc, 1, word);
rt2x00_desc_read(priv_tx->desc, 0, &word);
priv_tx = rt2x00dev->tx[1].entries[0].priv_data;
rt2x00pci_register_read(rt2x00dev, TXCSR3, ®);
- rt2x00_set_field32(®, TXCSR3_TX_RING_REGISTER, priv_tx->dma);
+ rt2x00_set_field32(®, TXCSR3_TX_RING_REGISTER,
+ priv_tx->desc_dma);
rt2x00pci_register_write(rt2x00dev, TXCSR3, reg);
priv_tx = rt2x00dev->tx[0].entries[0].priv_data;
rt2x00pci_register_read(rt2x00dev, TXCSR5, ®);
- rt2x00_set_field32(®, TXCSR5_PRIO_RING_REGISTER, priv_tx->dma);
+ rt2x00_set_field32(®, TXCSR5_PRIO_RING_REGISTER,
+ priv_tx->desc_dma);
rt2x00pci_register_write(rt2x00dev, TXCSR5, reg);
priv_tx = rt2x00dev->bcn[1].entries[0].priv_data;
rt2x00pci_register_read(rt2x00dev, TXCSR4, ®);
- rt2x00_set_field32(®, TXCSR4_ATIM_RING_REGISTER, priv_tx->dma);
+ rt2x00_set_field32(®, TXCSR4_ATIM_RING_REGISTER,
+ priv_tx->desc_dma);
rt2x00pci_register_write(rt2x00dev, TXCSR4, reg);
priv_tx = rt2x00dev->bcn[0].entries[0].priv_data;
rt2x00pci_register_read(rt2x00dev, TXCSR6, ®);
- rt2x00_set_field32(®, TXCSR6_BEACON_RING_REGISTER, priv_tx->dma);
+ rt2x00_set_field32(®, TXCSR6_BEACON_RING_REGISTER,
+ priv_tx->desc_dma);
rt2x00pci_register_write(rt2x00dev, TXCSR6, reg);
rt2x00pci_register_read(rt2x00dev, RXCSR1, ®);
priv_rx = rt2x00dev->rx->entries[0].priv_data;
rt2x00pci_register_read(rt2x00dev, RXCSR2, ®);
- rt2x00_set_field32(®, RXCSR2_RX_RING_REGISTER, priv_tx->dma);
+ rt2x00_set_field32(®, RXCSR2_RX_RING_REGISTER, priv_rx->desc_dma);
rt2x00pci_register_write(rt2x00dev, RXCSR2, reg);
return 0;
rt2500pci_bbp_write(rt2x00dev, 61, 0x6d);
rt2500pci_bbp_write(rt2x00dev, 62, 0x10);
- DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
for (i = 0; i < EEPROM_BBP_SIZE; i++) {
rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
if (eeprom != 0xffff && eeprom != 0x0000) {
reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
- DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
- reg_id, value);
rt2500pci_bbp_write(rt2x00dev, reg_id, value);
}
}
- DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
return 0;
}
*/
rt2500pci_toggle_irq(rt2x00dev, STATE_RADIO_IRQ_ON);
- /*
- * Enable LED
- */
- rt2500pci_enable_led(rt2x00dev);
-
return 0;
}
{
u32 reg;
- /*
- * Disable LED
- */
- rt2500pci_disable_led(rt2x00dev);
-
rt2x00pci_register_write(rt2x00dev, PWRCSR0, 0);
/*
* TX data initialization
*/
static void rt2500pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
- unsigned int queue)
+ const unsigned int queue)
{
u32 reg;
- if (queue == IEEE80211_TX_QUEUE_BEACON) {
+ if (queue == RT2X00_BCN_QUEUE_BEACON) {
rt2x00pci_register_read(rt2x00dev, CSR14, ®);
if (!rt2x00_get_field32(reg, CSR14_BEACON_GEN)) {
+ rt2x00_set_field32(®, CSR14_TSF_COUNT, 1);
+ rt2x00_set_field32(®, CSR14_TBCN, 1);
rt2x00_set_field32(®, CSR14_BEACON_GEN, 1);
rt2x00pci_register_write(rt2x00dev, CSR14, reg);
}
rt2x00_set_field32(®, TXCSR0_KICK_TX,
(queue == IEEE80211_TX_QUEUE_DATA1));
rt2x00_set_field32(®, TXCSR0_KICK_ATIM,
- (queue == IEEE80211_TX_QUEUE_AFTER_BEACON));
+ (queue == RT2X00_BCN_QUEUE_ATIM));
rt2x00pci_register_write(rt2x00dev, TXCSR0, reg);
}
if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
+ /*
+ * Obtain the status about this packet.
+ * When frame was received with an OFDM bitrate,
+ * the signal is the PLCP value. If it was received with
+ * a CCK bitrate the signal is the rate in 100kbit/s.
+ */
rxdesc->signal = rt2x00_get_field32(word2, RXD_W2_SIGNAL);
rxdesc->rssi = rt2x00_get_field32(word2, RXD_W2_RSSI) -
entry->queue->rt2x00dev->rssi_offset;
- rxdesc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
- rxdesc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS);
+
+ rxdesc->dev_flags = 0;
+ if (rt2x00_get_field32(word0, RXD_W0_OFDM))
+ rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
+ if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
+ rxdesc->dev_flags |= RXDONE_MY_BSS;
}
/*
* 3 - Atim ring transmit done interrupt.
*/
if (rt2x00_get_field32(reg, CSR7_TXDONE_ATIMRING))
- rt2500pci_txdone(rt2x00dev, IEEE80211_TX_QUEUE_AFTER_BEACON);
+ rt2500pci_txdone(rt2x00dev, RT2X00_BCN_QUEUE_ATIM);
/*
* 4 - Priority ring transmit done interrupt.
/*
* Store led mode, for correct led behaviour.
*/
- rt2x00dev->led_mode =
- rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
+#ifdef CONFIG_RT2500PCI_LEDS
+ value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
+
+ rt2x00dev->led_radio.rt2x00dev = rt2x00dev;
+ rt2x00dev->led_radio.type = LED_TYPE_RADIO;
+ rt2x00dev->led_radio.led_dev.brightness_set =
+ rt2500pci_brightness_set;
+ rt2x00dev->led_radio.led_dev.blink_set =
+ rt2500pci_blink_set;
+ rt2x00dev->led_radio.flags = LED_INITIALIZED;
+
+ if (value == LED_MODE_TXRX_ACTIVITY) {
+ rt2x00dev->led_qual.rt2x00dev = rt2x00dev;
+ rt2x00dev->led_qual.type = LED_TYPE_ACTIVITY;
+ rt2x00dev->led_qual.led_dev.brightness_set =
+ rt2500pci_brightness_set;
+ rt2x00dev->led_qual.led_dev.blink_set =
+ rt2500pci_blink_set;
+ rt2x00dev->led_qual.flags = LED_INITIALIZED;
+ }
+#endif /* CONFIG_RT2500PCI_LEDS */
/*
* Detect if this device has an hardware controlled radio.
/*
* Initialize hw_mode information.
*/
- spec->num_modes = 2;
- spec->num_rates = 12;
+ spec->supported_bands = SUPPORT_BAND_2GHZ;
+ spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
spec->tx_power_a = NULL;
spec->tx_power_bg = txpower;
spec->tx_power_default = DEFAULT_TXPOWER;
spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
spec->channels = rf_vals_bg_2525e;
} else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
+ spec->supported_bands |= SUPPORT_BAND_5GHZ;
spec->num_channels = ARRAY_SIZE(rf_vals_5222);
spec->channels = rf_vals_5222;
- spec->num_modes = 3;
}
}
/*
* IEEE80211 stack callback functions.
*/
-static void rt2500pci_configure_filter(struct ieee80211_hw *hw,
- unsigned int changed_flags,
- unsigned int *total_flags,
- int mc_count,
- struct dev_addr_list *mc_list)
-{
- struct rt2x00_dev *rt2x00dev = hw->priv;
- u32 reg;
-
- /*
- * Mask off any flags we are going to ignore from
- * the total_flags field.
- */
- *total_flags &=
- FIF_ALLMULTI |
- FIF_FCSFAIL |
- FIF_PLCPFAIL |
- FIF_CONTROL |
- FIF_OTHER_BSS |
- FIF_PROMISC_IN_BSS;
-
- /*
- * Apply some rules to the filters:
- * - Some filters imply different filters to be set.
- * - Some things we can't filter out at all.
- */
- if (mc_count)
- *total_flags |= FIF_ALLMULTI;
- if (*total_flags & FIF_OTHER_BSS ||
- *total_flags & FIF_PROMISC_IN_BSS)
- *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
-
- /*
- * Check if there is any work left for us.
- */
- if (rt2x00dev->packet_filter == *total_flags)
- return;
- rt2x00dev->packet_filter = *total_flags;
-
- /*
- * Start configuration steps.
- * Note that the version error will always be dropped
- * and broadcast frames will always be accepted since
- * there is no filter for it at this time.
- */
- rt2x00pci_register_read(rt2x00dev, RXCSR0, ®);
- rt2x00_set_field32(®, RXCSR0_DROP_CRC,
- !(*total_flags & FIF_FCSFAIL));
- rt2x00_set_field32(®, RXCSR0_DROP_PHYSICAL,
- !(*total_flags & FIF_PLCPFAIL));
- rt2x00_set_field32(®, RXCSR0_DROP_CONTROL,
- !(*total_flags & FIF_CONTROL));
- rt2x00_set_field32(®, RXCSR0_DROP_NOT_TO_ME,
- !(*total_flags & FIF_PROMISC_IN_BSS));
- rt2x00_set_field32(®, RXCSR0_DROP_TODS,
- !(*total_flags & FIF_PROMISC_IN_BSS));
- rt2x00_set_field32(®, RXCSR0_DROP_VERSION_ERROR, 1);
- rt2x00_set_field32(®, RXCSR0_DROP_MCAST,
- !(*total_flags & FIF_ALLMULTI));
- rt2x00_set_field32(®, RXCSR0_DROP_BCAST, 0);
- rt2x00pci_register_write(rt2x00dev, RXCSR0, reg);
-}
-
static int rt2500pci_set_retry_limit(struct ieee80211_hw *hw,
u32 short_retry, u32 long_retry)
{
return tsf;
}
-static void rt2500pci_reset_tsf(struct ieee80211_hw *hw)
+static int rt2500pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
+ struct ieee80211_tx_control *control)
{
struct rt2x00_dev *rt2x00dev = hw->priv;
+ struct rt2x00_intf *intf = vif_to_intf(control->vif);
+ struct queue_entry_priv_pci_tx *priv_tx;
+ struct skb_frame_desc *skbdesc;
+ u32 reg;
+
+ if (unlikely(!intf->beacon))
+ return -ENOBUFS;
- rt2x00pci_register_write(rt2x00dev, CSR16, 0);
- rt2x00pci_register_write(rt2x00dev, CSR17, 0);
+ priv_tx = intf->beacon->priv_data;
+
+ /*
+ * Fill in skb descriptor
+ */
+ skbdesc = get_skb_frame_desc(skb);
+ memset(skbdesc, 0, sizeof(*skbdesc));
+ skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED;
+ skbdesc->data = skb->data;
+ skbdesc->data_len = skb->len;
+ skbdesc->desc = priv_tx->desc;
+ skbdesc->desc_len = intf->beacon->queue->desc_size;
+ skbdesc->entry = intf->beacon;
+
+ /*
+ * Disable beaconing while we are reloading the beacon data,
+ * otherwise we might be sending out invalid data.
+ */
+ rt2x00pci_register_read(rt2x00dev, CSR14, ®);
+ rt2x00_set_field32(®, CSR14_TSF_COUNT, 0);
+ rt2x00_set_field32(®, CSR14_TBCN, 0);
+ rt2x00_set_field32(®, CSR14_BEACON_GEN, 0);
+ rt2x00pci_register_write(rt2x00dev, CSR14, reg);
+
+ /*
+ * mac80211 doesn't provide the control->queue variable
+ * for beacons. Set our own queue identification so
+ * it can be used during descriptor initialization.
+ */
+ control->queue = RT2X00_BCN_QUEUE_BEACON;
+ rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
+
+ /*
+ * Enable beacon generation.
+ * Write entire beacon with descriptor to register,
+ * and kick the beacon generator.
+ */
+ memcpy(priv_tx->data, skb->data, skb->len);
+ rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, control->queue);
+
+ return 0;
}
static int rt2500pci_tx_last_beacon(struct ieee80211_hw *hw)
.remove_interface = rt2x00mac_remove_interface,
.config = rt2x00mac_config,
.config_interface = rt2x00mac_config_interface,
- .configure_filter = rt2500pci_configure_filter,
+ .configure_filter = rt2x00mac_configure_filter,
.get_stats = rt2x00mac_get_stats,
.set_retry_limit = rt2500pci_set_retry_limit,
.bss_info_changed = rt2x00mac_bss_info_changed,
.conf_tx = rt2x00mac_conf_tx,
.get_tx_stats = rt2x00mac_get_tx_stats,
.get_tsf = rt2500pci_get_tsf,
- .reset_tsf = rt2500pci_reset_tsf,
- .beacon_update = rt2x00pci_beacon_update,
+ .beacon_update = rt2500pci_beacon_update,
.tx_last_beacon = rt2500pci_tx_last_beacon,
};
.write_tx_data = rt2x00pci_write_tx_data,
.kick_tx_queue = rt2500pci_kick_tx_queue,
.fill_rxdone = rt2500pci_fill_rxdone,
+ .config_filter = rt2500pci_config_filter,
.config_intf = rt2500pci_config_intf,
- .config_preamble = rt2500pci_config_preamble,
+ .config_erp = rt2500pci_config_erp,
.config = rt2500pci_config,
};
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff