ath5k: Clean up eeprom parsing and add missing calibration data

[safe/jmp/linux-2.6] / drivers / net / wireless / ath5k / reset.c

diff --git a/drivers/net/wireless/ath5k/reset.c b/drivers/net/wireless/ath5k/reset.c
index 8f18868..dc2d7d8 100644 (file)
--- a/drivers/net/wireless/ath5k/reset.c
+++ b/drivers/net/wireless/ath5k/reset.c
@@ -537,9 +537,10 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
                mdelay(1);
 
                /*
-                * Write some more initial register settings
+                * Write some more initial register settings for revised chips
                 */
-               if (ah->ah_version == AR5K_AR5212) {
+               if (ah->ah_version == AR5K_AR5212 &&
+                   ah->ah_phy_revision > 0x41) {
                        ath5k_hw_reg_write(ah, 0x0002a002, 0x982c);
 
                        if (channel->hw_value == CHANNEL_G)
@@ -558,19 +559,10 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
                        else
                                ath5k_hw_reg_write(ah, 0x00000000, 0x994c);
 
-                       /* Some bits are disabled here, we know nothing about
-                        * register 0xa228 yet, most of the times this ends up
-                        * with a value 0x9b5 -haven't seen any dump with
-                        * a different value- */
-                       /* Got this from decompiling binary HAL */
-                       data = ath5k_hw_reg_read(ah, 0xa228);
-                       data &= 0xfffffdff;
-                       ath5k_hw_reg_write(ah, data, 0xa228);
-
-                       data = ath5k_hw_reg_read(ah, 0xa228);
-                       data &= 0xfffe03ff;
-                       ath5k_hw_reg_write(ah, data, 0xa228);
-                       data = 0;
+                       /* Got this from legacy-hal */
+                       AR5K_REG_DISABLE_BITS(ah, 0xa228, 0x200);
+
+                       AR5K_REG_MASKED_BITS(ah, 0xa228, 0x800, 0xfffe03ff);
 
                        /* Just write 0x9b5 ? */
                        /* ath5k_hw_reg_write(ah, 0x000009b5, 0xa228); */
@@ -682,7 +674,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
                        (ee->ee_switch_settling[ee_mode] << 7) & 0x3f80,
                        0xffffc07f);
                AR5K_REG_MASKED_BITS(ah, AR5K_PHY_GAIN,
-                       (ee->ee_ant_tx_rx[ee_mode] << 12) & 0x3f000,
+                       (ee->ee_atn_tx_rx[ee_mode] << 12) & 0x3f000,
                        0xfffc0fff);
                AR5K_REG_MASKED_BITS(ah, AR5K_PHY_DESIRED_SIZE,
                        (ee->ee_adc_desired_size[ee_mode] & 0x00ff) |
@@ -850,9 +842,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
         *
         * XXX: Find an interval that's OK for all cards...
         */
-       ret = ath5k_hw_noise_floor_calibration(ah, channel->center_freq);
-       if (ret)
-               return ret;
+       ath5k_hw_noise_floor_calibration(ah, channel->center_freq);
 
        /*
         * Reset queues and start beacon timers at the end of the reset routine
@@ -872,8 +862,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
 
        /* Pre-enable interrupts on 5211/5212*/
        if (ah->ah_version != AR5K_AR5210)
-               ath5k_hw_set_imr(ah, AR5K_INT_RX | AR5K_INT_TX |
-                               AR5K_INT_FATAL);
+               ath5k_hw_set_imr(ah, ah->ah_imr);
 
        /*
         * Set RF kill flags if supported by the device (read from the EEPROM)