ath9k: Fix RTC reset for AR5416
[safe/jmp/linux-2.6] / drivers / net / wireless / ath / ath9k / hw.c
index 9d03d27..0a3de3f 100644 (file)
@@ -18,7 +18,7 @@
 #include <asm/unaligned.h>
 
 #include "hw.h"
-#include "ath9k.h"
+#include "rc.h"
 #include "initvals.h"
 
 #define ATH9K_CLOCK_RATE_CCK           22
@@ -943,6 +943,16 @@ int ath9k_hw_init(struct ath_hw *ah)
        else
                ath9k_hw_disablepcie(ah);
 
+       /* Support for Japan ch.14 (2484) spread */
+       if (AR_SREV_9287_11_OR_LATER(ah)) {
+               INIT_INI_ARRAY(&ah->iniCckfirNormal,
+                      ar9287Common_normal_cck_fir_coeff_92871_1,
+                      ARRAY_SIZE(ar9287Common_normal_cck_fir_coeff_92871_1), 2);
+               INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
+                      ar9287Common_japan_2484_cck_fir_coeff_92871_1,
+                      ARRAY_SIZE(ar9287Common_japan_2484_cck_fir_coeff_92871_1), 2);
+       }
+
        r = ath9k_hw_post_init(ah);
        if (r)
                return r;
@@ -2841,8 +2851,9 @@ static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip)
                if (!AR_SREV_9100(ah))
                        REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);
 
-               REG_CLR_BIT(ah, (AR_RTC_RESET),
-                           AR_RTC_RESET_EN);
+               if(!AR_SREV_5416(ah))
+                       REG_CLR_BIT(ah, (AR_RTC_RESET),
+                                   AR_RTC_RESET_EN);
        }
 }
 
@@ -3814,7 +3825,7 @@ void ath9k_hw_cfg_gpio_input(struct ath_hw *ah, u32 gpio)
 {
        u32 gpio_shift;
 
-       ASSERT(gpio < ah->caps.num_gpio_pins);
+       BUG_ON(gpio >= ah->caps.num_gpio_pins);
 
        gpio_shift = gpio << 1;