*
* We use the following SCA memory map:
*
- * Packet buffer descriptor rings - starting from winbase or win0base:
+ * Packet buffer descriptor rings - starting from card->rambase:
* rx_ring_buffers * sizeof(pkt_desc) = logical channel #0 RX ring
* tx_ring_buffers * sizeof(pkt_desc) = logical channel #0 TX ring
* rx_ring_buffers * sizeof(pkt_desc) = logical channel #1 RX ring (if used)
* tx_ring_buffers * sizeof(pkt_desc) = logical channel #1 TX ring (if used)
*
- * Packet data buffers - starting from winbase + buff_offset:
+ * Packet data buffers - starting from card->rambase + buff_offset:
* rx_ring_buffers * HDLC_MAX_MRU = logical channel #0 RX buffers
* tx_ring_buffers * HDLC_MAX_MRU = logical channel #0 TX buffers
* rx_ring_buffers * HDLC_MAX_MRU = logical channel #0 RX buffers (if used)
#define NAPI_WEIGHT 16
-#define get_msci(port) (phy_node(port) ? MSCI1_OFFSET : MSCI0_OFFSET)
-#define get_dmac_rx(port) (phy_node(port) ? DMAC1RX_OFFSET : DMAC0RX_OFFSET)
-#define get_dmac_tx(port) (phy_node(port) ? DMAC1TX_OFFSET : DMAC0TX_OFFSET)
+#define get_msci(port) (port->chan ? MSCI1_OFFSET : MSCI0_OFFSET)
+#define get_dmac_rx(port) (port->chan ? DMAC1RX_OFFSET : DMAC0RX_OFFSET)
+#define get_dmac_tx(port) (port->chan ? DMAC1TX_OFFSET : DMAC0TX_OFFSET)
-#define SCA_INTR_MSCI(node) (node ? 0x10 : 0x01)
-#define SCA_INTR_DMAC_RX(node) (node ? 0x20 : 0x02)
-#define SCA_INTR_DMAC_TX(node) (node ? 0x40 : 0x04)
+#define sca_in(reg, card) readb(card->scabase + (reg))
+#define sca_out(value, reg, card) writeb(value, card->scabase + (reg))
+#define sca_inw(reg, card) readw(card->scabase + (reg))
+#define sca_outw(value, reg, card) writew(value, card->scabase + (reg))
+#define sca_inl(reg, card) readl(card->scabase + (reg))
+#define sca_outl(value, reg, card) writel(value, card->scabase + (reg))
static int sca_poll(struct napi_struct *napi, int budget);
-static inline struct net_device *port_to_dev(port_t *port)
-{
- return port->dev;
-}
-
-static inline int sca_intr_status(card_t *card)
-{
- u8 result = 0;
- u32 isr0 = sca_inl(ISR0, card);
-
- if (isr0 & 0x0000000F) result |= SCA_INTR_DMAC_RX(0);
- if (isr0 & 0x000000F0) result |= SCA_INTR_DMAC_TX(0);
- if (isr0 & 0x00000F00) result |= SCA_INTR_DMAC_RX(1);
- if (isr0 & 0x0000F000) result |= SCA_INTR_DMAC_TX(1);
- if (isr0 & 0x003E0000) result |= SCA_INTR_MSCI(0);
- if (isr0 & 0x3E000000) result |= SCA_INTR_MSCI(1);
-
- if (!(result & SCA_INTR_DMAC_TX(0)))
- if (sca_in(DSR_TX(0), card) & DSR_EOM)
- result |= SCA_INTR_DMAC_TX(0);
- if (!(result & SCA_INTR_DMAC_TX(1)))
- if (sca_in(DSR_TX(1), card) & DSR_EOM)
- result |= SCA_INTR_DMAC_TX(1);
-
- return result;
-}
-
static inline port_t* dev_to_port(struct net_device *dev)
{
return dev_to_hdlc(dev)->priv;
static inline void enable_intr(port_t *port)
{
- /* DMA & MSCI IRQ enable */
- /* IR0_TXINT | IR0_RXINTA | IR0_DMIB* | IR0_DMIA* */
+ /* enable DMIB and MSCI RXINTA interrupts */
sca_outl(sca_inl(IER0, port->card) |
- (phy_node(port) ? 0x0A006600 : 0x000A0066), IER0, port->card);
+ (port->chan ? 0x08002200 : 0x00080022), IER0, port->card);
}
static inline void disable_intr(port_t *port)
{
sca_outl(sca_inl(IER0, port->card) &
- (phy_node(port) ? 0x00FF00FF : 0xFF00FF00), IER0, port->card);
+ (port->chan ? 0x00FF00FF : 0xFF00FF00), IER0, port->card);
}
-static inline u16 next_desc(port_t *port, u16 desc, int transmit)
-{
- return (desc + 1) % (transmit ? port_to_card(port)->tx_ring_buffers
- : port_to_card(port)->rx_ring_buffers);
-}
-
-
static inline u16 desc_abs_number(port_t *port, u16 desc, int transmit)
{
- u16 rx_buffs = port_to_card(port)->rx_ring_buffers;
- u16 tx_buffs = port_to_card(port)->tx_ring_buffers;
+ u16 rx_buffs = port->card->rx_ring_buffers;
+ u16 tx_buffs = port->card->tx_ring_buffers;
desc %= (transmit ? tx_buffs : rx_buffs); // called with "X + 1" etc.
- return log_node(port) * (rx_buffs + tx_buffs) +
- transmit * rx_buffs + desc;
+ return port->chan * (rx_buffs + tx_buffs) + transmit * rx_buffs + desc;
}
static inline u16 desc_offset(port_t *port, u16 desc, int transmit)
{
- /* Descriptor offset always fits in 16 bytes */
+ /* Descriptor offset always fits in 16 bits */
return desc_abs_number(port, desc, transmit) * sizeof(pkt_desc);
}
static inline pkt_desc __iomem *desc_address(port_t *port, u16 desc,
int transmit)
{
- return (pkt_desc __iomem *)(winbase(port_to_card(port))
- + desc_offset(port, desc, transmit));
+ return (pkt_desc __iomem *)(port->card->rambase +
+ desc_offset(port, desc, transmit));
}
static inline u32 buffer_offset(port_t *port, u16 desc, int transmit)
{
- return port_to_card(port)->buff_offset +
+ return port->card->buff_offset +
desc_abs_number(port, desc, transmit) * (u32)HDLC_MAX_MRU;
}
static inline void sca_set_carrier(port_t *port)
{
- if (!(sca_in(get_msci(port) + ST3, port_to_card(port)) & ST3_DCD)) {
+ if (!(sca_in(get_msci(port) + ST3, port->card) & ST3_DCD)) {
#ifdef DEBUG_LINK
printk(KERN_DEBUG "%s: sca_set_carrier on\n",
- port_to_dev(port)->name);
+ port->netdev.name);
#endif
- netif_carrier_on(port_to_dev(port));
+ netif_carrier_on(port->netdev);
} else {
#ifdef DEBUG_LINK
printk(KERN_DEBUG "%s: sca_set_carrier off\n",
- port_to_dev(port)->name);
+ port->netdev.name);
#endif
- netif_carrier_off(port_to_dev(port));
+ netif_carrier_off(port->netdev);
}
}
static void sca_init_port(port_t *port)
{
- card_t *card = port_to_card(port);
+ card_t *card = port->card;
+ u16 dmac_rx = get_dmac_rx(port), dmac_tx = get_dmac_tx(port);
int transmit, i;
port->rxin = 0;
port->txlast = 0;
for (transmit = 0; transmit < 2; transmit++) {
- u16 dmac = transmit ? get_dmac_tx(port) : get_dmac_rx(port);
u16 buffs = transmit ? card->tx_ring_buffers
: card->rx_ring_buffers;
writew(0, &desc->len);
writeb(0, &desc->stat);
}
-
- /* DMA disable - to halt state */
- sca_out(0, transmit ? DSR_TX(phy_node(port)) :
- DSR_RX(phy_node(port)), card);
- /* software ABORT - to initial state */
- sca_out(DCR_ABORT, transmit ? DCR_TX(phy_node(port)) :
- DCR_RX(phy_node(port)), card);
-
- /* current desc addr */
- sca_outl(desc_offset(port, 0, transmit), dmac + CDAL, card);
- if (!transmit)
- sca_outl(desc_offset(port, buffs - 1, transmit),
- dmac + EDAL, card);
- else
- sca_outl(desc_offset(port, 0, transmit), dmac + EDAL,
- card);
-
- /* clear frame end interrupt counter */
- sca_out(DCR_CLEAR_EOF, transmit ? DCR_TX(phy_node(port)) :
- DCR_RX(phy_node(port)), card);
-
- if (!transmit) { /* Receive */
- /* set buffer length */
- sca_outw(HDLC_MAX_MRU, dmac + BFLL, card);
- /* Chain mode, Multi-frame */
- sca_out(0x14, DMR_RX(phy_node(port)), card);
- sca_out(DIR_EOME | DIR_BOFE, DIR_RX(phy_node(port)),
- card);
- /* DMA enable */
- sca_out(DSR_DE, DSR_RX(phy_node(port)), card);
- } else { /* Transmit */
- /* Chain mode, Multi-frame */
- sca_out(0x14, DMR_TX(phy_node(port)), card);
- /* enable underflow interrupts */
- sca_out(DIR_BOFE, DIR_TX(phy_node(port)), card);
- }
}
+
+ /* DMA disable - to halt state */
+ sca_out(0, DSR_RX(port->chan), card);
+ sca_out(0, DSR_TX(port->chan), card);
+
+ /* software ABORT - to initial state */
+ sca_out(DCR_ABORT, DCR_RX(port->chan), card);
+ sca_out(DCR_ABORT, DCR_TX(port->chan), card);
+
+ /* current desc addr */
+ sca_outl(desc_offset(port, 0, 0), dmac_rx + CDAL, card);
+ sca_outl(desc_offset(port, card->tx_ring_buffers - 1, 0),
+ dmac_rx + EDAL, card);
+ sca_outl(desc_offset(port, 0, 1), dmac_tx + CDAL, card);
+ sca_outl(desc_offset(port, 0, 1), dmac_tx + EDAL, card);
+
+ /* clear frame end interrupt counter */
+ sca_out(DCR_CLEAR_EOF, DCR_RX(port->chan), card);
+ sca_out(DCR_CLEAR_EOF, DCR_TX(port->chan), card);
+
+ /* Receive */
+ sca_outw(HDLC_MAX_MRU, dmac_rx + BFLL, card); /* set buffer length */
+ sca_out(0x14, DMR_RX(port->chan), card); /* Chain mode, Multi-frame */
+ sca_out(DIR_EOME, DIR_RX(port->chan), card); /* enable interrupts */
+ sca_out(DSR_DE, DSR_RX(port->chan), card); /* DMA enable */
+
+ /* Transmit */
+ sca_out(0x14, DMR_TX(port->chan), card); /* Chain mode, Multi-frame */
+ sca_out(DIR_EOME, DIR_TX(port->chan), card); /* enable interrupts */
+
sca_set_carrier(port);
- netif_napi_add(port_to_dev(port), &port->napi, sca_poll, NAPI_WEIGHT);
+ netif_napi_add(port->netdev, &port->napi, sca_poll, NAPI_WEIGHT);
}
static inline void sca_msci_intr(port_t *port)
{
u16 msci = get_msci(port);
- card_t* card = port_to_card(port);
- u8 stat = sca_in(msci + ST1, card); /* read MSCI ST1 status */
-
- /* Reset MSCI TX underrun and CDCD status bit */
- sca_out(stat & (ST1_UDRN | ST1_CDCD), msci + ST1, card);
+ card_t* card = port->card;
- if (stat & ST1_UDRN) {
- /* TX Underrun error detected */
- port_to_dev(port)->stats.tx_errors++;
- port_to_dev(port)->stats.tx_fifo_errors++;
- }
-
- if (stat & ST1_CDCD)
+ if (sca_in(msci + ST1, card) & ST1_CDCD) {
+ /* Reset MSCI CDCD status bit */
+ sca_out(ST1_CDCD, msci + ST1, card);
sca_set_carrier(port);
+ }
}
static inline void sca_rx(card_t *card, port_t *port, pkt_desc __iomem *desc,
u16 rxin)
{
- struct net_device *dev = port_to_dev(port);
+ struct net_device *dev = port->netdev;
struct sk_buff *skb;
u16 len;
u32 buff;
}
buff = buffer_offset(port, rxin, 0);
- memcpy_fromio(skb->data, winbase(card) + buff, len);
+ memcpy_fromio(skb->data, card->rambase + buff, len);
skb_put(skb, len);
#ifdef DEBUG_PKT
/* Receive DMA service */
static inline int sca_rx_done(port_t *port, int budget)
{
- struct net_device *dev = port_to_dev(port);
+ struct net_device *dev = port->netdev;
u16 dmac = get_dmac_rx(port);
- card_t *card = port_to_card(port);
- u8 stat = sca_in(DSR_RX(phy_node(port)), card); /* read DMA Status */
+ card_t *card = port->card;
+ u8 stat = sca_in(DSR_RX(port->chan), card); /* read DMA Status */
int received = 0;
/* Reset DSR status bits */
sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE,
- DSR_RX(phy_node(port)), card);
+ DSR_RX(port->chan), card);
if (stat & DSR_BOF)
/* Dropped one or more frames */
/* Set new error descriptor address */
sca_outl(desc_off, dmac + EDAL, card);
- port->rxin = next_desc(port, port->rxin, 0);
+ port->rxin = (port->rxin + 1) % card->rx_ring_buffers;
}
/* make sure RX DMA is enabled */
- sca_out(DSR_DE, DSR_RX(phy_node(port)), card);
+ sca_out(DSR_DE, DSR_RX(port->chan), card);
return received;
}
/* Transmit DMA service */
static inline void sca_tx_done(port_t *port)
{
- struct net_device *dev = port_to_dev(port);
- card_t* card = port_to_card(port);
+ struct net_device *dev = port->netdev;
+ card_t* card = port->card;
u8 stat;
spin_lock(&port->lock);
- stat = sca_in(DSR_TX(phy_node(port)), card); /* read DMA Status */
+ stat = sca_in(DSR_TX(port->chan), card); /* read DMA Status */
/* Reset DSR status bits */
sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE,
- DSR_TX(phy_node(port)), card);
+ DSR_TX(port->chan), card);
while (1) {
pkt_desc __iomem *desc = desc_address(port, port->txlast, 1);
+ u8 stat = readb(&desc->stat);
- if (!(readb(&desc->stat) & ST_TX_OWNRSHP))
+ if (!(stat & ST_TX_OWNRSHP))
break; /* not yet transmitted */
- dev->stats.tx_packets++;
- dev->stats.tx_bytes += readw(&desc->len);
+ if (stat & ST_TX_UNDRRUN) {
+ dev->stats.tx_errors++;
+ dev->stats.tx_fifo_errors++;
+ } else {
+ dev->stats.tx_packets++;
+ dev->stats.tx_bytes += readw(&desc->len);
+ }
writeb(0, &desc->stat); /* Free descriptor */
- port->txlast = next_desc(port, port->txlast, 1);
+ port->txlast = (port->txlast + 1) % card->tx_ring_buffers;
}
netif_wake_queue(dev);
static int sca_poll(struct napi_struct *napi, int budget)
{
port_t *port = container_of(napi, port_t, napi);
- u8 stat = sca_intr_status(port->card);
+ u32 isr0 = sca_inl(ISR0, port->card);
int received = 0;
- if (stat & SCA_INTR_MSCI(port->phy_node))
+ if (isr0 & (port->chan ? 0x08000000 : 0x00080000))
sca_msci_intr(port);
- if (stat & SCA_INTR_DMAC_TX(port->phy_node))
+ if (isr0 & (port->chan ? 0x00002000 : 0x00000020))
sca_tx_done(port);
- if (stat & SCA_INTR_DMAC_RX(port->phy_node))
+ if (isr0 & (port->chan ? 0x00000200 : 0x00000002))
received = sca_rx_done(port, budget);
if (received < budget) {
- netif_rx_complete(port->dev, napi);
+ napi_complete(napi);
enable_intr(port);
}
return received;
}
-static irqreturn_t sca_intr(int irq, void* dev_id)
+static irqreturn_t sca_intr(int irq, void *dev_id)
{
card_t *card = dev_id;
- int i;
- u8 stat = sca_intr_status(card);
- int handled = 0;
+ u32 isr0 = sca_inl(ISR0, card);
+ int i, handled = 0;
for (i = 0; i < 2; i++) {
port_t *port = get_port(card, i);
- if (port && (stat & (SCA_INTR_MSCI(i) | SCA_INTR_DMAC_RX(i) |
- SCA_INTR_DMAC_TX(i)))) {
+ if (port && (isr0 & (i ? 0x08002200 : 0x00080022))) {
handled = 1;
disable_intr(port);
- netif_rx_schedule(port->dev, &port->napi);
+ napi_schedule(&port->napi);
}
}
static void sca_set_port(port_t *port)
{
- card_t* card = port_to_card(port);
+ card_t* card = port->card;
u16 msci = get_msci(port);
u8 md2 = sca_in(msci + MD2, card);
unsigned int tmc, br = 10, brv = 1024;
static void sca_open(struct net_device *dev)
{
port_t *port = dev_to_port(dev);
- card_t* card = port_to_card(port);
+ card_t* card = port->card;
u16 msci = get_msci(port);
u8 md0, md2;
sca_out(0x3F, msci + TNR1, card); /* +1=TX DMA deactivation condition*/
/* We're using the following interrupts:
- - TXINT (DMAC completed all transmissions, underrun or DCD change)
- - all DMA interrupts
+ - RXINTA (DCD changes only)
+ - DMIB (EOM - single frame transfer complete)
*/
- /* MSCI TXINT and RXINTA interrupt enable */
- sca_outl(IE0_TXINT | IE0_RXINTA | IE0_UDRN | IE0_CDCD, msci + IE0,
- card);
+ sca_outl(IE0_RXINTA | IE0_CDCD, msci + IE0, card);
sca_out(port->tmc, msci + TMCR, card);
sca_out(port->tmc, msci + TMCT, card);
port_t *port = dev_to_port(dev);
/* reset channel */
- sca_out(CMD_RESET, get_msci(port) + CMD, port_to_card(port));
+ sca_out(CMD_RESET, get_msci(port) + CMD, port->card);
disable_intr(port);
napi_disable(&port->napi);
netif_stop_queue(dev);
static void sca_dump_rings(struct net_device *dev)
{
port_t *port = dev_to_port(dev);
- card_t *card = port_to_card(port);
+ card_t *card = port->card;
u16 cnt;
printk(KERN_DEBUG "RX ring: CDA=%u EDA=%u DSR=%02X in=%u %sactive",
sca_inl(get_dmac_rx(port) + CDAL, card),
sca_inl(get_dmac_rx(port) + EDAL, card),
- sca_in(DSR_RX(phy_node(port)), card), port->rxin,
- sca_in(DSR_RX(phy_node(port)), card) & DSR_DE ? "" : "in");
- for (cnt = 0; cnt < port_to_card(port)->rx_ring_buffers; cnt++)
+ sca_in(DSR_RX(port->chan), card), port->rxin,
+ sca_in(DSR_RX(port->chan), card) & DSR_DE ? "" : "in");
+ for (cnt = 0; cnt < port->card->rx_ring_buffers; cnt++)
printk(" %02X", readb(&(desc_address(port, cnt, 0)->stat)));
+ printk(KERN_CONT "\n");
- printk("\n" KERN_DEBUG "TX ring: CDA=%u EDA=%u DSR=%02X in=%u "
+ printk(KERN_DEBUG "TX ring: CDA=%u EDA=%u DSR=%02X in=%u "
"last=%u %sactive",
sca_inl(get_dmac_tx(port) + CDAL, card),
sca_inl(get_dmac_tx(port) + EDAL, card),
- sca_in(DSR_TX(phy_node(port)), card), port->txin, port->txlast,
- sca_in(DSR_TX(phy_node(port)), card) & DSR_DE ? "" : "in");
+ sca_in(DSR_TX(port->chan), card), port->txin, port->txlast,
+ sca_in(DSR_TX(port->chan), card) & DSR_DE ? "" : "in");
- for (cnt = 0; cnt < port_to_card(port)->tx_ring_buffers; cnt++)
+ for (cnt = 0; cnt < port->card->tx_ring_buffers; cnt++)
printk(" %02X", readb(&(desc_address(port, cnt, 1)->stat)));
printk("\n");
#endif /* DEBUG_RINGS */
-static int sca_xmit(struct sk_buff *skb, struct net_device *dev)
+static netdev_tx_t sca_xmit(struct sk_buff *skb, struct net_device *dev)
{
port_t *port = dev_to_port(dev);
- card_t *card = port_to_card(port);
+ card_t *card = port->card;
pkt_desc __iomem *desc;
u32 buff, len;
desc = desc_address(port, port->txin, 1);
buff = buffer_offset(port, port->txin, 1);
len = skb->len;
- memcpy_toio(winbase(card) + buff, skb->data, len);
+ memcpy_toio(card->rambase + buff, skb->data, len);
writew(len, &desc->len);
writeb(ST_TX_EOM, &desc->stat);
dev->trans_start = jiffies;
- port->txin = next_desc(port, port->txin, 1);
+ port->txin = (port->txin + 1) % card->tx_ring_buffers;
sca_outl(desc_offset(port, port->txin, 1),
get_dmac_tx(port) + EDAL, card);
- sca_out(DSR_DE, DSR_TX(phy_node(port)), card); /* Enable TX DMA */
+ sca_out(DSR_DE, DSR_TX(port->chan), card); /* Enable TX DMA */
desc = desc_address(port, port->txin + 1, 1);
if (readb(&desc->stat)) /* allow 1 packet gap */
spin_unlock_irq(&port->lock);
dev_kfree_skb(skb);
- return 0;
+ return NETDEV_TX_OK;
}