Merge branch 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

[safe/jmp/linux-2.6] / drivers / net / tg3.h

diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index e7916bd..8a16791 100644 (file)
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -4,6 +4,7 @@
  * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com)
  * Copyright (C) 2001 Jeff Garzik (jgarzik@pobox.com)
  * Copyright (C) 2004 Sun Microsystems Inc.
+ * Copyright (C) 2007-2010 Broadcom Corporation.
  */
 
 #ifndef _T3_H
@@ -46,10 +47,15 @@
 #define  TG3PCI_DEVICE_TIGON3_57788     0x1691
 #define  TG3PCI_DEVICE_TIGON3_5785_G    0x1699 /* GPHY */
 #define  TG3PCI_DEVICE_TIGON3_5785_F    0x16a0 /* 10/100 only */
-#define  TG3PCI_DEVICE_TIGON3_5717C     0x1655
-#define  TG3PCI_DEVICE_TIGON3_5717S     0x1656
-#define  TG3PCI_DEVICE_TIGON3_5718C     0x1665
-#define  TG3PCI_DEVICE_TIGON3_5718S     0x1666
+#define  TG3PCI_DEVICE_TIGON3_5717      0x1655
+#define  TG3PCI_DEVICE_TIGON3_5718      0x1656
+#define  TG3PCI_DEVICE_TIGON3_5724      0x165c
+#define  TG3PCI_DEVICE_TIGON3_57781     0x16b1
+#define  TG3PCI_DEVICE_TIGON3_57785     0x16b5
+#define  TG3PCI_DEVICE_TIGON3_57761     0x16b0
+#define  TG3PCI_DEVICE_TIGON3_57765     0x16b4
+#define  TG3PCI_DEVICE_TIGON3_57791     0x16b2
+#define  TG3PCI_DEVICE_TIGON3_57795     0x16b6
 /* 0x04 --> 0x64 unused */
 #define TG3PCI_MSI_DATA                        0x00000064
 /* 0x66 --> 0x68 unused */
@@ -123,6 +129,7 @@
 #define   ASIC_REV_5785                         0x5785
 #define   ASIC_REV_57780                0x57780
 #define   ASIC_REV_5717                         0x5717
+#define   ASIC_REV_57765                0x57785
 #define  GET_CHIP_REV(CHIP_REV_ID)     ((CHIP_REV_ID) >> 8)
 #define   CHIPREV_5700_AX               0x70
 #define   CHIPREV_5700_BX               0x71
@@ -142,8 +149,7 @@
 #define   METAL_REV_B1                  0x01
 #define   METAL_REV_B2                  0x02
 #define TG3PCI_DMA_RW_CTRL             0x0000006c
-#define  DMA_RWCTRL_MIN_DMA             0x000000ff
-#define  DMA_RWCTRL_MIN_DMA_SHIFT       0
+#define  DMA_RWCTRL_DIS_CACHE_ALIGNMENT  0x00000001
 #define  DMA_RWCTRL_READ_BNDRY_MASK     0x00000700
 #define  DMA_RWCTRL_READ_BNDRY_DISAB    0x00000000
 #define  DMA_RWCTRL_READ_BNDRY_16       0x00000100
@@ -222,6 +228,7 @@
 /* 0xc0 --> 0xf4 unused */
 
 #define TG3PCI_GEN2_PRODID_ASICREV     0x000000f4
+#define TG3PCI_GEN15_PRODID_ASICREV    0x000000fc
 /* 0xf8 --> 0x200 unused */
 
 #define TG3_CORR_ERR_STAT              0x00000110
@@ -243,7 +250,11 @@
 #define MAILBOX_GENERAL_7              0x00000258 /* 64-bit */
 #define MAILBOX_RELOAD_STAT            0x00000260 /* 64-bit */
 #define MAILBOX_RCV_STD_PROD_IDX       0x00000268 /* 64-bit */
+#define TG3_RX_STD_PROD_IDX_REG                (MAILBOX_RCV_STD_PROD_IDX + \
+                                        TG3_64BIT_REG_LOW)
 #define MAILBOX_RCV_JUMBO_PROD_IDX     0x00000270 /* 64-bit */
+#define TG3_RX_JMB_PROD_IDX_REG                (MAILBOX_RCV_JUMBO_PROD_IDX + \
+                                        TG3_64BIT_REG_LOW)
 #define MAILBOX_RCV_MINI_PROD_IDX      0x00000278 /* 64-bit */
 #define MAILBOX_RCVRET_CON_IDX_0       0x00000280 /* 64-bit */
 #define MAILBOX_RCVRET_CON_IDX_1       0x00000288 /* 64-bit */
@@ -1044,6 +1055,8 @@
 #define  CPMU_MUTEX_REQ_DRIVER          0x00001000
 #define TG3_CPMU_MUTEX_GNT             0x00003660
 #define  CPMU_MUTEX_GNT_DRIVER          0x00001000
+#define TG3_CPMU_PHY_STRAP             0x00003664
+#define TG3_CPMU_PHY_STRAP_IS_SERDES    0x00000020
 /* 0x3664 --> 0x3800 unused */
 
 /* Mbuf cluster free registers */
@@ -1811,6 +1824,11 @@
 
 #define TG3_OTP_DEFAULT                        0x286c1640
 
+
+/* Hardware Legacy NVRAM layout */
+#define TG3_NVM_VPD_OFF                        0x100
+#define TG3_NVM_VPD_LEN                        256
+
 /* Hardware Selfboot NVRAM layout */
 #define TG3_NVM_HWSB_CFG1              0x00000004
 #define  TG3_NVM_HWSB_CFG1_MAJMSK      0xf8000000
@@ -2439,10 +2457,6 @@ struct ring_info {
        DECLARE_PCI_UNMAP_ADDR(mapping)
 };
 
-struct tx_ring_info {
-       struct sk_buff                  *skb;
-};
-
 struct tg3_config_info {
        u32                             flags;
 };
@@ -2571,8 +2585,10 @@ struct tg3_ethtool_stats {
 };
 
 struct tg3_rx_prodring_set {
-       u32                             rx_std_ptr;
-       u32                             rx_jmb_ptr;
+       u32                             rx_std_prod_idx;
+       u32                             rx_std_cons_idx;
+       u32                             rx_jmb_prod_idx;
+       u32                             rx_jmb_cons_idx;
        struct tg3_rx_buffer_desc       *rx_std;
        struct tg3_ext_rx_buffer_desc   *rx_jmb;
        struct ring_info                *rx_std_buffers;
@@ -2600,10 +2616,11 @@ struct tg3_napi {
        u32                             consmbox;
        u32                             rx_rcb_ptr;
        u16                             *rx_rcb_prod_idx;
+       struct tg3_rx_prodring_set      *prodring;
 
        struct tg3_rx_buffer_desc       *rx_rcb;
        struct tg3_tx_buffer_desc       *tx_ring;
-       struct tx_ring_info             *tx_buffers;
+       struct ring_info                *tx_buffers;
 
        dma_addr_t                      status_mapping;
        dma_addr_t                      rx_rcb_mapping;
@@ -2683,7 +2700,7 @@ struct tg3 {
        struct vlan_group               *vlgrp;
 #endif
 
-       struct tg3_rx_prodring_set      prodring[1];
+       struct tg3_rx_prodring_set      prodring[TG3_IRQ_MAX_VECS - 1];
 
 
        /* begin "everything else" cacheline(s) section */
@@ -2790,9 +2807,11 @@ struct tg3 {
 #define TG3_FLG3_NO_NVRAM              0x00004000
 #define TG3_FLG3_PHY_IS_FET            0x00010000
 #define TG3_FLG3_ENABLE_RSS            0x00020000
+#define TG3_FLG3_ENABLE_TSS            0x00040000
 #define TG3_FLG3_4G_DMA_BNDRY_BUG      0x00080000
 #define TG3_FLG3_40BIT_DMA_LIMIT_BUG   0x00100000
 #define TG3_FLG3_SHORT_DMA_BUG         0x00200000
+#define TG3_FLG3_USE_JUMBO_BDFLAG      0x00400000
 
        struct timer_list               timer;
        u16                             timer_counter;
@@ -2882,8 +2901,9 @@ struct tg3 {
        u32                             led_ctrl;
        u32                             phy_otp;
 
-       char                            board_part_number[24];
-#define TG3_VER_SIZE 32
+#define TG3_BPN_SIZE                   24
+       char                            board_part_number[TG3_BPN_SIZE];
+#define TG3_VER_SIZE                   ETHTOOL_FWVERS_LEN
        char                            fw_ver[TG3_VER_SIZE];
        u32                             nic_sram_data_cfg;
        u32                             pci_clock_ctrl;