enum csr_regs {
B0_RAP = 0x0000,
B0_CTST = 0x0004,
- B0_Y2LED = 0x0005,
+
B0_POWER_CTRL = 0x0007,
B0_ISRC = 0x0008,
B0_IMSK = 0x000c,
Y2_CFG_AER = 0x1d00, /* PCI Advanced Error Report region */
};
-/* B0_CTST 16 bit Control/Status register */
+/* B0_CTST 24 bit Control/Status register */
enum {
Y2_VMAIN_AVAIL = 1<<17,/* VMAIN available (YUKON-2 only) */
Y2_VAUX_AVAIL = 1<<16,/* VAUX available (YUKON-2 only) */
CS_RST_SET = 1, /* Set Software reset */
};
-/* B0_LED 8 Bit LED register */
-enum {
-/* Bit 7.. 2: reserved */
- LED_STAT_ON = 1<<1, /* Status LED on */
- LED_STAT_OFF = 1, /* Status LED off */
-};
-
/* B0_POWER_CTRL 8 Bit Power Control reg (YUKON only) */
enum {
PC_VAUX_ENA = 1<<7, /* Switch VAUX Enable */
struct tx_ring_info {
struct sk_buff *skb;
+ unsigned long flags;
+#define TX_MAP_SINGLE 0x0001
+#define TX_MAP_PAGE 000002
DECLARE_PCI_UNMAP_ADDR(mapaddr);
DECLARE_PCI_UNMAP_LEN(maplen);
};
struct tx_ring_info *tx_ring;
struct sky2_tx_le *tx_le;
+ u16 tx_ring_size;
u16 tx_cons; /* next le to check */
u16 tx_prod; /* next le to use */
u16 tx_next; /* debug only */
u16 rx_pending;
u16 rx_data_size;
u16 rx_nfrags;
- struct sk_buff_head rx_recycle;
#ifdef SKY2_VLAN_TAG_USED
u16 rx_tag;
struct timer_list watchdog_timer;
struct work_struct restart_work;
wait_queue_head_t msi_wait;
+
+ char irq_name[0];
};
static inline int sky2_is_copper(const struct sky2_hw *hw)