BMU_CLR_RESET = BMU_FIFO_RST | BMU_OP_OFF | BMU_RST_CLR,
BMU_OPER_INIT = BMU_CLR_IRQ_PAR | BMU_CLR_IRQ_CHK | BMU_START |
BMU_FIFO_ENA | BMU_OP_ON,
+
+ BMU_WM_DEFAULT = 0x600,
};
/* Tx BMU Control / Status Registers (Yukon-2) */
*/
struct sky2_tx_le {
union {
- u32 addr;
+ __le32 addr;
struct {
- u16 offset;
- u16 start;
+ __le16 offset;
+ __le16 start;
} csum __attribute((packed));
struct {
- u16 size;
- u16 rsvd;
+ __le16 size;
+ __le16 rsvd;
} tso __attribute((packed));
} tx;
- u16 length; /* also vlan tag or checksum start */
+ __le16 length; /* also vlan tag or checksum start */
u8 ctrl;
u8 opcode;
} __attribute((packed));
struct sky2_rx_le {
- u32 addr;
- u16 length;
+ __le32 addr;
+ __le16 length;
u8 ctrl;
u8 opcode;
} __attribute((packed));;
struct sky2_status_le {
- u32 status; /* also checksum */
- u16 length; /* also vlan tag */
+ __le32 status; /* also checksum */
+ __le16 length; /* also vlan tag */
u8 link;
u8 opcode;
} __attribute((packed));
+struct tx_ring_info {
+ struct sk_buff *skb;
+ DECLARE_PCI_UNMAP_ADDR(mapaddr);
+ u16 idx;
+};
+
struct ring_info {
struct sk_buff *skb;
dma_addr_t mapaddr;
- u16 maplen;
- u16 idx;
};
struct sky2_port {
unsigned port;
u32 msg_enable;
- struct ring_info *tx_ring;
+ spinlock_t tx_lock ____cacheline_aligned_in_smp;
+ struct tx_ring_info *tx_ring;
struct sky2_tx_le *tx_le;
- spinlock_t tx_lock;
- u32 tx_addr64;
u16 tx_cons; /* next le to check */
u16 tx_prod; /* next le to use */
+ u32 tx_addr64;
u16 tx_pending;
u16 tx_last_put;
u16 tx_last_mss;
- struct ring_info *rx_ring;
+ struct ring_info *rx_ring ____cacheline_aligned_in_smp;
struct sky2_rx_le *rx_le;
u32 rx_addr64;
u16 rx_next; /* next re to check */
u16 rx_put; /* next le index to use */
u16 rx_pending;
u16 rx_last_put;
+ u16 rx_bufsize;
#ifdef SKY2_VLAN_TAG_USED
u16 rx_tag;
struct vlan_group *vlgrp;
u8 rx_csum;
u8 wol;
- struct tasklet_struct phy_task;
struct net_device_stats net_stats;
+
+ struct work_struct phy_task;
+ struct semaphore phy_sema;
};
struct sky2_hw {
struct sky2_status_le *st_le;
u32 st_idx;
dma_addr_t st_dma;
-
- spinlock_t phy_lock;
};
/* Register accessor for memory mapped device */