mmc: s3c6410: add new quirk in sdhci driver and update ADMA descriptor build

[safe/jmp/linux-2.6] / drivers / net / sky2.h

diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index 1c4d6a3..084eff2 100644 (file)
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -548,6 +548,14 @@ enum {
        CHIP_ID_YUKON_UL_2 = 0xba, /* YUKON-2 Ultra 2 */
        CHIP_ID_YUKON_OPT  = 0xbc, /* YUKON-2 Optima */
 };
+
+enum yukon_xl_rev {
+       CHIP_REV_YU_XL_A0  = 0,
+       CHIP_REV_YU_XL_A1  = 1,
+       CHIP_REV_YU_XL_A2  = 2,
+       CHIP_REV_YU_XL_A3  = 3,
+};
+
 enum yukon_ec_rev {
        CHIP_REV_YU_EC_A1    = 0,  /* Chip Rev. for Yukon-EC A1/A0 */
        CHIP_REV_YU_EC_A2    = 1,  /* Chip Rev. for Yukon-EC A2 */
@@ -686,8 +694,21 @@ enum {
        TXA_CTRL        = 0x0210,/*  8 bit      Tx Arbiter Control Register */
        TXA_TEST        = 0x0211,/*  8 bit      Tx Arbiter Test Register */
        TXA_STAT        = 0x0212,/*  8 bit      Tx Arbiter Status Register */
+
+       RSS_KEY         = 0x0220, /* RSS Key setup */
+       RSS_CFG         = 0x0248, /* RSS Configuration */
 };
 
+enum {
+       HASH_TCP_IPV6_EX_CTRL   = 1<<5,
+       HASH_IPV6_EX_CTRL       = 1<<4,
+       HASH_TCP_IPV6_CTRL      = 1<<3,
+       HASH_IPV6_CTRL          = 1<<2,
+       HASH_TCP_IPV4_CTRL      = 1<<1,
+       HASH_IPV4_CTRL          = 1<<0,
+
+       HASH_ALL                = 0x3f,
+};
 
 enum {
        B6_EXT_REG      = 0x0300,/* External registers (GENESIS only) */
@@ -2161,14 +2182,14 @@ struct tx_ring_info {
        unsigned long flags;
 #define TX_MAP_SINGLE   0x0001
 #define TX_MAP_PAGE     0x0002
-       DECLARE_PCI_UNMAP_ADDR(mapaddr);
-       DECLARE_PCI_UNMAP_LEN(maplen);
+       DEFINE_DMA_UNMAP_ADDR(mapaddr);
+       DEFINE_DMA_UNMAP_LEN(maplen);
 };
 
 struct rx_ring_info {
        struct sk_buff  *skb;
        dma_addr_t      data_addr;
-       DECLARE_PCI_UNMAP_LEN(data_size);
+       DEFINE_DMA_UNMAP_LEN(data_size);
        dma_addr_t      frag_addr[ETH_JUMBO_MTU >> PAGE_SHIFT];
 };
 
@@ -2253,6 +2274,7 @@ struct sky2_hw {
 #define SKY2_HW_NEW_LE         0x00000020      /* new LSOv2 format */
 #define SKY2_HW_AUTO_TX_SUM    0x00000040      /* new IP decode for Tx */
 #define SKY2_HW_ADV_POWER_CTL  0x00000080      /* additional PHY power regs */
+#define SKY2_HW_RSS_BROKEN     0x00000100
 
        u8                   chip_id;
        u8                   chip_rev;
@@ -2260,6 +2282,7 @@ struct sky2_hw {
        u8                   ports;
 
        struct sky2_status_le *st_le;
+       u32                  st_size;
        u32                  st_idx;
        dma_addr_t           st_dma;