rt2x00: Remove unused variable frame_control from rt2x00mac_tx.

[safe/jmp/linux-2.6] / drivers / net / sky2.c

diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 70524f2..a3d9991 100644 (file)
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -50,7 +50,7 @@
 #include "sky2.h"
 
 #define DRV_NAME               "sky2"
-#define DRV_VERSION            "1.25"
+#define DRV_VERSION            "1.26"
 #define PFX                    DRV_NAME " "
 
 /*
@@ -140,6 +140,7 @@ static DEFINE_PCI_DEVICE_TABLE(sky2_id_table) = {
        { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */
        { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */
        { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4380) }, /* 88E8057 */
+       { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4381) }, /* 88E8059 */
        { 0 }
 };
 
@@ -603,6 +604,16 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
                /* apply workaround for integrated resistors calibration */
                gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17);
                gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60);
+       } else if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) {
+               /* apply fixes in PHY AFE */
+               gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff);
+
+               /* apply RDAC termination workaround */
+               gm_phy_write(hw, port, 24, 0x2800);
+               gm_phy_write(hw, port, 23, 0x2001);
+
+               /* set page register back to 0 */
+               gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
        } else if (hw->chip_id != CHIP_ID_YUKON_EX &&
                   hw->chip_id < CHIP_ID_YUKON_SUPR) {
                /* no effect on Yukon-XL */
@@ -787,8 +798,7 @@ static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
 
        if ( (hw->chip_id == CHIP_ID_YUKON_EX &&
              hw->chip_rev != CHIP_REV_YU_EX_A0) ||
-            hw->chip_id == CHIP_ID_YUKON_FE_P ||
-            hw->chip_id == CHIP_ID_YUKON_SUPR) {
+            hw->chip_id >= CHIP_ID_YUKON_FE_P) {
                /* Yukon-Extreme B0 and further Extreme devices */
                /* enable Store & Forward mode for TX */
 
@@ -1404,6 +1414,31 @@ static int sky2_rx_start(struct sky2_port *sky2)
 
        /* Tell chip about available buffers */
        sky2_rx_update(sky2, rxq);
+
+       if (hw->chip_id == CHIP_ID_YUKON_EX ||
+           hw->chip_id == CHIP_ID_YUKON_SUPR) {
+               /*
+                * Disable flushing of non ASF packets;
+                * must be done after initializing the BMUs;
+                * drivers without ASF support should do this too, otherwise
+                * it may happen that they cannot run on ASF devices;
+                * remember that the MAC FIFO isn't reset during initialization.
+                */
+               sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_MACSEC_FLUSH_OFF);
+       }
+
+       if (hw->chip_id >= CHIP_ID_YUKON_SUPR) {
+               /* Enable RX Home Address & Routing Header checksum fix */
+               sky2_write16(hw, SK_REG(sky2->port, RX_GMF_FL_CTRL),
+                            RX_IPV6_SA_MOB_ENA | RX_IPV6_DA_MOB_ENA);
+
+               /* Enable TX Home Address & Routing Header checksum fix */
+               sky2_write32(hw, Q_ADDR(txqaddr[sky2->port], Q_TEST),
+                            TBMU_TEST_HOME_ADD_FIX_EN | TBMU_TEST_ROUTING_ADD_FIX_EN);
+       }
+
+
+
        return 0;
 nomem:
        sky2_rx_clean(sky2);
@@ -2103,6 +2138,25 @@ out:
        spin_unlock(&sky2->phy_lock);
 }
 
+/* Special quick link interrupt (Yukon-2 Optima only) */
+static void sky2_qlink_intr(struct sky2_hw *hw)
+{
+       struct sky2_port *sky2 = netdev_priv(hw->dev[0]);
+       u32 imask;
+       u16 phy;
+
+       /* disable irq */
+       imask = sky2_read32(hw, B0_IMSK);
+       imask &= ~Y2_IS_PHY_QLNK;
+       sky2_write32(hw, B0_IMSK, imask);
+
+       /* reset PHY Link Detect */
+       phy = sky2_pci_read16(hw, PSM_CONFIG_REG4);
+       sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1);
+
+       sky2_link_up(sky2);
+}
+
 /* Transmit timeout is only called if we are running, carrier is up
  * and tx queue is full (stopped).
  */
@@ -2772,6 +2826,9 @@ static int sky2_poll(struct napi_struct *napi, int work_limit)
        if (status & Y2_IS_IRQ_PHY2)
                sky2_phy_intr(hw, 1);
 
+       if (status & Y2_IS_PHY_QLNK)
+               sky2_qlink_intr(hw);
+
        while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) {
                work_done += sky2_status_intr(hw, work_limit - work_done, idx);
 
@@ -2821,6 +2878,7 @@ static u32 sky2_mhz(const struct sky2_hw *hw)
        case CHIP_ID_YUKON_EX:
        case CHIP_ID_YUKON_SUPR:
        case CHIP_ID_YUKON_UL_2:
+       case CHIP_ID_YUKON_OPT:
                return 125;
 
        case CHIP_ID_YUKON_FE:
@@ -2910,6 +2968,7 @@ static int __devinit sky2_init(struct sky2_hw *hw)
                break;
 
        case CHIP_ID_YUKON_UL_2:
+       case CHIP_ID_YUKON_OPT:
                hw->flags = SKY2_HW_GIGABIT
                        | SKY2_HW_ADV_POWER_CTL;
                break;
@@ -2992,6 +3051,52 @@ static void sky2_reset(struct sky2_hw *hw)
                        sky2_write16(hw, SK_REG(i, GMAC_CTRL),
                                     GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON
                                     | GMC_BYP_RETR_ON);
+
+       }
+
+       if (hw->chip_id == CHIP_ID_YUKON_SUPR && hw->chip_rev > CHIP_REV_YU_SU_B0) {
+               /* enable MACSec clock gating */
+               sky2_pci_write32(hw, PCI_DEV_REG3, P_CLK_MACSEC_DIS);
+       }
+
+       if (hw->chip_id == CHIP_ID_YUKON_OPT) {
+               u16 reg;
+               u32 msk;
+
+               if (hw->chip_rev == 0) {
+                       /* disable PCI-E PHY power down (set PHY reg 0x80, bit 7 */
+                       sky2_write32(hw, Y2_PEX_PHY_DATA, (0x80UL << 16) | (1 << 7));
+
+                       /* set PHY Link Detect Timer to 1.1 second (11x 100ms) */
+                       reg = 10;
+               } else {
+                       /* set PHY Link Detect Timer to 0.4 second (4x 100ms) */
+                       reg = 3;
+               }
+
+               reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE;
+
+               /* reset PHY Link Detect */
+               sky2_pci_write16(hw, PSM_CONFIG_REG4,
+                                reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT);
+               sky2_pci_write16(hw, PSM_CONFIG_REG4, reg);
+
+
+               /* enable PHY Quick Link */
+               msk = sky2_read32(hw, B0_IMSK);
+               msk |= Y2_IS_PHY_QLNK;
+               sky2_write32(hw, B0_IMSK, msk);
+
+               /* check if PSMv2 was running before */
+               reg = sky2_pci_read16(hw, PSM_CONFIG_REG3);
+               if (reg & PCI_EXP_LNKCTL_ASPMC) {
+                       int cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
+                       /* restore the PCIe Link Control register */
+                       sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg);
+               }
+
+               /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */
+               sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16));
        }
 
        /* Clear I2C IRQ noise */
@@ -4412,9 +4517,11 @@ static const char *sky2_name(u8 chipid, char *buf, int sz)
                "FE+",          /* 0xb8 */
                "Supreme",      /* 0xb9 */
                "UL 2",         /* 0xba */
+               "Unknown",      /* 0xbb */
+               "Optima",       /* 0xbc */
        };
 
-       if (chipid >= CHIP_ID_YUKON_XL && chipid < CHIP_ID_YUKON_UL_2)
+       if (chipid >= CHIP_ID_YUKON_XL && chipid < CHIP_ID_YUKON_OPT)
                strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz);
        else
                snprintf(buf, sz, "(chip %#x)", chipid);
@@ -4544,6 +4651,8 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
                goto err_out_free_netdev;
        }
 
+       netif_carrier_off(dev);
+
        netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT);
 
        err = request_irq(pdev->irq, sky2_intr,