static u32 ql_disable_completion_interrupt(struct ql_adapter *qdev, u32 intr)
{
u32 var = 0;
- unsigned long hw_flags;
struct intr_context *ctx;
/* HW disables for us if we're MSIX multi interrupts and
return 0;
ctx = qdev->intr_context + intr;
- spin_lock_irqsave(&qdev->hw_lock, hw_flags);
+ spin_lock(&qdev->hw_lock);
if (!atomic_read(&ctx->irq_cnt)) {
ql_write32(qdev, INTR_EN,
ctx->intr_dis_mask);
var = ql_read32(qdev, STS);
}
atomic_inc(&ctx->irq_cnt);
- spin_unlock_irqrestore(&qdev->hw_lock, hw_flags);
+ spin_unlock(&qdev->hw_lock);
return var;
}
int status;
__le32 *p = (__le32 *)&qdev->flash;
u32 offset;
+ u8 mac_addr[6];
/* Get flash offset for function and adjust
* for dword access.
*/
- if (!qdev->func)
+ if (!qdev->port)
offset = FUNC0_FLASH_OFFSET / sizeof(u32);
else
offset = FUNC1_FLASH_OFFSET / sizeof(u32);
goto exit;
}
- if (!is_valid_ether_addr(qdev->flash.flash_params_8000.mac_addr)) {
+ /* Extract either manufacturer or BOFM modified
+ * MAC address.
+ */
+ if (qdev->flash.flash_params_8000.data_type1 == 2)
+ memcpy(mac_addr,
+ qdev->flash.flash_params_8000.mac_addr1,
+ qdev->ndev->addr_len);
+ else
+ memcpy(mac_addr,
+ qdev->flash.flash_params_8000.mac_addr,
+ qdev->ndev->addr_len);
+
+ if (!is_valid_ether_addr(mac_addr)) {
QPRINTK(qdev, IFUP, ERR, "Invalid MAC address.\n");
status = -EINVAL;
goto exit;
}
memcpy(qdev->ndev->dev_addr,
- qdev->flash.flash_params_8000.mac_addr,
+ mac_addr,
qdev->ndev->addr_len);
exit:
/* Second function's parameters follow the first
* function's.
*/
- if (qdev->func)
+ if (qdev->port)
offset = size;
if (ql_sem_spinlock(qdev, SEM_FLASH_MASK))
static int ql_8000_port_initialize(struct ql_adapter *qdev)
{
int status;
+ /*
+ * Get MPI firmware version for driver banner
+ * and ethool info.
+ */
+ status = ql_mb_about_fw(qdev);
+ if (status)
+ goto exit;
status = ql_mb_get_fw_state(qdev);
if (status)
goto exit;
{
struct net_device *ndev = qdev->ndev;
struct sk_buff *skb = NULL;
+ u16 vlan_id = (le16_to_cpu(ib_mac_rsp->vlan_id) &
+ IB_MAC_IOCB_RSP_VLAN_MASK)
QL_DUMP_IB_MAC_RSP(ib_mac_rsp);
return;
}
+ /* Frame error, so drop the packet. */
+ if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) {
+ QPRINTK(qdev, DRV, ERR, "Receive error, flags2 = 0x%x\n",
+ ib_mac_rsp->flags2);
+ dev_kfree_skb_any(skb);
+ return;
+ }
+
+ /* The max framesize filter on this chip is set higher than
+ * MTU since FCoE uses 2k frames.
+ */
+ if (skb->len > ndev->mtu + ETH_HLEN) {
+ dev_kfree_skb_any(skb);
+ return;
+ }
+
prefetch(skb->data);
skb->dev = ndev;
if (ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) {
QPRINTK(qdev, RX_STATUS, DEBUG, "Promiscuous Packet.\n");
}
-
skb->protocol = eth_type_trans(skb, ndev);
skb->ip_summed = CHECKSUM_NONE;
* csum or frame errors.
*/
if (qdev->rx_csum &&
- !(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) &&
!(ib_mac_rsp->flags1 & IB_MAC_CSUM_ERR_MASK)) {
/* TCP frame. */
if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T) {
qdev->stats.rx_packets++;
qdev->stats.rx_bytes += skb->len;
- skb_record_rx_queue(skb, rx_ring - &qdev->rx_ring[0]);
- if (qdev->vlgrp && (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_V)) {
- QPRINTK(qdev, RX_STATUS, DEBUG,
- "Passing a VLAN packet upstream.\n");
- vlan_hwaccel_receive_skb(skb, qdev->vlgrp,
- le16_to_cpu(ib_mac_rsp->vlan_id));
+ skb_record_rx_queue(skb,
+ rx_ring->cq_id - qdev->rss_ring_first_cq_id);
+ if (skb->ip_summed == CHECKSUM_UNNECESSARY) {
+ if (qdev->vlgrp &&
+ (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_V) &&
+ (vlan_id != 0))
+ vlan_gro_receive(&rx_ring->napi, qdev->vlgrp,
+ vlan_id, skb);
+ else
+ napi_gro_receive(&rx_ring->napi, skb);
} else {
- QPRINTK(qdev, RX_STATUS, DEBUG,
- "Passing a normal packet upstream.\n");
- netif_receive_skb(skb);
+ if (qdev->vlgrp &&
+ (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_V) &&
+ (vlan_id != 0))
+ vlan_hwaccel_receive_skb(skb, qdev->vlgrp, vlan_id);
+ else
+ netif_receive_skb(skb);
}
}
/* Fire up a handler to reset the MPI processor. */
void ql_queue_fw_error(struct ql_adapter *qdev)
{
- netif_stop_queue(qdev->ndev);
netif_carrier_off(qdev->ndev);
queue_delayed_work(qdev->workqueue, &qdev->mpi_reset_work, 0);
}
void ql_queue_asic_error(struct ql_adapter *qdev)
{
- netif_stop_queue(qdev->ndev);
netif_carrier_off(qdev->ndev);
ql_disable_interrupts(qdev);
/* Clear adapter up bit to signal the recovery
struct ob_mac_iocb_rsp *net_rsp = NULL;
int count = 0;
+ struct tx_ring *tx_ring;
/* While there are entries in the completion queue. */
while (prod != rx_ring->cnsmr_idx) {
prod = ql_read_sh_reg(rx_ring->prod_idx_sh_reg);
}
ql_write_cq_idx(rx_ring);
- if (netif_queue_stopped(qdev->ndev) && net_rsp != NULL) {
- struct tx_ring *tx_ring = &qdev->tx_ring[net_rsp->txq_idx];
+ tx_ring = &qdev->tx_ring[net_rsp->txq_idx];
+ if (__netif_subqueue_stopped(qdev->ndev, tx_ring->wq_id) &&
+ net_rsp != NULL) {
if (atomic_read(&tx_ring->queue_stopped) &&
(atomic_read(&tx_ring->tx_count) > (tx_ring->wq_len / 4)))
/*
* The queue got stopped because the tx_ring was full.
* Wake it up, because it's now at least 25% empty.
*/
- netif_wake_queue(qdev->ndev);
+ netif_wake_subqueue(qdev->ndev, tx_ring->wq_id);
}
return count;
rx_ring->cq_id);
if (work_done < budget) {
- __napi_complete(napi);
+ napi_complete(napi);
ql_enable_completion_interrupt(qdev, rx_ring->irq);
}
return work_done;
struct ql_adapter *qdev = netdev_priv(ndev);
int tso;
struct tx_ring *tx_ring;
- u32 tx_ring_idx = (u32) QL_TXQ_IDX(qdev, skb);
+ u32 tx_ring_idx = (u32) skb->queue_mapping;
tx_ring = &qdev->tx_ring[tx_ring_idx];
+ if (skb_padto(skb, ETH_ZLEN))
+ return NETDEV_TX_OK;
+
if (unlikely(atomic_read(&tx_ring->tx_count) < 2)) {
QPRINTK(qdev, TX_QUEUED, INFO,
"%s: shutting down tx queue %d du to lack of resources.\n",
__func__, tx_ring_idx);
- netif_stop_queue(ndev);
+ netif_stop_subqueue(ndev, tx_ring->wq_id);
atomic_inc(&tx_ring->queue_stopped);
return NETDEV_TX_BUSY;
}
wmb();
ql_write_db_reg(tx_ring->prod_idx, tx_ring->prod_idx_db_reg);
- ndev->trans_start = jiffies;
QPRINTK(qdev, TX_QUEUED, DEBUG, "tx queued, slot %d, len %d\n",
tx_ring->prod_idx, skb->len);
"Allocation of RX shadow space failed.\n");
return -ENOMEM;
}
+ memset(qdev->rx_ring_shadow_reg_area, 0, PAGE_SIZE);
qdev->tx_ring_shadow_reg_area =
pci_alloc_consistent(qdev->pdev, PAGE_SIZE,
&qdev->tx_ring_shadow_reg_dma);
"Allocation of TX shadow space failed.\n");
goto err_wqp_sh_area;
}
+ memset(qdev->tx_ring_shadow_reg_area, 0, PAGE_SIZE);
return 0;
err_wqp_sh_area:
&tx_ring->wq_base_dma);
if ((tx_ring->wq_base == NULL)
- || tx_ring->wq_base_dma & (tx_ring->wq_size - 1)) {
+ || tx_ring->wq_base_dma & WQ_ADDR_ALIGN) {
QPRINTK(qdev, IFUP, ERR, "tx_ring alloc failed.\n");
return -ENOMEM;
}
qdev->doorbell_area + (DB_PAGE_SIZE * (128 + rx_ring->cq_id));
int err = 0;
u16 bq_len;
+ u64 tmp;
/* Set up the shadow registers for this ring. */
rx_ring->prod_idx_sh_reg = shadow_reg;
FLAGS_LI; /* Load irq delay values */
if (rx_ring->lbq_len) {
cqicb->flags |= FLAGS_LL; /* Load lbq values */
- *((u64 *) rx_ring->lbq_base_indirect) = rx_ring->lbq_base_dma;
+ tmp = (u64)rx_ring->lbq_base_dma;;
+ *((__le64 *) rx_ring->lbq_base_indirect) = cpu_to_le64(tmp);
cqicb->lbq_addr =
cpu_to_le64(rx_ring->lbq_base_indirect_dma);
bq_len = (rx_ring->lbq_buf_size == 65536) ? 0 :
}
if (rx_ring->sbq_len) {
cqicb->flags |= FLAGS_LS; /* Load sbq values */
- *((u64 *) rx_ring->sbq_base_indirect) = rx_ring->sbq_base_dma;
+ tmp = (u64)rx_ring->sbq_base_dma;;
+ *((__le64 *) rx_ring->sbq_base_indirect) = cpu_to_le64(tmp);
cqicb->sbq_addr =
cpu_to_le64(rx_ring->sbq_base_indirect_dma);
cqicb->sbq_buf_size =
- cpu_to_le16(((rx_ring->sbq_buf_size / 2) + 8) & 0xfffffff8);
+ cpu_to_le16((u16)(rx_ring->sbq_buf_size/2));
bq_len = (rx_ring->sbq_len == 65536) ? 0 :
(u16) rx_ring->sbq_len;
cqicb->sbq_len = cpu_to_le16(bq_len);
mask = value << 16;
ql_write32(qdev, SYS, mask | value);
- /* Set the default queue. */
- value = NIC_RCV_CFG_DFQ;
- mask = NIC_RCV_CFG_DFQ_MASK;
+ /* Set the default queue, and VLAN behavior. */
+ value = NIC_RCV_CFG_DFQ | NIC_RCV_CFG_RV;
+ mask = NIC_RCV_CFG_DFQ_MASK | (NIC_RCV_CFG_RV << 16);
ql_write32(qdev, NIC_RCV_CFG, (mask | value));
/* Set the MPI interrupt to enabled. */
struct ql_adapter *qdev = (struct ql_adapter *)netdev_priv(ndev);
QPRINTK(qdev, PROBE, INFO,
- "Function #%d, NIC Roll %d, NIC Rev = %d, "
+ "Function #%d, Port %d, NIC Roll %d, NIC Rev = %d, "
"XG Roll = %d, XG Rev = %d.\n",
qdev->func,
+ qdev->port,
qdev->chip_rev_id & 0x0000000f,
qdev->chip_rev_id >> 4 & 0x0000000f,
qdev->chip_rev_id >> 8 & 0x0000000f,
static int ql_adapter_down(struct ql_adapter *qdev)
{
- struct net_device *ndev = qdev->ndev;
int i, status = 0;
struct rx_ring *rx_ring;
- netif_stop_queue(ndev);
- netif_carrier_off(ndev);
+ netif_carrier_off(qdev->ndev);
/* Don't kill the reset worker thread if we
* are in the process of recovery.
ql_tx_ring_clean(qdev);
+ /* Call netif_napi_del() from common point.
+ */
+ for (i = qdev->rss_ring_first_cq_id; i < qdev->rx_ring_count; i++)
+ netif_napi_del(&qdev->rx_ring[i].napi);
+
ql_free_rx_buffers(qdev);
+
spin_lock(&qdev->hw_lock);
status = ql_adapter_reset(qdev);
if (status)
{
int err = 0;
- spin_lock(&qdev->hw_lock);
err = ql_adapter_initialize(qdev);
if (err) {
QPRINTK(qdev, IFUP, INFO, "Unable to initialize adapter.\n");
- spin_unlock(&qdev->hw_lock);
goto err_init;
}
- spin_unlock(&qdev->hw_lock);
set_bit(QL_ADAPTER_UP, &qdev->flags);
ql_alloc_rx_buffers(qdev);
+ if ((ql_read32(qdev, STS) & qdev->port_init))
+ netif_carrier_on(qdev->ndev);
ql_enable_interrupts(qdev);
ql_enable_all_completion_interrupts(qdev);
- if ((ql_read32(qdev, STS) & qdev->port_init)) {
- netif_carrier_on(qdev->ndev);
- netif_start_queue(qdev->ndev);
- }
+ netif_tx_start_all_queues(qdev->ndev);
return 0;
err_init:
.port_initialize = ql_8000_port_initialize,
};
+/* Find the pcie function number for the other NIC
+ * on this chip. Since both NIC functions share a
+ * common firmware we have the lowest enabled function
+ * do any common work. Examples would be resetting
+ * after a fatal firmware error, or doing a firmware
+ * coredump.
+ */
+static int ql_get_alt_pcie_func(struct ql_adapter *qdev)
+{
+ int status = 0;
+ u32 temp;
+ u32 nic_func1, nic_func2;
+
+ status = ql_read_mpi_reg(qdev, MPI_TEST_FUNC_PORT_CFG,
+ &temp);
+ if (status)
+ return status;
+
+ nic_func1 = ((temp >> MPI_TEST_NIC1_FUNC_SHIFT) &
+ MPI_TEST_NIC_FUNC_MASK);
+ nic_func2 = ((temp >> MPI_TEST_NIC2_FUNC_SHIFT) &
+ MPI_TEST_NIC_FUNC_MASK);
+
+ if (qdev->func == nic_func1)
+ qdev->alt_func = nic_func2;
+ else if (qdev->func == nic_func2)
+ qdev->alt_func = nic_func1;
+ else
+ status = -EIO;
-static void ql_get_board_info(struct ql_adapter *qdev)
+ return status;
+}
+
+static int ql_get_board_info(struct ql_adapter *qdev)
{
+ int status;
qdev->func =
(ql_read32(qdev, STS) & STS_FUNC_ID_MASK) >> STS_FUNC_ID_SHIFT;
- if (qdev->func) {
+ if (qdev->func > 3)
+ return -EIO;
+
+ status = ql_get_alt_pcie_func(qdev);
+ if (status)
+ return status;
+
+ qdev->port = (qdev->func < qdev->alt_func) ? 0 : 1;
+ if (qdev->port) {
qdev->xg_sem_mask = SEM_XGMAC1_MASK;
qdev->port_link_up = STS_PL1;
qdev->port_init = STS_PI1;
qdev->nic_ops = &qla8012_nic_ops;
else if (qdev->device_id == QLGE_DEVICE_ID_8000)
qdev->nic_ops = &qla8000_nic_ops;
+ return status;
}
static void ql_release_all(struct pci_dev *pdev)
}
pci_set_master(pdev);
- if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
+ if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
set_bit(QL_DMA64, &qdev->flags);
- err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
+ err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
} else {
- err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
+ err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
if (!err)
- err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
+ err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
}
if (err) {
qdev->ndev = ndev;
qdev->pdev = pdev;
- ql_get_board_info(qdev);
+ err = ql_get_board_info(qdev);
+ if (err) {
+ dev_err(&pdev->dev, "Register access failed.\n");
+ err = -EIO;
+ goto err_out;
+ }
qdev->msg_enable = netif_msg_init(debug, default_msg);
spin_lock_init(&qdev->hw_lock);
spin_lock_init(&qdev->stats_lock);
static int cards_found = 0;
int err = 0;
- ndev = alloc_etherdev(sizeof(struct ql_adapter));
+ ndev = alloc_etherdev_mq(sizeof(struct ql_adapter),
+ min(MAX_CPUS, (int)num_online_cpus()));
if (!ndev)
return -ENOMEM;
| NETIF_F_TSO_ECN
| NETIF_F_HW_VLAN_TX
| NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER);
+ ndev->features |= NETIF_F_GRO;
if (test_bit(QL_DMA64, &qdev->flags))
ndev->features |= NETIF_F_HIGHDMA;
return err;
}
netif_carrier_off(ndev);
- netif_stop_queue(ndev);
ql_display_dev_info(ndev);
cards_found++;
return 0;
pci_set_master(pdev);
netif_carrier_off(ndev);
- netif_stop_queue(ndev);
ql_adapter_reset(qdev);
/* Make sure the EEPROM is good */
{
struct net_device *ndev = pci_get_drvdata(pdev);
struct ql_adapter *qdev = netdev_priv(ndev);
- int err, i;
+ int err;
netif_device_detach(ndev);
return err;
}
- for (i = qdev->rss_ring_first_cq_id; i < qdev->rx_ring_count; i++)
- netif_napi_del(&qdev->rx_ring[i].napi);
-
err = pci_save_state(pdev);
if (err)
return err;
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff