[NET]: Nuke SET_MODULE_OWNER macro.

[safe/jmp/linux-2.6] / drivers / net / pasemi_mac.h

diff --git a/drivers/net/pasemi_mac.h b/drivers/net/pasemi_mac.h
index 88edaa5..c5b0adb 100644 (file)
--- a/drivers/net/pasemi_mac.h
+++ b/drivers/net/pasemi_mac.h
@@ -24,13 +24,14 @@
 #include <linux/ethtool.h>
 #include <linux/netdevice.h>
 #include <linux/spinlock.h>
+#include <linux/phy.h>
 
 struct pasemi_mac_txring {
        spinlock_t       lock;
        struct pas_dma_xct_descr        *desc;
        dma_addr_t       dma;
        unsigned int     size;
-       unsigned int     next_to_use;
+       unsigned int     next_to_fill;
        unsigned int     next_to_clean;
        struct pasemi_mac_buffer *desc_info;
        char             irq_name[10];  /* "eth%d tx" */
@@ -51,9 +52,14 @@ struct pasemi_mac_rxring {
 
 struct pasemi_mac {
        struct net_device *netdev;
+       void __iomem *regs;
+       void __iomem *dma_regs;
+       void __iomem *iob_regs;
        struct pci_dev *pdev;
        struct pci_dev *dma_pdev;
        struct pci_dev *iob_pdev;
+       struct phy_device *phydev;
+       struct napi_struct napi;
        struct net_device_stats stats;
 
        /* Pointer to the cacheable per-channel status registers */
@@ -75,6 +81,12 @@ struct pasemi_mac {
        struct pasemi_mac_rxring *rx;
        unsigned long   tx_irq;
        unsigned long   rx_irq;
+       int     link;
+       int     speed;
+       int     duplex;
+
+       unsigned int    msg_enable;
+       char    phy_id[BUS_ID_SIZE];
 };
 
 /* Software status descriptor (desc_info) */
@@ -195,14 +207,26 @@ enum {
 #define PAS_DMA_RXINT_RCMDSTA(i)       (0x200+(i)*_PAS_DMA_RXINT_STRIDE)
 #define    PAS_DMA_RXINT_RCMDSTA_EN    0x00000001
 #define    PAS_DMA_RXINT_RCMDSTA_ST    0x00000002
-#define    PAS_DMA_RXINT_RCMDSTA_OO    0x00000100
-#define    PAS_DMA_RXINT_RCMDSTA_BP    0x00000200
-#define    PAS_DMA_RXINT_RCMDSTA_DR    0x00000400
+#define    PAS_DMA_RXINT_RCMDSTA_MBT   0x00000008
+#define    PAS_DMA_RXINT_RCMDSTA_MDR   0x00000010
+#define    PAS_DMA_RXINT_RCMDSTA_MOO   0x00000020
+#define    PAS_DMA_RXINT_RCMDSTA_MBP   0x00000040
 #define    PAS_DMA_RXINT_RCMDSTA_BT    0x00000800
-#define    PAS_DMA_RXINT_RCMDSTA_TB    0x00001000
+#define    PAS_DMA_RXINT_RCMDSTA_DR    0x00001000
+#define    PAS_DMA_RXINT_RCMDSTA_OO    0x00002000
+#define    PAS_DMA_RXINT_RCMDSTA_BP    0x00004000
+#define    PAS_DMA_RXINT_RCMDSTA_TB    0x00008000
 #define    PAS_DMA_RXINT_RCMDSTA_ACT   0x00010000
 #define    PAS_DMA_RXINT_RCMDSTA_DROPS_M       0xfffe0000
 #define    PAS_DMA_RXINT_RCMDSTA_DROPS_S       17
+#define PAS_DMA_RXINT_CFG(i)           (0x204+(i)*_PAS_DMA_RXINT_STRIDE)
+#define    PAS_DMA_RXINT_CFG_DHL_M     0x07000000
+#define    PAS_DMA_RXINT_CFG_DHL_S     24
+#define    PAS_DMA_RXINT_CFG_DHL(x)    (((x) << PAS_DMA_RXINT_CFG_DHL_S) & \
+                                        PAS_DMA_RXINT_CFG_DHL_M)
+#define    PAS_DMA_RXINT_CFG_WIF       0x00000002
+#define    PAS_DMA_RXINT_CFG_WIL       0x00000001
+
 #define PAS_DMA_RXINT_INCR(i)          (0x210+(i)*_PAS_DMA_RXINT_STRIDE)
 #define    PAS_DMA_RXINT_INCR_INCR_M   0x0000ffff
 #define    PAS_DMA_RXINT_INCR_INCR_S   0
@@ -329,7 +353,7 @@ enum {
                                                 PAS_IOB_DMA_TXCH_STAT_CNTDEL_M)
 #define PAS_IOB_DMA_RXCH_RESET(i)      (0x1500 + (i)*4)
 #define    PAS_IOB_DMA_RXCH_RESET_PCNT_M       0xffff0000
-#define    PAS_IOB_DMA_RXCH_RESET_PCNT_S       0
+#define    PAS_IOB_DMA_RXCH_RESET_PCNT_S       16
 #define    PAS_IOB_DMA_RXCH_RESET_PCNT(x)      (((x) << PAS_IOB_DMA_RXCH_RESET_PCNT_S) & \
                                                 PAS_IOB_DMA_RXCH_RESET_PCNT_M)
 #define    PAS_IOB_DMA_RXCH_RESET_PCNTRST      0x00000020
@@ -340,7 +364,7 @@ enum {
 #define    PAS_IOB_DMA_RXCH_RESET_PINTC                0x00000001
 #define PAS_IOB_DMA_TXCH_RESET(i)      (0x1600 + (i)*4)
 #define    PAS_IOB_DMA_TXCH_RESET_PCNT_M       0xffff0000
-#define    PAS_IOB_DMA_TXCH_RESET_PCNT_S       0
+#define    PAS_IOB_DMA_TXCH_RESET_PCNT_S       16
 #define    PAS_IOB_DMA_TXCH_RESET_PCNT(x)      (((x) << PAS_IOB_DMA_TXCH_RESET_PCNT_S) & \
                                                 PAS_IOB_DMA_TXCH_RESET_PCNT_M)
 #define    PAS_IOB_DMA_TXCH_RESET_PCNTRST      0x00000020