* 2 of the License, or (at your option) any later version.
*
* Copyright (C) 1996 Paul Mackerras.
- * Copyright (C) 1998 Alan Cox <alan@redhat.com>
+ * Copyright (C) 1998 Alan Cox <alan@lxorguk.ukuu.org.uk>
*
* Modified heavily by Joshua M. Thompson based on Dave Huang's NetBSD driver
+ *
+ * Copyright (C) 2007 Finn Thain
+ *
+ * Converted to DMA API, converted to unified driver model,
+ * sync'd some routines with mace.c and fixed various bugs.
*/
#include <linux/delay.h>
#include <linux/string.h>
#include <linux/crc32.h>
+#include <linux/bitrev.h>
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
#include <asm/io.h>
-#include <asm/pgtable.h>
#include <asm/irq.h>
#include <asm/macintosh.h>
#include <asm/macints.h>
#include <asm/page.h>
#include "mace.h"
-#define N_TX_RING 1
-#define N_RX_RING 8
-#define N_RX_PAGES ((N_RX_RING * 0x0800 + PAGE_SIZE - 1) / PAGE_SIZE)
+static char mac_mace_string[] = "macmace";
+
+#define N_TX_BUFF_ORDER 0
+#define N_TX_RING (1 << N_TX_BUFF_ORDER)
+#define N_RX_BUFF_ORDER 3
+#define N_RX_RING (1 << N_RX_BUFF_ORDER)
+
#define TX_TIMEOUT HZ
-/* Bits in transmit DMA status */
-#define TX_DMA_ERR 0x80
+#define MACE_BUFF_SIZE 0x800
+
+/* Chip rev needs workaround on HW & multicast addr change */
+#define BROKEN_ADDRCHG_REV 0x0941
/* The MACE is simply wired down on a Mac68K box */
struct mace_data {
volatile struct mace *mace;
- volatile unsigned char *tx_ring;
- volatile unsigned char *tx_ring_phys;
- volatile unsigned char *rx_ring;
- volatile unsigned char *rx_ring_phys;
+ unsigned char *tx_ring;
+ dma_addr_t tx_ring_phys;
+ unsigned char *rx_ring;
+ dma_addr_t rx_ring_phys;
int dma_intr;
- struct net_device_stats stats;
int rx_slot, rx_tail;
int tx_slot, tx_sloti, tx_count;
+ int chipid;
+ struct device *device;
};
struct mace_frame {
- u16 len;
- u16 status;
- u16 rntpc;
- u16 rcvcc;
- u32 pad1;
- u32 pad2;
+ u8 rcvcnt;
+ u8 pad1;
+ u8 rcvsts;
+ u8 pad2;
+ u8 rntpc;
+ u8 pad3;
+ u8 rcvcc;
+ u8 pad4;
+ u32 pad5;
+ u32 pad6;
u8 data[1];
/* And frame continues.. */
};
#define PRIV_BYTES sizeof(struct mace_data)
-extern void psc_debug_dump(void);
-
static int mace_open(struct net_device *dev);
static int mace_close(struct net_device *dev);
static int mace_xmit_start(struct sk_buff *skb, struct net_device *dev);
-static struct net_device_stats *mace_stats(struct net_device *dev);
static void mace_set_multicast(struct net_device *dev);
static int mace_set_address(struct net_device *dev, void *addr);
+static void mace_reset(struct net_device *dev);
static irqreturn_t mace_interrupt(int irq, void *dev_id);
static irqreturn_t mace_dma_intr(int irq, void *dev_id);
static void mace_tx_timeout(struct net_device *dev);
-
-/* Bit-reverse one byte of an ethernet hardware address. */
-
-static int bitrev(int b)
-{
- int d = 0, i;
-
- for (i = 0; i < 8; ++i, b >>= 1) {
- d = (d << 1) | (b & 1);
- }
-
- return d;
-}
+static void __mace_set_address(struct net_device *dev, void *addr);
/*
* Load a receive DMA channel with a base address and ring length
static void mace_load_rxdma_base(struct net_device *dev, int set)
{
- struct mace_data *mp = (struct mace_data *) dev->priv;
+ struct mace_data *mp = netdev_priv(dev);
psc_write_word(PSC_ENETRD_CMD + set, 0x0100);
psc_write_long(PSC_ENETRD_ADDR + set, (u32) mp->rx_ring_phys);
static void mace_rxdma_reset(struct net_device *dev)
{
- struct mace_data *mp = (struct mace_data *) dev->priv;
+ struct mace_data *mp = netdev_priv(dev);
volatile struct mace *mace = mp->mace;
u8 maccc = mace->maccc;
static void mace_txdma_reset(struct net_device *dev)
{
- struct mace_data *mp = (struct mace_data *) dev->priv;
+ struct mace_data *mp = netdev_priv(dev);
volatile struct mace *mace = mp->mace;
u8 maccc;
psc_write_word(PSC_ENETWR_CMD + PSC_SET1, 0x1100);
}
+static const struct net_device_ops mace_netdev_ops = {
+ .ndo_open = mace_open,
+ .ndo_stop = mace_close,
+ .ndo_start_xmit = mace_xmit_start,
+ .ndo_tx_timeout = mace_tx_timeout,
+ .ndo_set_multicast_list = mace_set_multicast,
+ .ndo_set_mac_address = mace_set_address,
+ .ndo_change_mtu = eth_change_mtu,
+ .ndo_validate_addr = eth_validate_addr,
+};
+
/*
* Not really much of a probe. The hardware table tells us if this
* model of Macintrash has a MACE (AV macintoshes)
*/
-struct net_device *mace_probe(int unit)
+static int __devinit mace_probe(struct platform_device *pdev)
{
int j;
struct mace_data *mp;
int err;
if (found || macintosh_config->ether_type != MAC_ETHER_MACE)
- return ERR_PTR(-ENODEV);
+ return -ENODEV;
found = 1; /* prevent 'finding' one on every device probe */
dev = alloc_etherdev(PRIV_BYTES);
if (!dev)
- return ERR_PTR(-ENOMEM);
+ return -ENOMEM;
- if (unit >= 0)
- sprintf(dev->name, "eth%d", unit);
+ mp = netdev_priv(dev);
+
+ mp->device = &pdev->dev;
+ SET_NETDEV_DEV(dev, &pdev->dev);
- mp = (struct mace_data *) dev->priv;
dev->base_addr = (u32)MACE_BASE;
mp->mace = (volatile struct mace *) MACE_BASE;
dev->irq = IRQ_MAC_MACE;
mp->dma_intr = IRQ_MAC_MACE_DMA;
+ mp->chipid = mp->mace->chipid_hi << 8 | mp->mace->chipid_lo;
+
/*
* The PROM contains 8 bytes which total 0xFF when XOR'd
* together. Due to the usual peculiar apple brain damage
addr = (void *)MACE_PROM;
for (j = 0; j < 6; ++j) {
- u8 v=bitrev(addr[j<<4]);
+ u8 v = bitrev8(addr[j<<4]);
checksum ^= v;
dev->dev_addr[j] = v;
}
for (; j < 8; ++j) {
- checksum ^= bitrev(addr[j<<4]);
+ checksum ^= bitrev8(addr[j<<4]);
}
if (checksum != 0xFF) {
free_netdev(dev);
- return ERR_PTR(-ENODEV);
+ return -ENODEV;
}
- memset(&mp->stats, 0, sizeof(mp->stats));
-
- dev->open = mace_open;
- dev->stop = mace_close;
- dev->hard_start_xmit = mace_xmit_start;
- dev->tx_timeout = mace_tx_timeout;
+ dev->netdev_ops = &mace_netdev_ops;
dev->watchdog_timeo = TX_TIMEOUT;
- dev->get_stats = mace_stats;
- dev->set_multicast_list = mace_set_multicast;
- dev->set_mac_address = mace_set_address;
- printk(KERN_INFO "%s: 68K MACE, hardware address %.2X", dev->name, dev->dev_addr[0]);
- for (j = 1 ; j < 6 ; j++) printk(":%.2X", dev->dev_addr[j]);
- printk("\n");
+ printk(KERN_INFO "%s: 68K MACE, hardware address %pM\n",
+ dev->name, dev->dev_addr);
err = register_netdev(dev);
if (!err)
- return dev;
+ return 0;
free_netdev(dev);
- return ERR_PTR(err);
+ return err;
+}
+
+/*
+ * Reset the chip.
+ */
+
+static void mace_reset(struct net_device *dev)
+{
+ struct mace_data *mp = netdev_priv(dev);
+ volatile struct mace *mb = mp->mace;
+ int i;
+
+ /* soft-reset the chip */
+ i = 200;
+ while (--i) {
+ mb->biucc = SWRST;
+ if (mb->biucc & SWRST) {
+ udelay(10);
+ continue;
+ }
+ break;
+ }
+ if (!i) {
+ printk(KERN_ERR "macmace: cannot reset chip!\n");
+ return;
+ }
+
+ mb->maccc = 0; /* turn off tx, rx */
+ mb->imr = 0xFF; /* disable all intrs for now */
+ i = mb->ir;
+
+ mb->biucc = XMTSP_64;
+ mb->utr = RTRD;
+ mb->fifocc = XMTFW_8 | RCVFW_64 | XMTFWU | RCVFWU;
+
+ mb->xmtfc = AUTO_PAD_XMIT; /* auto-pad short frames */
+ mb->rcvfc = 0;
+
+ /* load up the hardware address */
+ __mace_set_address(dev, dev->dev_addr);
+
+ /* clear the multicast filter */
+ if (mp->chipid == BROKEN_ADDRCHG_REV)
+ mb->iac = LOGADDR;
+ else {
+ mb->iac = ADDRCHG | LOGADDR;
+ while ((mb->iac & ADDRCHG) != 0)
+ ;
+ }
+ for (i = 0; i < 8; ++i)
+ mb->ladrf = 0;
+
+ /* done changing address */
+ if (mp->chipid != BROKEN_ADDRCHG_REV)
+ mb->iac = 0;
+
+ mb->plscc = PORTSEL_AUI;
}
/*
* Load the address on a mace controller.
*/
-static int mace_set_address(struct net_device *dev, void *addr)
+static void __mace_set_address(struct net_device *dev, void *addr)
{
- unsigned char *p = addr;
- struct mace_data *mp = (struct mace_data *) dev->priv;
+ struct mace_data *mp = netdev_priv(dev);
volatile struct mace *mb = mp->mace;
+ unsigned char *p = addr;
int i;
+
+ /* load up the hardware address */
+ if (mp->chipid == BROKEN_ADDRCHG_REV)
+ mb->iac = PHYADDR;
+ else {
+ mb->iac = ADDRCHG | PHYADDR;
+ while ((mb->iac & ADDRCHG) != 0)
+ ;
+ }
+ for (i = 0; i < 6; ++i)
+ mb->padr = dev->dev_addr[i] = p[i];
+ if (mp->chipid != BROKEN_ADDRCHG_REV)
+ mb->iac = 0;
+}
+
+static int mace_set_address(struct net_device *dev, void *addr)
+{
+ struct mace_data *mp = netdev_priv(dev);
+ volatile struct mace *mb = mp->mace;
unsigned long flags;
u8 maccc;
maccc = mb->maccc;
- /* load up the hardware address */
- mb->iac = ADDRCHG | PHYADDR;
- while ((mb->iac & ADDRCHG) != 0);
-
- for (i = 0; i < 6; ++i) {
- mb->padr = dev->dev_addr[i] = p[i];
- }
+ __mace_set_address(dev, addr);
mb->maccc = maccc;
+
local_irq_restore(flags);
return 0;
static int mace_open(struct net_device *dev)
{
- struct mace_data *mp = (struct mace_data *) dev->priv;
+ struct mace_data *mp = netdev_priv(dev);
volatile struct mace *mb = mp->mace;
-#if 0
- int i;
-
- i = 200;
- while (--i) {
- mb->biucc = SWRST;
- if (mb->biucc & SWRST) {
- udelay(10);
- continue;
- }
- break;
- }
- if (!i) {
- printk(KERN_ERR "%s: software reset failed!!\n", dev->name);
- return -EAGAIN;
- }
-#endif
- mb->biucc = XMTSP_64;
- mb->fifocc = XMTFW_16 | RCVFW_64 | XMTFWU | RCVFWU | XMTBRST | RCVBRST;
- mb->xmtfc = AUTO_PAD_XMIT;
- mb->plscc = PORTSEL_AUI;
- /* mb->utr = RTRD; */
+ /* reset the chip */
+ mace_reset(dev);
if (request_irq(dev->irq, mace_interrupt, 0, dev->name, dev)) {
printk(KERN_ERR "%s: can't get irq %d\n", dev->name, dev->irq);
/* Allocate the DMA ring buffers */
- mp->rx_ring = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, N_RX_PAGES);
- mp->tx_ring = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, 0);
-
- if (mp->tx_ring==NULL || mp->rx_ring==NULL) {
- if (mp->rx_ring) free_pages((u32) mp->rx_ring, N_RX_PAGES);
- if (mp->tx_ring) free_pages((u32) mp->tx_ring, 0);
- free_irq(dev->irq, dev);
- free_irq(mp->dma_intr, dev);
- printk(KERN_ERR "%s: unable to allocate DMA buffers\n", dev->name);
- return -ENOMEM;
+ mp->tx_ring = dma_alloc_coherent(mp->device,
+ N_TX_RING * MACE_BUFF_SIZE,
+ &mp->tx_ring_phys, GFP_KERNEL);
+ if (mp->tx_ring == NULL) {
+ printk(KERN_ERR "%s: unable to allocate DMA tx buffers\n", dev->name);
+ goto out1;
}
- mp->rx_ring_phys = (unsigned char *) virt_to_bus((void *)mp->rx_ring);
- mp->tx_ring_phys = (unsigned char *) virt_to_bus((void *)mp->tx_ring);
-
- /* We want the Rx buffer to be uncached and the Tx buffer to be writethrough */
-
- kernel_set_cachemode((void *)mp->rx_ring, N_RX_PAGES * PAGE_SIZE, IOMAP_NOCACHE_NONSER);
- kernel_set_cachemode((void *)mp->tx_ring, PAGE_SIZE, IOMAP_WRITETHROUGH);
+ mp->rx_ring = dma_alloc_coherent(mp->device,
+ N_RX_RING * MACE_BUFF_SIZE,
+ &mp->rx_ring_phys, GFP_KERNEL);
+ if (mp->rx_ring == NULL) {
+ printk(KERN_ERR "%s: unable to allocate DMA rx buffers\n", dev->name);
+ goto out2;
+ }
mace_dma_off(dev);
psc_write_word(PSC_ENETWR_CTL, 0x0400);
psc_write_word(PSC_ENETRD_CTL, 0x0400);
-#if 0
- /* load up the hardware address */
-
- mb->iac = ADDRCHG | PHYADDR;
-
- while ((mb->iac & ADDRCHG) != 0);
-
- for (i = 0; i < 6; ++i)
- mb->padr = dev->dev_addr[i];
-
- /* clear the multicast filter */
- mb->iac = ADDRCHG | LOGADDR;
-
- while ((mb->iac & ADDRCHG) != 0);
-
- for (i = 0; i < 8; ++i)
- mb->ladrf = 0;
-
- mb->plscc = PORTSEL_GPSI + ENPLSIO;
-
- mb->maccc = ENXMT | ENRCV;
- mb->imr = RCVINT;
-#endif
-
mace_rxdma_reset(dev);
mace_txdma_reset(dev);
+ /* turn it on! */
+ mb->maccc = ENXMT | ENRCV;
+ /* enable all interrupts except receive interrupts */
+ mb->imr = RCVINT;
return 0;
+
+out2:
+ dma_free_coherent(mp->device, N_TX_RING * MACE_BUFF_SIZE,
+ mp->tx_ring, mp->tx_ring_phys);
+out1:
+ free_irq(dev->irq, dev);
+ free_irq(mp->dma_intr, dev);
+ return -ENOMEM;
}
/*
static int mace_close(struct net_device *dev)
{
- struct mace_data *mp = (struct mace_data *) dev->priv;
+ struct mace_data *mp = netdev_priv(dev);
volatile struct mace *mb = mp->mace;
mb->maccc = 0; /* disable rx and tx */
mb->imr = 0xFF; /* disable all irqs */
mace_dma_off(dev); /* disable rx and tx dma */
- free_irq(dev->irq, dev);
- free_irq(IRQ_MAC_MACE_DMA, dev);
-
- free_pages((u32) mp->rx_ring, N_RX_PAGES);
- free_pages((u32) mp->tx_ring, 0);
-
return 0;
}
static int mace_xmit_start(struct sk_buff *skb, struct net_device *dev)
{
- struct mace_data *mp = (struct mace_data *) dev->priv;
+ struct mace_data *mp = netdev_priv(dev);
+ unsigned long flags;
- /* Stop the queue if the buffer is full */
+ /* Stop the queue since there's only the one buffer */
+ local_irq_save(flags);
+ netif_stop_queue(dev);
if (!mp->tx_count) {
- netif_stop_queue(dev);
- return 1;
+ printk(KERN_ERR "macmace: tx queue running but no free buffers.\n");
+ local_irq_restore(flags);
+ return NETDEV_TX_BUSY;
}
mp->tx_count--;
+ local_irq_restore(flags);
- mp->stats.tx_packets++;
- mp->stats.tx_bytes += skb->len;
+ dev->stats.tx_packets++;
+ dev->stats.tx_bytes += skb->len;
/* We need to copy into our xmit buffer to take care of alignment and caching issues */
-
- memcpy((void *) mp->tx_ring, skb->data, skb->len);
+ skb_copy_from_linear_data(skb, mp->tx_ring, skb->len);
/* load the Tx DMA and fire it off */
dev_kfree_skb(skb);
- return 0;
-}
-
-static struct net_device_stats *mace_stats(struct net_device *dev)
-{
- struct mace_data *p = (struct mace_data *) dev->priv;
- return &p->stats;
+ dev->trans_start = jiffies;
+ return NETDEV_TX_OK;
}
static void mace_set_multicast(struct net_device *dev)
{
- struct mace_data *mp = (struct mace_data *) dev->priv;
+ struct mace_data *mp = netdev_priv(dev);
volatile struct mace *mb = mp->mace;
int i, j;
u32 crc;
u8 maccc;
+ unsigned long flags;
+ local_irq_save(flags);
maccc = mb->maccc;
mb->maccc &= ~PROM;
}
}
- mb->iac = ADDRCHG | LOGADDR;
- while (mb->iac & ADDRCHG);
-
- for (i = 0; i < 8; ++i) {
- mb->ladrf = multicast_filter[i];
+ if (mp->chipid == BROKEN_ADDRCHG_REV)
+ mb->iac = LOGADDR;
+ else {
+ mb->iac = ADDRCHG | LOGADDR;
+ while ((mb->iac & ADDRCHG) != 0)
+ ;
}
+ for (i = 0; i < 8; ++i)
+ mb->ladrf = multicast_filter[i];
+ if (mp->chipid != BROKEN_ADDRCHG_REV)
+ mb->iac = 0;
}
mb->maccc = maccc;
+ local_irq_restore(flags);
}
-/*
- * Miscellaneous interrupts are handled here. We may end up
- * having to bash the chip on the head for bad errors
- */
-
-static void mace_handle_misc_intrs(struct mace_data *mp, int intr)
+static void mace_handle_misc_intrs(struct net_device *dev, int intr)
{
+ struct mace_data *mp = netdev_priv(dev);
volatile struct mace *mb = mp->mace;
static int mace_babbles, mace_jabbers;
- if (intr & MPCO) {
- mp->stats.rx_missed_errors += 256;
- }
- mp->stats.rx_missed_errors += mb->mpc; /* reading clears it */
-
- if (intr & RNTPCO) {
- mp->stats.rx_length_errors += 256;
- }
- mp->stats.rx_length_errors += mb->rntpc; /* reading clears it */
-
- if (intr & CERR) {
- ++mp->stats.tx_heartbeat_errors;
- }
- if (intr & BABBLE) {
- if (mace_babbles++ < 4) {
- printk(KERN_DEBUG "mace: babbling transmitter\n");
- }
- }
- if (intr & JABBER) {
- if (mace_jabbers++ < 4) {
- printk(KERN_DEBUG "mace: jabbering transceiver\n");
- }
- }
+ if (intr & MPCO)
+ dev->stats.rx_missed_errors += 256;
+ dev->stats.rx_missed_errors += mb->mpc; /* reading clears it */
+ if (intr & RNTPCO)
+ dev->stats.rx_length_errors += 256;
+ dev->stats.rx_length_errors += mb->rntpc; /* reading clears it */
+ if (intr & CERR)
+ ++dev->stats.tx_heartbeat_errors;
+ if (intr & BABBLE)
+ if (mace_babbles++ < 4)
+ printk(KERN_DEBUG "macmace: babbling transmitter\n");
+ if (intr & JABBER)
+ if (mace_jabbers++ < 4)
+ printk(KERN_DEBUG "macmace: jabbering transceiver\n");
}
-/*
- * A transmit error has occurred. (We kick the transmit side from
- * the DMA completion)
- */
-
-static void mace_xmit_error(struct net_device *dev)
+static irqreturn_t mace_interrupt(int irq, void *dev_id)
{
- struct mace_data *mp = (struct mace_data *) dev->priv;
+ struct net_device *dev = (struct net_device *) dev_id;
+ struct mace_data *mp = netdev_priv(dev);
volatile struct mace *mb = mp->mace;
- u8 xmtfs, xmtrc;
+ int intr, fs;
+ unsigned long flags;
- xmtfs = mb->xmtfs;
- xmtrc = mb->xmtrc;
+ /* don't want the dma interrupt handler to fire */
+ local_irq_save(flags);
- if (xmtfs & XMTSV) {
- if (xmtfs & UFLO) {
- printk("%s: DMA underrun.\n", dev->name);
- mp->stats.tx_errors++;
- mp->stats.tx_fifo_errors++;
- mace_txdma_reset(dev);
+ intr = mb->ir; /* read interrupt register */
+ mace_handle_misc_intrs(dev, intr);
+
+ if (intr & XMTINT) {
+ fs = mb->xmtfs;
+ if ((fs & XMTSV) == 0) {
+ printk(KERN_ERR "macmace: xmtfs not valid! (fs=%x)\n", fs);
+ mace_reset(dev);
+ /*
+ * XXX mace likes to hang the machine after a xmtfs error.
+ * This is hard to reproduce, reseting *may* help
+ */
}
- if (xmtfs & RTRY) {
- mp->stats.collisions++;
+ /* dma should have finished */
+ if (!mp->tx_count) {
+ printk(KERN_DEBUG "macmace: tx ring ran out? (fs=%x)\n", fs);
+ }
+ /* Update stats */
+ if (fs & (UFLO|LCOL|LCAR|RTRY)) {
+ ++dev->stats.tx_errors;
+ if (fs & LCAR)
+ ++dev->stats.tx_carrier_errors;
+ else if (fs & (UFLO|LCOL|RTRY)) {
+ ++dev->stats.tx_aborted_errors;
+ if (mb->xmtfs & UFLO) {
+ printk(KERN_ERR "%s: DMA underrun.\n", dev->name);
+ dev->stats.tx_fifo_errors++;
+ mace_txdma_reset(dev);
+ }
+ }
}
}
-}
-/*
- * A receive interrupt occurred.
- */
+ if (mp->tx_count)
+ netif_wake_queue(dev);
-static void mace_recv_interrupt(struct net_device *dev)
-{
-/* struct mace_data *mp = (struct mace_data *) dev->priv; */
-// volatile struct mace *mb = mp->mace;
-}
+ local_irq_restore(flags);
-/*
- * Process the chip interrupt
- */
+ return IRQ_HANDLED;
+}
-static irqreturn_t mace_interrupt(int irq, void *dev_id)
+static void mace_tx_timeout(struct net_device *dev)
{
- struct net_device *dev = (struct net_device *) dev_id;
- struct mace_data *mp = (struct mace_data *) dev->priv;
+ struct mace_data *mp = netdev_priv(dev);
volatile struct mace *mb = mp->mace;
- u8 ir;
+ unsigned long flags;
- ir = mb->ir;
- mace_handle_misc_intrs(mp, ir);
+ local_irq_save(flags);
- if (ir & XMTINT) {
- mace_xmit_error(dev);
- }
- if (ir & RCVINT) {
- mace_recv_interrupt(dev);
- }
- return IRQ_HANDLED;
-}
+ /* turn off both tx and rx and reset the chip */
+ mb->maccc = 0;
+ printk(KERN_ERR "macmace: transmit timeout - resetting\n");
+ mace_txdma_reset(dev);
+ mace_reset(dev);
-static void mace_tx_timeout(struct net_device *dev)
-{
-/* struct mace_data *mp = (struct mace_data *) dev->priv; */
-// volatile struct mace *mb = mp->mace;
+ /* restart rx dma */
+ mace_rxdma_reset(dev);
+
+ mp->tx_count = N_TX_RING;
+ netif_wake_queue(dev);
+
+ /* turn it on! */
+ mb->maccc = ENXMT | ENRCV;
+ /* enable all interrupts except receive interrupts */
+ mb->imr = RCVINT;
+
+ local_irq_restore(flags);
}
/*
static void mace_dma_rx_frame(struct net_device *dev, struct mace_frame *mf)
{
- struct mace_data *mp = (struct mace_data *) dev->priv;
struct sk_buff *skb;
+ unsigned int frame_status = mf->rcvsts;
- if (mf->status & RS_OFLO) {
- printk("%s: fifo overflow.\n", dev->name);
- mp->stats.rx_errors++;
- mp->stats.rx_fifo_errors++;
- }
- if (mf->status&(RS_CLSN|RS_FRAMERR|RS_FCSERR))
- mp->stats.rx_errors++;
+ if (frame_status & (RS_OFLO | RS_CLSN | RS_FRAMERR | RS_FCSERR)) {
+ dev->stats.rx_errors++;
+ if (frame_status & RS_OFLO) {
+ printk(KERN_DEBUG "%s: fifo overflow.\n", dev->name);
+ dev->stats.rx_fifo_errors++;
+ }
+ if (frame_status & RS_CLSN)
+ dev->stats.collisions++;
+ if (frame_status & RS_FRAMERR)
+ dev->stats.rx_frame_errors++;
+ if (frame_status & RS_FCSERR)
+ dev->stats.rx_crc_errors++;
+ } else {
+ unsigned int frame_length = mf->rcvcnt + ((frame_status & 0x0F) << 8 );
- if (mf->status&RS_CLSN) {
- mp->stats.collisions++;
- }
- if (mf->status&RS_FRAMERR) {
- mp->stats.rx_frame_errors++;
- }
- if (mf->status&RS_FCSERR) {
- mp->stats.rx_crc_errors++;
- }
+ skb = dev_alloc_skb(frame_length + 2);
+ if (!skb) {
+ dev->stats.rx_dropped++;
+ return;
+ }
+ skb_reserve(skb, 2);
+ memcpy(skb_put(skb, frame_length), mf->data, frame_length);
- skb = dev_alloc_skb(mf->len+2);
- if (!skb) {
- mp->stats.rx_dropped++;
- return;
+ skb->protocol = eth_type_trans(skb, dev);
+ netif_rx(skb);
+ dev->stats.rx_packets++;
+ dev->stats.rx_bytes += frame_length;
}
- skb_reserve(skb,2);
- memcpy(skb_put(skb, mf->len), mf->data, mf->len);
-
- skb->dev = dev;
- skb->protocol = eth_type_trans(skb, dev);
- netif_rx(skb);
- dev->last_rx = jiffies;
- mp->stats.rx_packets++;
- mp->stats.rx_bytes += mf->len;
}
/*
static irqreturn_t mace_dma_intr(int irq, void *dev_id)
{
struct net_device *dev = (struct net_device *) dev_id;
- struct mace_data *mp = (struct mace_data *) dev->priv;
+ struct mace_data *mp = netdev_priv(dev);
int left, head;
u16 status;
u32 baka;
/* Loop through the ring buffer and process new packages */
while (mp->rx_tail < head) {
- mace_dma_rx_frame(dev, (struct mace_frame *) (mp->rx_ring + (mp->rx_tail * 0x0800)));
+ mace_dma_rx_frame(dev, (struct mace_frame*) (mp->rx_ring
+ + (mp->rx_tail * MACE_BUFF_SIZE)));
mp->rx_tail++;
}
psc_write_word(PSC_ENETWR_CMD + mp->tx_sloti, 0x0100);
mp->tx_sloti ^= 0x10;
mp->tx_count++;
- netif_wake_queue(dev);
}
return IRQ_HANDLED;
}
MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Macintosh MACE ethernet driver");
+MODULE_ALIAS("platform:macmace");
+
+static int __devexit mac_mace_device_remove (struct platform_device *pdev)
+{
+ struct net_device *dev = platform_get_drvdata(pdev);
+ struct mace_data *mp = netdev_priv(dev);
+
+ unregister_netdev(dev);
+
+ free_irq(dev->irq, dev);
+ free_irq(IRQ_MAC_MACE_DMA, dev);
+
+ dma_free_coherent(mp->device, N_RX_RING * MACE_BUFF_SIZE,
+ mp->rx_ring, mp->rx_ring_phys);
+ dma_free_coherent(mp->device, N_TX_RING * MACE_BUFF_SIZE,
+ mp->tx_ring, mp->tx_ring_phys);
+
+ free_netdev(dev);
+
+ return 0;
+}
+
+static struct platform_driver mac_mace_driver = {
+ .probe = mace_probe,
+ .remove = __devexit_p(mac_mace_device_remove),
+ .driver = {
+ .name = mac_mace_string,
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init mac_mace_init_module(void)
+{
+ if (!MACH_IS_MAC)
+ return -ENODEV;
+
+ return platform_driver_register(&mac_mace_driver);
+}
+
+static void __exit mac_mace_cleanup_module(void)
+{
+ platform_driver_unregister(&mac_mace_driver);
+}
+
+module_init(mac_mace_init_module);
+module_exit(mac_mace_cleanup_module);
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff