cxgb3: commnonize LASI phy code
[safe/jmp/linux-2.6] / drivers / net / cxgb3 / t3_hw.c
index f7ced32..58a3097 100644 (file)
@@ -442,27 +442,52 @@ int t3_set_phy_speed_duplex(struct cphy *phy, int speed, int duplex)
        return mdio_write(phy, 0, MII_BMCR, ctl);
 }
 
+int t3_phy_lasi_intr_enable(struct cphy *phy)
+{
+       return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 1);
+}
+
+int t3_phy_lasi_intr_disable(struct cphy *phy)
+{
+       return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 0);
+}
+
+int t3_phy_lasi_intr_clear(struct cphy *phy)
+{
+       u32 val;
+
+       return mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &val);
+}
+
+int t3_phy_lasi_intr_handler(struct cphy *phy)
+{
+       unsigned int status;
+       int err = mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &status);
+
+       if (err)
+               return err;
+       return (status & 1) ?  cphy_cause_link_change : 0;
+}
+
 static const struct adapter_info t3_adap_info[] = {
        {2, 0,
         F_GPIO2_OEN | F_GPIO4_OEN |
-        F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5,
-        0,
+        F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, { S_GPIO3, S_GPIO5 }, 0,
         &mi1_mdio_ops, "Chelsio PE9000"},
        {2, 0,
         F_GPIO2_OEN | F_GPIO4_OEN |
-        F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5,
-        0,
+        F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, { S_GPIO3, S_GPIO5 }, 0,
         &mi1_mdio_ops, "Chelsio T302"},
        {1, 0,
         F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN |
         F_GPIO11_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL,
-        0, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
+        { 0 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
         &mi1_mdio_ext_ops, "Chelsio T310"},
        {2, 0,
         F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN |
         F_GPIO7_OEN | F_GPIO10_OEN | F_GPIO11_OEN | F_GPIO1_OUT_VAL |
-        F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0,
-        SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
+        F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL,
+        { S_GPIO9, S_GPIO3 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
         &mi1_mdio_ext_ops, "Chelsio T320"},
 };
 
@@ -1134,6 +1159,15 @@ void t3_link_changed(struct adapter *adapter, int port_id)
 
        phy->ops->get_link_status(phy, &link_ok, &speed, &duplex, &fc);
 
+       if (lc->requested_fc & PAUSE_AUTONEG)
+               fc &= lc->requested_fc;
+       else
+               fc = lc->requested_fc & (PAUSE_RX | PAUSE_TX);
+
+       if (link_ok == lc->link_ok && speed == lc->speed &&
+           duplex == lc->duplex && fc == lc->fc)
+               return;                            /* nothing changed */
+
        if (link_ok != lc->link_ok && adapter->params.rev > 0 &&
            uses_xaui(adapter)) {
                if (link_ok)
@@ -1144,10 +1178,6 @@ void t3_link_changed(struct adapter *adapter, int port_id)
        lc->link_ok = link_ok;
        lc->speed = speed < 0 ? SPEED_INVALID : speed;
        lc->duplex = duplex < 0 ? DUPLEX_INVALID : duplex;
-       if (lc->requested_fc & PAUSE_AUTONEG)
-               fc &= lc->requested_fc;
-       else
-               fc = lc->requested_fc & (PAUSE_RX | PAUSE_TX);
 
        if (link_ok && speed >= 0 && lc->autoneg == AUTONEG_ENABLE) {
                /* Set MAC speed, duplex, and flow control to match PHY. */
@@ -1193,7 +1223,6 @@ int t3_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc)
                                                   fc);
                        /* Also disables autoneg */
                        phy->ops->set_speed_duplex(phy, lc->speed, lc->duplex);
-                       phy->ops->reset(phy, 0);
                } else
                        phy->ops->autoneg_enable(phy);
        } else {
@@ -1684,19 +1713,15 @@ static int mac_intr_handler(struct adapter *adap, unsigned int idx)
  */
 int t3_phy_intr_handler(struct adapter *adapter)
 {
-       u32 mask, gpi = adapter_info(adapter)->gpio_intr;
        u32 i, cause = t3_read_reg(adapter, A_T3DBG_INT_CAUSE);
 
        for_each_port(adapter, i) {
                struct port_info *p = adap2pinfo(adapter, i);
 
-               mask = gpi - (gpi & (gpi - 1));
-               gpi -= mask;
-
                if (!(p->phy.caps & SUPPORTED_IRQ))
                        continue;
 
-               if (cause & mask) {
+               if (cause & (1 << adapter_info(adapter)->gpio_intr[i])) {
                        int phy_cause = p->phy.ops->intr_handler(&p->phy);
 
                        if (phy_cause & cphy_cause_link_change)
@@ -1765,6 +1790,17 @@ int t3_slow_intr_handler(struct adapter *adapter)
        return 1;
 }
 
+static unsigned int calc_gpio_intr(struct adapter *adap)
+{
+       unsigned int i, gpi_intr = 0;
+
+       for_each_port(adap, i)
+               if ((adap2pinfo(adap, i)->phy.caps & SUPPORTED_IRQ) &&
+                   adapter_info(adap)->gpio_intr[i])
+                       gpi_intr |= 1 << adapter_info(adap)->gpio_intr[i];
+       return gpi_intr;
+}
+
 /**
  *     t3_intr_enable - enable interrupts
  *     @adapter: the adapter whose interrupts should be enabled
@@ -1807,10 +1843,8 @@ void t3_intr_enable(struct adapter *adapter)
                t3_write_reg(adapter, A_ULPTX_INT_ENABLE, ULPTX_INTR_MASK);
        }
 
-       t3_write_reg(adapter, A_T3DBG_GPIO_ACT_LOW,
-                    adapter_info(adapter)->gpio_intr);
-       t3_write_reg(adapter, A_T3DBG_INT_ENABLE,
-                    adapter_info(adapter)->gpio_intr);
+       t3_write_reg(adapter, A_T3DBG_INT_ENABLE, calc_gpio_intr(adapter));
+
        if (is_pcie(adapter))
                t3_write_reg(adapter, A_PCIE_INT_ENABLE, PCIE_INTR_MASK);
        else
@@ -3331,6 +3365,8 @@ int t3_init_hw(struct adapter *adapter, u32 fw_params)
        init_hw_for_avail_ports(adapter, adapter->params.nports);
        t3_sge_init(adapter, &adapter->params.sge);
 
+       t3_write_reg(adapter, A_T3DBG_GPIO_ACT_LOW, calc_gpio_intr(adapter));
+
        t3_write_reg(adapter, A_CIM_HOST_ACC_DATA, vpd->uclk | fw_params);
        t3_write_reg(adapter, A_CIM_BOOT_CFG,
                     V_BOOTADDR(FW_FLASH_BOOT_ADDR >> 2));