/* bnx2x_hsi.h: Broadcom Everest network driver.
*
- * Copyright (c) 2007-2008 Broadcom Corporation
+ * Copyright (c) 2007-2009 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
#define SHARED_HW_CFG_UMP_NC_SI_EXT_PHY_TYPE_BCM5221 0x00010000
u32 board; /* 0x124 */
-#define SHARED_HW_CFG_BOARD_TYPE_MASK 0x0000ffff
-#define SHARED_HW_CFG_BOARD_TYPE_SHIFT 0
-#define SHARED_HW_CFG_BOARD_TYPE_NONE 0x00000000
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957710T1000 0x00000001
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957710T1001 0x00000002
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957710T1002G 0x00000003
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957710T1004G 0x00000004
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957710T1007G 0x00000005
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957710T1015G 0x00000006
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957710A1020G 0x00000007
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957710T1003G 0x00000008
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957710A1022G 0x00000009
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957710A1021G 0x0000000a
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957710A1023G 0x0000000b
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957710A1033G 0x0000000c
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957711T1101 0x0000000d
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957711ET1201 0x0000000e
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957711A1133G 0x0000000f
-#define SHARED_HW_CFG_BOARD_TYPE_BCM957711EA1233G 0x00000010
-
-#define SHARED_HW_CFG_BOARD_VER_MASK 0xffff0000
-#define SHARED_HW_CFG_BOARD_VER_SHIFT 16
-#define SHARED_HW_CFG_BOARD_MAJOR_VER_MASK 0xf0000000
-#define SHARED_HW_CFG_BOARD_MAJOR_VER_SHIFT 28
-#define SHARED_HW_CFG_BOARD_MINOR_VER_MASK 0x0f000000
-#define SHARED_HW_CFG_BOARD_MINOR_VER_SHIFT 24
-#define SHARED_HW_CFG_BOARD_REV_MASK 0x00ff0000
+#define SHARED_HW_CFG_BOARD_REV_MASK 0x00FF0000
#define SHARED_HW_CFG_BOARD_REV_SHIFT 16
+#define SHARED_HW_CFG_BOARD_MAJOR_VER_MASK 0x0F000000
+#define SHARED_HW_CFG_BOARD_MAJOR_VER_SHIFT 24
+
+#define SHARED_HW_CFG_BOARD_MINOR_VER_MASK 0xF0000000
+#define SHARED_HW_CFG_BOARD_MINOR_VER_SHIFT 28
+
u32 reserved; /* 0x128 */
};
u32 rdma_mac_lower;
u32 serdes_config;
- /* for external PHY, or forced mode or during AN */
-#define PORT_HW_CFG_SERDES_TX_DRV_PRE_EMPHASIS_MASK 0xffff0000
-#define PORT_HW_CFG_SERDES_TX_DRV_PRE_EMPHASIS_SHIFT 16
+#define PORT_HW_CFG_SERDES_TX_DRV_PRE_EMPHASIS_MASK 0x0000FFFF
+#define PORT_HW_CFG_SERDES_TX_DRV_PRE_EMPHASIS_SHIFT 0
-#define PORT_HW_CFG_SERDES_RX_DRV_EQUALIZER_MASK 0x0000ffff
-#define PORT_HW_CFG_SERDES_RX_DRV_EQUALIZER_SHIFT 0
+#define PORT_HW_CFG_SERDES_RX_DRV_EQUALIZER_MASK 0xFFFF0000
+#define PORT_HW_CFG_SERDES_RX_DRV_EQUALIZER_SHIFT 16
- u16 serdes_tx_driver_pre_emphasis[16];
- u16 serdes_rx_driver_equalizer[16];
- u32 xgxs_config_lane0;
- u32 xgxs_config_lane1;
- u32 xgxs_config_lane2;
- u32 xgxs_config_lane3;
- /* for external PHY, or forced mode or during AN */
-#define PORT_HW_CFG_XGXS_TX_DRV_PRE_EMPHASIS_MASK 0xffff0000
-#define PORT_HW_CFG_XGXS_TX_DRV_PRE_EMPHASIS_SHIFT 16
+ u32 Reserved0[16]; /* 0x158 */
-#define PORT_HW_CFG_XGXS_RX_DRV_EQUALIZER_MASK 0x0000ffff
-#define PORT_HW_CFG_XGXS_RX_DRV_EQUALIZER_SHIFT 0
+ /* for external PHY, or forced mode or during AN */
+ u16 xgxs_config_rx[4]; /* 0x198 */
- u16 xgxs_tx_driver_pre_emphasis_lane0[16];
- u16 xgxs_tx_driver_pre_emphasis_lane1[16];
- u16 xgxs_tx_driver_pre_emphasis_lane2[16];
- u16 xgxs_tx_driver_pre_emphasis_lane3[16];
+ u16 xgxs_config_tx[4]; /* 0x1A0 */
- u16 xgxs_rx_driver_equalizer_lane0[16];
- u16 xgxs_rx_driver_equalizer_lane1[16];
- u16 xgxs_rx_driver_equalizer_lane2[16];
- u16 xgxs_rx_driver_equalizer_lane3[16];
+ u32 Reserved1[64]; /* 0x1A8 */
u32 lane_config;
#define PORT_HW_CFG_LANE_SWAP_CFG_MASK 0x0000ffff
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073 0x00000300
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8705 0x00000400
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706 0x00000500
-#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8276 0x00000600
+#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726 0x00000600
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8481 0x00000700
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101 0x00000800
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE 0x0000fd00
u32 config; /* 0x450 */
#define SHARED_FEATURE_BMC_ECHO_MODE_EN 0x00000001
+
+ /* Use the values from options 47 and 48 instead of the HW default
+ values */
+#define SHARED_FEAT_CFG_OVERRIDE_PREEMPHASIS_CFG_DISABLED 0x00000000
+#define SHARED_FEAT_CFG_OVERRIDE_PREEMPHASIS_CFG_ENABLED 0x00000002
+
#define SHARED_FEATURE_MF_MODE_DISABLED 0x00000100
};
#define PORT_FEATURE_MBA_ENABLED 0x02000000
#define PORT_FEATURE_MFW_ENABLED 0x04000000
+ /* Check the optic vendor via i2c before allowing it to be used by
+ SW */
+#define PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLED 0x00000000
+#define PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_ENABLED 0x08000000
+
u32 wol_config;
/* Default is used when driver sets to "auto" mode */
#define PORT_FEATURE_WOL_DEFAULT_MASK 0x00000003
/****************************************************************************
* Device Information *
****************************************************************************/
-struct dev_info { /* size */
+struct shm_dev_info { /* size */
u32 bc_rev; /* 8 bits each: major, minor, build */ /* 4 */
u32 port_stx;
- u32 reserved[2];
+ u32 stat_nig_timer;
+
+ /* MCP firmware does not use this field */
+ u32 ext_phy_fw_version;
};
struct shared_mf_cfg shared_mf_config;
struct port_mf_cfg port_mf_config[PORT_MAX];
-#if defined(b710)
- struct func_mf_cfg func_mf_config[E1_FUNC_MAX];
-#else
struct func_mf_cfg func_mf_config[E1H_FUNC_MAX];
-#endif
};
#define SHR_MEM_VALIDITY_ACTIVE_MFW_NONE 0x000001c0
#define SHR_MEM_VALIDITY_ACTIVE_MFW_MASK 0x000001c0
- struct dev_info dev_info; /* 0x8 (0x438) */
+ struct shm_dev_info dev_info; /* 0x8 (0x438) */
u8 reserved[52*PORT_MAX];
* attention bits
*/
struct atten_def_status_block {
- u32 attn_bits;
- u32 attn_bits_ack;
+ __le32 attn_bits;
+ __le32 attn_bits_ack;
u8 status_block_id;
u8 reserved0;
- u16 attn_bits_index;
- u32 reserved1;
+ __le16 attn_bits_index;
+ __le32 reserved1;
};
* Parser parsing flags field
*/
struct parsing_flags {
- u16 flags;
+ __le16 flags;
#define PARSING_FLAGS_ETHERNET_ADDRESS_TYPE (0x1<<0)
#define PARSING_FLAGS_ETHERNET_ADDRESS_TYPE_SHIFT 0
#define PARSING_FLAGS_VLAN (0x1<<1)
struct regpair {
- u32 lo;
- u32 hi;
+ __le32 lo;
+ __le32 hi;
};
#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_TPA_SHIFT 2
#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_SGE_RING (0x1<<3)
#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_SGE_RING_SHIFT 3
-#define __USTORM_ETH_ST_CONTEXT_CONFIG_RESERVED0 (0xF<<4)
-#define __USTORM_ETH_ST_CONTEXT_CONFIG_RESERVED0_SHIFT 4
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_STATISTICS (0x1<<4)
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_STATISTICS_SHIFT 4
+#define __USTORM_ETH_ST_CONTEXT_CONFIG_RESERVED0 (0x7<<5)
+#define __USTORM_ETH_ST_CONTEXT_CONFIG_RESERVED0_SHIFT 5
u8 status_block_id;
u8 clientId;
u8 sb_index_numbers;
#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_TPA_SHIFT 2
#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_SGE_RING (0x1<<3)
#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_SGE_RING_SHIFT 3
-#define __USTORM_ETH_ST_CONTEXT_CONFIG_RESERVED0 (0xF<<4)
-#define __USTORM_ETH_ST_CONTEXT_CONFIG_RESERVED0_SHIFT 4
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_STATISTICS (0x1<<4)
+#define USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_STATISTICS_SHIFT 4
+#define __USTORM_ETH_ST_CONTEXT_CONFIG_RESERVED0 (0x7<<5)
+#define __USTORM_ETH_ST_CONTEXT_CONFIG_RESERVED0_SHIFT 5
#endif
#if defined(__BIG_ENDIAN)
u16 bd_buff_size;
* The eth Rx Buffer Descriptor
*/
struct eth_rx_bd {
- u32 addr_lo;
- u32 addr_hi;
+ __le32 addr_lo;
+ __le32 addr_hi;
};
/*
* The eth Rx SGE Descriptor
*/
struct eth_rx_sge {
- u32 addr_lo;
- u32 addr_hi;
+ __le32 addr_lo;
+ __le32 addr_hi;
};
/*
};
/*
- * The eth aggregative context section of Tstorm
+ * The eth extra aggregative context section of Tstorm
*/
struct tstorm_eth_extra_ag_context_section {
u32 __agg_val1;
* The eth Tx Buffer Descriptor
*/
struct eth_tx_bd {
- u32 addr_lo;
- u32 addr_hi;
- u16 nbd;
- u16 nbytes;
- u16 vlan;
+ __le32 addr_lo;
+ __le32 addr_hi;
+ __le16 nbd;
+ __le16 nbytes;
+ __le16 vlan;
struct eth_tx_bd_flags bd_flags;
u8 general_data;
#define ETH_TX_BD_HDR_NBDS (0x3F<<0)
#define ETH_TX_PARSE_BD_CWR_FLG_SHIFT 7
u8 ip_hlen;
s8 cs_offset;
- u16 total_hlen;
- u16 lso_mss;
- u16 tcp_pseudo_csum;
- u16 ip_id;
- u32 tcp_send_seq;
+ __le16 total_hlen;
+ __le16 lso_mss;
+ __le16 tcp_pseudo_csum;
+ __le16 ip_id;
+ __le32 tcp_send_seq;
};
/*
* ustorm status block
*/
struct ustorm_def_status_block {
- u16 index_values[HC_USTORM_DEF_SB_NUM_INDICES];
- u16 status_block_index;
+ __le16 index_values[HC_USTORM_DEF_SB_NUM_INDICES];
+ __le16 status_block_index;
u8 func;
u8 status_block_id;
- u32 __flags;
+ __le32 __flags;
};
/*
* cstorm status block
*/
struct cstorm_def_status_block {
- u16 index_values[HC_CSTORM_DEF_SB_NUM_INDICES];
- u16 status_block_index;
+ __le16 index_values[HC_CSTORM_DEF_SB_NUM_INDICES];
+ __le16 status_block_index;
u8 func;
u8 status_block_id;
- u32 __flags;
+ __le32 __flags;
};
/*
* xstorm status block
*/
struct xstorm_def_status_block {
- u16 index_values[HC_XSTORM_DEF_SB_NUM_INDICES];
- u16 status_block_index;
+ __le16 index_values[HC_XSTORM_DEF_SB_NUM_INDICES];
+ __le16 status_block_index;
u8 func;
u8 status_block_id;
- u32 __flags;
+ __le32 __flags;
};
/*
* tstorm status block
*/
struct tstorm_def_status_block {
- u16 index_values[HC_TSTORM_DEF_SB_NUM_INDICES];
- u16 status_block_index;
+ __le16 index_values[HC_TSTORM_DEF_SB_NUM_INDICES];
+ __le16 status_block_index;
u8 func;
u8 status_block_id;
- u32 __flags;
+ __le32 __flags;
};
/*
* ustorm status block
*/
struct ustorm_status_block {
- u16 index_values[HC_USTORM_SB_NUM_INDICES];
- u16 status_block_index;
+ __le16 index_values[HC_USTORM_SB_NUM_INDICES];
+ __le16 status_block_index;
u8 func;
u8 status_block_id;
- u32 __flags;
+ __le32 __flags;
};
/*
* cstorm status block
*/
struct cstorm_status_block {
- u16 index_values[HC_CSTORM_SB_NUM_INDICES];
- u16 status_block_index;
+ __le16 index_values[HC_CSTORM_SB_NUM_INDICES];
+ __le16 status_block_index;
u8 func;
u8 status_block_id;
- u32 __flags;
+ __le32 __flags;
};
/*
#define ETH_FAST_PATH_RX_CQE_L4_XSUM_NO_VALIDATION_FLG_SHIFT 7
u8 placement_offset;
u8 queue_index;
- u32 rss_hash_result;
- u16 vlan_tag;
- u16 pkt_len;
- u16 len_on_bd;
+ __le32 rss_hash_result;
+ __le16 vlan_tag;
+ __le16 pkt_len;
+ __le16 len_on_bd;
struct parsing_flags pars_flags;
- u16 sgl[8];
+ __le16 sgl[8];
};
* Place holder for ramrods protocol specific data
*/
struct ramrod_data {
- u32 data_lo;
- u32 data_hi;
+ __le32 data_lo;
+ __le32 data_hi;
};
/*
/*
- * Rx Last BD in page (in ETH)
- */
-struct eth_rx_bd_next_page {
- u32 addr_lo;
- u32 addr_hi;
- u8 reserved[8];
-};
-
-
-/*
* Eth Rx Cqe structure- general structure for ramrods
*/
struct common_ramrod_eth_rx_cqe {
#define COMMON_RAMROD_ETH_RX_CQE_RESERVED0 (0x7F<<1)
#define COMMON_RAMROD_ETH_RX_CQE_RESERVED0_SHIFT 1
u8 conn_type;
- u16 reserved1;
- u32 conn_and_cmd_data;
+ __le16 reserved1;
+ __le32 conn_and_cmd_data;
#define COMMON_RAMROD_ETH_RX_CQE_CID (0xFFFFFF<<0)
#define COMMON_RAMROD_ETH_RX_CQE_CID_SHIFT 0
#define COMMON_RAMROD_ETH_RX_CQE_CMD_ID (0xFF<<24)
#define COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT 24
struct ramrod_data protocol_data;
- u32 reserved2[4];
+ __le32 reserved2[4];
};
/*
* Rx Last CQE in page (in ETH)
*/
struct eth_rx_cqe_next_page {
- u32 addr_lo;
- u32 addr_hi;
- u32 reserved[6];
+ __le32 addr_lo;
+ __le32 addr_hi;
+ __le32 reserved[6];
};
/*
* common data for all protocols
*/
struct spe_hdr {
- u32 conn_and_cmd_data;
+ __le32 conn_and_cmd_data;
#define SPE_HDR_CID (0xFFFFFF<<0)
#define SPE_HDR_CID_SHIFT 0
#define SPE_HDR_CMD_ID (0xFF<<24)
#define SPE_HDR_CMD_ID_SHIFT 24
- u16 type;
+ __le16 type;
#define SPE_HDR_CONN_TYPE (0xFF<<0)
#define SPE_HDR_CONN_TYPE_SHIFT 0
#define SPE_HDR_COMMON_RAMROD (0xFF<<8)
#define SPE_HDR_COMMON_RAMROD_SHIFT 8
- u16 reserved;
+ __le16 reserved;
};
/*
* doorbell data in host memory
*/
struct eth_tx_db_data {
- u32 packets_prod;
- u16 bds_prod;
- u16 reserved;
+ __le32 packets_prod;
+ __le16 bds_prod;
+ __le16 reserved;
};
* MAC address in list for ramrod
*/
struct tstorm_cam_entry {
- u16 lsb_mac_addr;
- u16 middle_mac_addr;
- u16 msb_mac_addr;
- u16 flags;
+ __le16 lsb_mac_addr;
+ __le16 middle_mac_addr;
+ __le16 msb_mac_addr;
+ __le16 flags;
#define TSTORM_CAM_ENTRY_PORT_ID (0x1<<0)
#define TSTORM_CAM_ENTRY_PORT_ID_SHIFT 0
#define TSTORM_CAM_ENTRY_RSRVVAL0 (0x7<<1)
* MAC address in list for ramrod
*/
struct mac_configuration_entry_e1h {
- u16 lsb_mac_addr;
- u16 middle_mac_addr;
- u16 msb_mac_addr;
- u16 vlan_id;
- u16 e1hov_id;
+ __le16 lsb_mac_addr;
+ __le16 middle_mac_addr;
+ __le16 msb_mac_addr;
+ __le16 vlan_id;
+ __le16 e1hov_id;
u8 client_id;
u8 flags;
#define MAC_CONFIGURATION_ENTRY_E1H_PORT (0x1<<0)
/*
+ * rx rings pause data for E1h only
+ */
+struct ustorm_eth_rx_pause_data_e1h {
+#if defined(__BIG_ENDIAN)
+ u16 bd_thr_low;
+ u16 cqe_thr_low;
+#elif defined(__LITTLE_ENDIAN)
+ u16 cqe_thr_low;
+ u16 bd_thr_low;
+#endif
+#if defined(__BIG_ENDIAN)
+ u16 cos;
+ u16 sge_thr_low;
+#elif defined(__LITTLE_ENDIAN)
+ u16 sge_thr_low;
+ u16 cos;
+#endif
+#if defined(__BIG_ENDIAN)
+ u16 bd_thr_high;
+ u16 cqe_thr_high;
+#elif defined(__LITTLE_ENDIAN)
+ u16 cqe_thr_high;
+ u16 bd_thr_high;
+#endif
+#if defined(__BIG_ENDIAN)
+ u16 reserved0;
+ u16 sge_thr_high;
+#elif defined(__LITTLE_ENDIAN)
+ u16 sge_thr_high;
+ u16 reserved0;
+#endif
+};
+
+
+/*
* Three RX producers for ETH
*/
struct ustorm_eth_rx_producers {
*/
struct cmng_flags_per_port {
u8 con_number[NUM_OF_PROTOCOLS];
-#if defined(__BIG_ENDIAN)
- u8 fairness_enable;
- u8 rate_shaping_enable;
- u8 cmng_protocol_enable;
- u8 cmng_vn_enable;
-#elif defined(__LITTLE_ENDIAN)
- u8 cmng_vn_enable;
- u8 cmng_protocol_enable;
- u8 rate_shaping_enable;
- u8 fairness_enable;
-#endif
+ u32 cmng_enables;
+#define CMNG_FLAGS_PER_PORT_FAIRNESS_VN (0x1<<0)
+#define CMNG_FLAGS_PER_PORT_FAIRNESS_VN_SHIFT 0
+#define CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN (0x1<<1)
+#define CMNG_FLAGS_PER_PORT_RATE_SHAPING_VN_SHIFT 1
+#define CMNG_FLAGS_PER_PORT_FAIRNESS_PROTOCOL (0x1<<2)
+#define CMNG_FLAGS_PER_PORT_FAIRNESS_PROTOCOL_SHIFT 2
+#define CMNG_FLAGS_PER_PORT_RATE_SHAPING_PROTOCOL (0x1<<3)
+#define CMNG_FLAGS_PER_PORT_RATE_SHAPING_PROTOCOL_SHIFT 3
+#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS (0x1<<4)
+#define CMNG_FLAGS_PER_PORT_FAIRNESS_COS_SHIFT 4
+#define __CMNG_FLAGS_PER_PORT_RESERVED0 (0x7FFFFFF<<5)
+#define __CMNG_FLAGS_PER_PORT_RESERVED0_SHIFT 5
};
*/
struct xstorm_per_client_stats {
struct regpair total_sent_bytes;
- u32 total_sent_pkts;
- u32 unicast_pkts_sent;
+ __le32 total_sent_pkts;
+ __le32 unicast_pkts_sent;
struct regpair unicast_bytes_sent;
struct regpair multicast_bytes_sent;
- u32 multicast_pkts_sent;
- u32 broadcast_pkts_sent;
+ __le32 multicast_pkts_sent;
+ __le32 broadcast_pkts_sent;
struct regpair broadcast_bytes_sent;
- u16 stats_counter;
- u16 reserved0;
- u32 reserved1;
+ __le16 stats_counter;
+ __le16 reserved0;
+ __le32 reserved1;
};
* Protocol-common statistics collected by the Tstorm (per port)
*/
struct tstorm_per_port_stats {
- u32 mac_filter_discard;
- u32 xxoverflow_discard;
- u32 brb_truncate_discard;
- u32 mac_discard;
+ __le32 mac_filter_discard;
+ __le32 xxoverflow_discard;
+ __le32 brb_truncate_discard;
+ __le32 mac_discard;
};
struct regpair rcv_broadcast_bytes;
struct regpair rcv_multicast_bytes;
struct regpair rcv_error_bytes;
- u32 checksum_discard;
- u32 packets_too_big_discard;
- u32 total_rcv_pkts;
- u32 rcv_unicast_pkts;
- u32 rcv_broadcast_pkts;
- u32 rcv_multicast_pkts;
- u32 no_buff_discard;
- u32 ttl0_discard;
- u16 stats_counter;
- u16 reserved0;
- u32 reserved1;
+ __le32 checksum_discard;
+ __le32 packets_too_big_discard;
+ __le32 total_rcv_pkts;
+ __le32 rcv_unicast_pkts;
+ __le32 rcv_broadcast_pkts;
+ __le32 rcv_multicast_pkts;
+ __le32 no_buff_discard;
+ __le32 ttl0_discard;
+ __le16 stats_counter;
+ __le16 reserved0;
+ __le32 reserved1;
};
/*
};
/*
+ * Protocol-common statistics collected by the Ustorm (per client)
+ */
+struct ustorm_per_client_stats {
+ struct regpair ucast_no_buff_bytes;
+ struct regpair mcast_no_buff_bytes;
+ struct regpair bcast_no_buff_bytes;
+ __le32 ucast_no_buff_pkts;
+ __le32 mcast_no_buff_pkts;
+ __le32 bcast_no_buff_pkts;
+ __le16 stats_counter;
+ __le16 reserved0;
+};
+
+/*
+ * Protocol-common statistics collected by the Ustorm
+ */
+struct ustorm_common_stats {
+ struct ustorm_per_client_stats client_statistics[MAX_U_STAT_COUNTER_ID];
+};
+
+/*
* Eth statistics query structure for the eth_stats_query ramrod
*/
struct eth_stats_query {
struct xstorm_common_stats xstorm_common;
struct tstorm_common_stats tstorm_common;
+ struct ustorm_common_stats ustorm_common;
};
* per-vnic fairness variables
*/
struct fairness_vars_per_vn {
+ u32 cos_credit_delta[MAX_COS_NUMBER];
u32 protocol_credit_delta[NUM_OF_PROTOCOLS];
u32 vn_credit_delta;
u32 __reserved0;
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