ath9k: RX stucks during heavy traffic in HT40 mode.

[safe/jmp/linux-2.6] / drivers / net / bnx2x.h

diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index 5eb35a6..8bd80fc 100644 (file)
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -160,7 +160,7 @@ struct sw_rx_page {
 #define PAGES_PER_SGE                  (1 << PAGES_PER_SGE_SHIFT)
 #define SGE_PAGE_SIZE                  PAGE_SIZE
 #define SGE_PAGE_SHIFT                 PAGE_SHIFT
-#define SGE_PAGE_ALIGN(addr)           PAGE_ALIGN(addr)
+#define SGE_PAGE_ALIGN(addr)           PAGE_ALIGN((typeof(PAGE_SIZE))(addr))
 
 /* SGE ring related macros */
 #define NUM_RX_SGE_PAGES               2
@@ -902,11 +902,13 @@ struct bnx2x {
        u16                     rx_quick_cons_trip;
        u16                     rx_ticks_int;
        u16                     rx_ticks;
+/* Maximal coalescing timeout in us */
+#define BNX2X_MAX_COALESCE_TOUT                (0xf0*12)
 
        u32                     lin_cnt;
 
        int                     state;
-#define BNX2X_STATE_CLOSED             0x0
+#define BNX2X_STATE_CLOSED             0
 #define BNX2X_STATE_OPENING_WAIT4_LOAD 0x1000
 #define BNX2X_STATE_OPENING_WAIT4_PORT 0x2000
 #define BNX2X_STATE_OPEN               0x3000
@@ -965,6 +967,21 @@ struct bnx2x {
        int                     gunzip_outlen;
 #define FW_BUF_SIZE                    0x8000
 
+       struct raw_op          *init_ops;
+       /* Init blocks offsets inside init_ops */
+       u16                    *init_ops_offsets;
+       /* Data blob - has 32 bit granularity */
+       u32                    *init_data;
+       /* Zipped PRAM blobs - raw data */
+       const u8               *tsem_int_table_data;
+       const u8               *tsem_pram_data;
+       const u8               *usem_int_table_data;
+       const u8               *usem_pram_data;
+       const u8               *xsem_int_table_data;
+       const u8               *xsem_pram_data;
+       const u8               *csem_int_table_data;
+       const u8               *csem_pram_data;
+        const struct firmware  *firmware;
 };
 
 
@@ -989,6 +1006,7 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
 int bnx2x_get_gpio(struct bnx2x *bp, int gpio_num, u8 port);
 int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port);
 int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port);
+u32 bnx2x_fw_command(struct bnx2x *bp, u32 command);
 
 static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms,
                           int wait)