V4L/DVB (9724): cx18: Streamline cx18-io[ch] wrappers and enforce MMIO retry strategy

[safe/jmp/linux-2.6] / drivers / media / video / cx18 / cx18-io.c

diff --git a/drivers/media/video/cx18/cx18-io.c b/drivers/media/video/cx18/cx18-io.c
index c67694f..a2b5e80 100644 (file)
--- a/drivers/media/video/cx18/cx18-io.c
+++ b/drivers/media/video/cx18/cx18-io.c
@@ -31,12 +31,6 @@ void cx18_log_statistics(struct cx18 *cx)
        if (!(cx18_debug & CX18_DBGFLG_INFO))
                return;
 
-       for (i = 0; i <= CX18_MAX_MMIO_WR_RETRIES; i++)
-               CX18_DEBUG_INFO("retried_write[%d] = %d\n", i,
-                               atomic_read(&cx->mmio_stats.retried_write[i]));
-       for (i = 0; i <= CX18_MAX_MMIO_RD_RETRIES; i++)
-               CX18_DEBUG_INFO("retried_read[%d] = %d\n", i,
-                               atomic_read(&cx->mmio_stats.retried_read[i]));
        for (i = 0; i <= CX18_MAX_MB_ACK_DELAY; i++)
                if (atomic_read(&cx->mbox_stats.mb_ack_delay[i]))
                        CX18_DEBUG_INFO("mb_ack_delay[%d] = %d\n", i,
@@ -44,128 +38,6 @@ void cx18_log_statistics(struct cx18 *cx)
        return;
 }
 
-void cx18_raw_writel_retry(struct cx18 *cx, u32 val, void __iomem *addr)
-{
-       int i;
-       for (i = 0; i < CX18_MAX_MMIO_WR_RETRIES; i++) {
-               cx18_raw_writel_noretry(cx, val, addr);
-               if (val == cx18_raw_readl_noretry(cx, addr))
-                       break;
-       }
-       cx18_log_write_retries(cx, i, addr);
-}
-
-u32 cx18_raw_readl_retry(struct cx18 *cx, const void __iomem *addr)
-{
-       int i;
-       u32 val;
-       for (i = 0; i < CX18_MAX_MMIO_RD_RETRIES; i++) {
-               val = cx18_raw_readl_noretry(cx, addr);
-               if (val != 0xffffffff) /* PCI bus read error */
-                       break;
-       }
-       cx18_log_read_retries(cx, i, addr);
-       return val;
-}
-
-u16 cx18_raw_readw_retry(struct cx18 *cx, const void __iomem *addr)
-{
-       int i;
-       u16 val;
-       for (i = 0; i < CX18_MAX_MMIO_RD_RETRIES; i++) {
-               val = cx18_raw_readw_noretry(cx, addr);
-               if (val != 0xffff) /* PCI bus read error */
-                       break;
-       }
-       cx18_log_read_retries(cx, i, addr);
-       return val;
-}
-
-void cx18_writel_retry(struct cx18 *cx, u32 val, void __iomem *addr)
-{
-       int i;
-       for (i = 0; i < CX18_MAX_MMIO_WR_RETRIES; i++) {
-               cx18_writel_noretry(cx, val, addr);
-               if (val == cx18_readl_noretry(cx, addr))
-                       break;
-       }
-       cx18_log_write_retries(cx, i, addr);
-}
-
-void _cx18_writel_expect(struct cx18 *cx, u32 val, void __iomem *addr,
-                        u32 eval, u32 mask)
-{
-       int i;
-       eval &= mask;
-       for (i = 0; i < CX18_MAX_MMIO_WR_RETRIES; i++) {
-               cx18_writel_noretry(cx, val, addr);
-               if (eval == (cx18_readl_noretry(cx, addr) & mask))
-                       break;
-       }
-       cx18_log_write_retries(cx, i, addr);
-}
-
-void cx18_writew_retry(struct cx18 *cx, u16 val, void __iomem *addr)
-{
-       int i;
-       for (i = 0; i < CX18_MAX_MMIO_WR_RETRIES; i++) {
-               cx18_writew_noretry(cx, val, addr);
-               if (val == cx18_readw_noretry(cx, addr))
-                       break;
-       }
-       cx18_log_write_retries(cx, i, addr);
-}
-
-void cx18_writeb_retry(struct cx18 *cx, u8 val, void __iomem *addr)
-{
-       int i;
-       for (i = 0; i < CX18_MAX_MMIO_WR_RETRIES; i++) {
-               cx18_writeb_noretry(cx, val, addr);
-               if (val == cx18_readb_noretry(cx, addr))
-                       break;
-       }
-       cx18_log_write_retries(cx, i, addr);
-}
-
-u32 cx18_readl_retry(struct cx18 *cx, const void __iomem *addr)
-{
-       int i;
-       u32 val;
-       for (i = 0; i < CX18_MAX_MMIO_RD_RETRIES; i++) {
-               val = cx18_readl_noretry(cx, addr);
-               if (val != 0xffffffff) /* PCI bus read error */
-                       break;
-       }
-       cx18_log_read_retries(cx, i, addr);
-       return val;
-}
-
-u16 cx18_readw_retry(struct cx18 *cx, const void __iomem *addr)
-{
-       int i;
-       u16 val;
-       for (i = 0; i < CX18_MAX_MMIO_RD_RETRIES; i++) {
-               val = cx18_readw_noretry(cx, addr);
-               if (val != 0xffff) /* PCI bus read error */
-                       break;
-       }
-       cx18_log_read_retries(cx, i, addr);
-       return val;
-}
-
-u8 cx18_readb_retry(struct cx18 *cx, const void __iomem *addr)
-{
-       int i;
-       u8 val;
-       for (i = 0; i < CX18_MAX_MMIO_RD_RETRIES; i++) {
-               val = cx18_readb_noretry(cx, addr);
-               if (val != 0xff) /* PCI bus read error */
-                       break;
-       }
-       cx18_log_read_retries(cx, i, addr);
-       return val;
-}
-
 void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count)
 {
        u8 __iomem *dst = addr;