V4L/DVB (9724): cx18: Streamline cx18-io[ch] wrappers and enforce MMIO retry strategy
[safe/jmp/linux-2.6] / drivers / media / video / cx18 / cx18-io.c
index 55d1df9..a2b5e80 100644 (file)
 #include "cx18-io.h"
 #include "cx18-irq.h"
 
-void cx18_memcpy_fromio(struct cx18 *cx, void *to,
-                       const void __iomem *from, unsigned int len)
+void cx18_log_statistics(struct cx18 *cx)
 {
-       const u8 __iomem *src = from;
-       u8 *dst = to;
+       int i;
 
-       /* Align reads on the CX23418's addresses */
-       if ((len > 0) && ((unsigned long) src & 1)) {
-               *dst = cx18_readb(cx, src);
-               len--;
-               dst++;
-               src++;
-       }
-       if ((len > 1) && ((unsigned long) src & 2)) {
-               *((u16 *)dst) = cx18_raw_readw(cx, src);
-               len -= 2;
-               dst += 2;
-               src += 2;
-       }
-       while (len > 3) {
-               *((u32 *)dst) = cx18_raw_readl(cx, src);
-               len -= 4;
-               dst += 4;
-               src += 4;
-       }
-       if (len > 1) {
-               *((u16 *)dst) = cx18_raw_readw(cx, src);
-               len -= 2;
-               dst += 2;
-               src += 2;
-       }
-       if (len > 0)
-               *dst = cx18_readb(cx, src);
+       if (!(cx18_debug & CX18_DBGFLG_INFO))
+               return;
+
+       for (i = 0; i <= CX18_MAX_MB_ACK_DELAY; i++)
+               if (atomic_read(&cx->mbox_stats.mb_ack_delay[i]))
+                       CX18_DEBUG_INFO("mb_ack_delay[%d] = %d\n", i,
+                                 atomic_read(&cx->mbox_stats.mb_ack_delay[i]));
+       return;
 }
 
 void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count)
@@ -93,7 +72,7 @@ void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count)
 void cx18_sw1_irq_enable(struct cx18 *cx, u32 val)
 {
        u32 r;
-       cx18_write_reg(cx, val, SW1_INT_STATUS);
+       cx18_write_reg_expect(cx, val, SW1_INT_STATUS, ~val, val);
        r = cx18_read_reg(cx, SW1_INT_ENABLE_PCI);
        cx18_write_reg(cx, r | val, SW1_INT_ENABLE_PCI);
 }
@@ -108,7 +87,7 @@ void cx18_sw1_irq_disable(struct cx18 *cx, u32 val)
 void cx18_sw2_irq_enable(struct cx18 *cx, u32 val)
 {
        u32 r;
-       cx18_write_reg(cx, val, SW2_INT_STATUS);
+       cx18_write_reg_expect(cx, val, SW2_INT_STATUS, ~val, val);
        r = cx18_read_reg(cx, SW2_INT_ENABLE_PCI);
        cx18_write_reg(cx, r | val, SW2_INT_ENABLE_PCI);
 }
@@ -120,6 +99,13 @@ void cx18_sw2_irq_disable(struct cx18 *cx, u32 val)
        cx18_write_reg(cx, r & ~val, SW2_INT_ENABLE_PCI);
 }
 
+void cx18_sw2_irq_disable_cpu(struct cx18 *cx, u32 val)
+{
+       u32 r;
+       r = cx18_read_reg(cx, SW2_INT_ENABLE_CPU);
+       cx18_write_reg(cx, r & ~val, SW2_INT_ENABLE_CPU);
+}
+
 void cx18_setup_page(struct cx18 *cx, u32 addr)
 {
        u32 val;
@@ -127,13 +113,3 @@ void cx18_setup_page(struct cx18 *cx, u32 addr)
        val = (val & ~0x1f00) | ((addr >> 17) & 0x1f00);
        cx18_write_reg(cx, val, 0xD000F8);
 }
-
-/* Tries to recover from the CX23418 responding improperly on the PCI bus */
-int cx18_pci_try_recover(struct cx18 *cx)
-{
-       u16 status;
-
-       pci_read_config_word(cx->dev, PCI_STATUS, &status);
-       pci_write_config_word(cx->dev, PCI_STATUS, status);
-       return 0;
-}