ide: re-implement ide_pci_init_one() on top of ide_pci_init_two()

[safe/jmp/linux-2.6] / drivers / ide / cmd64x.c

diff --git a/drivers/ide/cmd64x.c b/drivers/ide/cmd64x.c
index d1fc198..80b777e 100644 (file)
--- a/drivers/ide/cmd64x.c
+++ b/drivers/ide/cmd64x.c
@@ -138,10 +138,12 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
         * the slowest address setup timing ourselves.
         */
        if (hwif->channel) {
-               ide_drive_t *drives = hwif->drives;
+               ide_drive_t *pair = ide_get_pair_dev(drive);
 
                drive->drive_data = setup_count;
-               setup_count = max(drives[0].drive_data, drives[1].drive_data);
+
+               if (pair)
+                       setup_count = max_t(u8, setup_count, pair->drive_data);
        }
 
        if (setup_count > 5)            /* shouldn't actually happen... */
@@ -316,7 +318,6 @@ static int cmd646_1_dma_end(ide_drive_t *drive)
        ide_hwif_t *hwif = drive->hwif;
        u8 dma_stat = 0, dma_cmd = 0;
 
-       drive->waiting_for_dma = 0;
        /* get DMA status */
        dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
        /* read DMA command state */
@@ -325,13 +326,11 @@ static int cmd646_1_dma_end(ide_drive_t *drive)
        outb(dma_cmd & ~1, hwif->dma_base + ATA_DMA_CMD);
        /* clear the INTR & ERROR bits */
        outb(dma_stat | 6, hwif->dma_base + ATA_DMA_STATUS);
-       /* and free any DMA resources */
-       ide_destroy_dmatable(drive);
        /* verify good DMA status */
        return (dma_stat & 7) != 4;
 }
 
-static unsigned int init_chipset_cmd64x(struct pci_dev *dev)
+static int init_chipset_cmd64x(struct pci_dev *dev)
 {
        u8 mrdmode = 0;
 
@@ -377,34 +376,34 @@ static const struct ide_port_ops cmd64x_port_ops = {
 static const struct ide_dma_ops cmd64x_dma_ops = {
        .dma_host_set           = ide_dma_host_set,
        .dma_setup              = ide_dma_setup,
-       .dma_exec_cmd           = ide_dma_exec_cmd,
        .dma_start              = ide_dma_start,
        .dma_end                = cmd64x_dma_end,
        .dma_test_irq           = cmd64x_dma_test_irq,
        .dma_lost_irq           = ide_dma_lost_irq,
-       .dma_timeout            = ide_dma_timeout,
+       .dma_timer_expiry       = ide_dma_sff_timer_expiry,
+       .dma_sff_read_status    = ide_dma_sff_read_status,
 };
 
 static const struct ide_dma_ops cmd646_rev1_dma_ops = {
        .dma_host_set           = ide_dma_host_set,
        .dma_setup              = ide_dma_setup,
-       .dma_exec_cmd           = ide_dma_exec_cmd,
        .dma_start              = ide_dma_start,
        .dma_end                = cmd646_1_dma_end,
        .dma_test_irq           = ide_dma_test_irq,
        .dma_lost_irq           = ide_dma_lost_irq,
-       .dma_timeout            = ide_dma_timeout,
+       .dma_timer_expiry       = ide_dma_sff_timer_expiry,
+       .dma_sff_read_status    = ide_dma_sff_read_status,
 };
 
 static const struct ide_dma_ops cmd648_dma_ops = {
        .dma_host_set           = ide_dma_host_set,
        .dma_setup              = ide_dma_setup,
-       .dma_exec_cmd           = ide_dma_exec_cmd,
        .dma_start              = ide_dma_start,
        .dma_end                = cmd648_dma_end,
        .dma_test_irq           = cmd648_dma_test_irq,
        .dma_lost_irq           = ide_dma_lost_irq,
-       .dma_timeout            = ide_dma_timeout,
+       .dma_timer_expiry       = ide_dma_sff_timer_expiry,
+       .dma_sff_read_status    = ide_dma_sff_read_status,
 };
 
 static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {