/*
- * dme1737.c - driver for the SMSC DME1737 and Asus A8000 Super-I/O chips
- * integrated hardware monitoring features.
- * Copyright (c) 2007 Juerg Haefliger <juergh@gmail.com>
+ * dme1737.c - Driver for the SMSC DME1737, Asus A8000, SMSC SCH311x and
+ * SCH5027 Super-I/O chips integrated hardware monitoring features.
+ * Copyright (c) 2007, 2008 Juerg Haefliger <juergh@gmail.com>
*
- * This driver is based on the LM85 driver. The hardware monitoring
- * capabilities of the DME1737 are very similar to the LM85 with some
- * additional features. Even though the DME1737 is a Super-I/O chip, the
- * hardware monitoring registers are only accessible via SMBus.
+ * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access
+ * the chip registers if a DME1737, A8000, or SCH5027 is found and the ISA bus
+ * if a SCH311x chip is found. Both types of chips have very similar hardware
+ * monitoring capabilities but differ in the way they can be accessed.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
#include <linux/slab.h>
#include <linux/jiffies.h>
#include <linux/i2c.h>
+#include <linux/platform_device.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon-vid.h>
#include <linux/err.h>
#include <linux/mutex.h>
-#include <asm/io.h>
+#include <linux/acpi.h>
+#include <linux/io.h>
+
+/* ISA device, if found */
+static struct platform_device *pdev;
/* Module load parameters */
static int force_start;
module_param(force_start, bool, 0);
MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs");
+static unsigned short force_id;
+module_param(force_id, ushort, 0);
+MODULE_PARM_DESC(force_id, "Override the detected device ID");
+
+static int probe_all_addr;
+module_param(probe_all_addr, bool, 0);
+MODULE_PARM_DESC(probe_all_addr, "Include probing of non-standard LPC "
+ "addresses");
+
/* Addresses to scan */
-static unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END};
+static const unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END};
-/* Insmod parameters */
-I2C_CLIENT_INSMOD_1(dme1737);
+enum chips { dme1737, sch5027, sch311x };
/* ---------------------------------------------------------------------
* Registers
static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23};
/* Miscellaneous registers */
+#define DME1737_REG_DEVICE 0x3d
#define DME1737_REG_COMPANY 0x3e
#define DME1737_REG_VERSTEP 0x3f
#define DME1737_REG_CONFIG 0x40
#define DME1737_COMPANY_SMSC 0x5c
#define DME1737_VERSTEP 0x88
#define DME1737_VERSTEP_MASK 0xf8
+#define SCH311X_DEVICE 0x8c
+#define SCH5027_VERSTEP 0x69
+
+/* Length of ISA address segment */
+#define DME1737_EXTENT 2
/* ---------------------------------------------------------------------
* Data structures and manipulation thereof
* --------------------------------------------------------------------- */
struct dme1737_data {
- struct i2c_client client;
- struct class_device *class_dev;
+ struct i2c_client *client; /* for I2C devices only */
+ struct device *hwmon_dev;
+ const char *name;
+ unsigned int addr; /* for ISA devices only */
struct mutex update_lock;
int valid; /* !=0 if following fields are valid */
unsigned long last_update; /* in jiffies */
unsigned long last_vbat; /* in jiffies */
+ enum chips type;
+ const int *in_nominal; /* pointer to IN_NOMINAL array */
u8 vid;
u8 pwm_rr_en;
};
/* Nominal voltage values */
-static const int IN_NOMINAL[] = {5000, 2250, 3300, 5000, 12000, 3300, 3300};
+static const int IN_NOMINAL_DME1737[] = {5000, 2250, 3300, 5000, 12000, 3300,
+ 3300};
+static const int IN_NOMINAL_SCH311x[] = {2500, 1500, 3300, 5000, 12000, 3300,
+ 3300};
+static const int IN_NOMINAL_SCH5027[] = {5000, 2250, 3300, 1125, 1125, 3300,
+ 3300};
+#define IN_NOMINAL(type) ((type) == sch311x ? IN_NOMINAL_SCH311x : \
+ (type) == sch5027 ? IN_NOMINAL_SCH5027 : \
+ IN_NOMINAL_DME1737)
/* Voltage input
* Voltage inputs have 16 bits resolution, limit values have 8 bits
* resolution. */
-static inline int IN_FROM_REG(int reg, int ix, int res)
+static inline int IN_FROM_REG(int reg, int nominal, int res)
{
- return (reg * IN_NOMINAL[ix] + (3 << (res - 3))) / (3 << (res - 2));
+ return (reg * nominal + (3 << (res - 3))) / (3 << (res - 2));
}
-static inline int IN_TO_REG(int val, int ix)
+static inline int IN_TO_REG(int val, int nominal)
{
- return SENSORS_LIMIT((val * 192 + IN_NOMINAL[ix] / 2) /
- IN_NOMINAL[ix], 0, 255);
+ return SENSORS_LIMIT((val * 192 + nominal / 2) / nominal, 0, 255);
}
/* Temperature input
/* Fan input RPM */
static inline int FAN_FROM_REG(int reg, int tpc)
{
- return (reg == 0 || reg == 0xffff) ? 0 :
- (tpc == 0) ? 90000 * 60 / reg : tpc * reg;
+ if (tpc) {
+ return tpc * reg;
+ } else {
+ return (reg == 0 || reg == 0xffff) ? 0 : 90000 * 60 / reg;
+ }
}
static inline int FAN_TO_REG(int val, int tpc)
{
- return SENSORS_LIMIT((tpc == 0) ? 90000 * 60 / val : val / tpc,
- 0, 0xffff);
+ if (tpc) {
+ return SENSORS_LIMIT(val / tpc, 0, 0xffff);
+ } else {
+ return (val <= 0) ? 0xffff :
+ SENSORS_LIMIT(90000 * 60 / val, 0, 0xfffe);
+ }
}
/* Fan TPC (tach pulse count)
/* ---------------------------------------------------------------------
* Device I/O access
+ *
+ * ISA access is performed through an index/data register pair and needs to
+ * be protected by a mutex during runtime (not required for initialization).
+ * We use data->update_lock for this and need to ensure that we acquire it
+ * before calling dme1737_read or dme1737_write.
* --------------------------------------------------------------------- */
-static u8 dme1737_read(struct i2c_client *client, u8 reg)
+static u8 dme1737_read(const struct dme1737_data *data, u8 reg)
{
- s32 val = i2c_smbus_read_byte_data(client, reg);
+ struct i2c_client *client = data->client;
+ s32 val;
+
+ if (client) { /* I2C device */
+ val = i2c_smbus_read_byte_data(client, reg);
- if (val < 0) {
- dev_warn(&client->dev, "Read from register 0x%02x failed! "
- "Please report to the driver maintainer.\n", reg);
+ if (val < 0) {
+ dev_warn(&client->dev, "Read from register "
+ "0x%02x failed! Please report to the driver "
+ "maintainer.\n", reg);
+ }
+ } else { /* ISA device */
+ outb(reg, data->addr);
+ val = inb(data->addr + 1);
}
return val;
}
-static s32 dme1737_write(struct i2c_client *client, u8 reg, u8 value)
+static s32 dme1737_write(const struct dme1737_data *data, u8 reg, u8 val)
{
- s32 res = i2c_smbus_write_byte_data(client, reg, value);
+ struct i2c_client *client = data->client;
+ s32 res = 0;
+
+ if (client) { /* I2C device */
+ res = i2c_smbus_write_byte_data(client, reg, val);
- if (res < 0) {
- dev_warn(&client->dev, "Write to register 0x%02x failed! "
- "Please report to the driver maintainer.\n", reg);
+ if (res < 0) {
+ dev_warn(&client->dev, "Write to register "
+ "0x%02x failed! Please report to the driver "
+ "maintainer.\n", reg);
+ }
+ } else { /* ISA device */
+ outb(reg, data->addr);
+ outb(val, data->addr + 1);
}
return res;
static struct dme1737_data *dme1737_update_device(struct device *dev)
{
struct dme1737_data *data = dev_get_drvdata(dev);
- struct i2c_client *client = &data->client;
int ix;
u8 lsb[5];
/* Enable a Vbat monitoring cycle every 10 mins */
if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) {
- dme1737_write(client, DME1737_REG_CONFIG, dme1737_read(client,
+ dme1737_write(data, DME1737_REG_CONFIG, dme1737_read(data,
DME1737_REG_CONFIG) | 0x10);
data->last_vbat = jiffies;
}
/* Sample register contents every 1 sec */
if (time_after(jiffies, data->last_update + HZ) || !data->valid) {
- data->vid = dme1737_read(client, DME1737_REG_VID) & 0x3f;
+ if (data->type == dme1737) {
+ data->vid = dme1737_read(data, DME1737_REG_VID) &
+ 0x3f;
+ }
/* In (voltage) registers */
for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
/* Voltage inputs are stored as 16 bit values even
* though they have only 12 bits resolution. This is
* to make it consistent with the temp inputs. */
- data->in[ix] = dme1737_read(client,
+ data->in[ix] = dme1737_read(data,
DME1737_REG_IN(ix)) << 8;
- data->in_min[ix] = dme1737_read(client,
+ data->in_min[ix] = dme1737_read(data,
DME1737_REG_IN_MIN(ix));
- data->in_max[ix] = dme1737_read(client,
+ data->in_max[ix] = dme1737_read(data,
DME1737_REG_IN_MAX(ix));
}
* to take advantage of implicit conversions between
* register values (2's complement) and temp values
* (signed decimal). */
- data->temp[ix] = dme1737_read(client,
+ data->temp[ix] = dme1737_read(data,
DME1737_REG_TEMP(ix)) << 8;
- data->temp_min[ix] = dme1737_read(client,
+ data->temp_min[ix] = dme1737_read(data,
DME1737_REG_TEMP_MIN(ix));
- data->temp_max[ix] = dme1737_read(client,
+ data->temp_max[ix] = dme1737_read(data,
DME1737_REG_TEMP_MAX(ix));
- data->temp_offset[ix] = dme1737_read(client,
- DME1737_REG_TEMP_OFFSET(ix));
+ if (data->type != sch5027) {
+ data->temp_offset[ix] = dme1737_read(data,
+ DME1737_REG_TEMP_OFFSET(ix));
+ }
}
/* In and temp LSB registers
* which the registers are read (MSB first, then LSB) is
* important! */
for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) {
- lsb[ix] = dme1737_read(client,
+ lsb[ix] = dme1737_read(data,
DME1737_REG_IN_TEMP_LSB(ix));
}
for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
if (!(data->has_fan & (1 << ix))) {
continue;
}
- data->fan[ix] = dme1737_read(client,
+ data->fan[ix] = dme1737_read(data,
DME1737_REG_FAN(ix));
- data->fan[ix] |= dme1737_read(client,
+ data->fan[ix] |= dme1737_read(data,
DME1737_REG_FAN(ix) + 1) << 8;
- data->fan_min[ix] = dme1737_read(client,
+ data->fan_min[ix] = dme1737_read(data,
DME1737_REG_FAN_MIN(ix));
- data->fan_min[ix] |= dme1737_read(client,
+ data->fan_min[ix] |= dme1737_read(data,
DME1737_REG_FAN_MIN(ix) + 1) << 8;
- data->fan_opt[ix] = dme1737_read(client,
+ data->fan_opt[ix] = dme1737_read(data,
DME1737_REG_FAN_OPT(ix));
/* fan_max exists only for fan[5-6] */
if (ix > 3) {
- data->fan_max[ix - 4] = dme1737_read(client,
+ data->fan_max[ix - 4] = dme1737_read(data,
DME1737_REG_FAN_MAX(ix));
}
}
if (!(data->has_pwm & (1 << ix))) {
continue;
}
- data->pwm[ix] = dme1737_read(client,
+ data->pwm[ix] = dme1737_read(data,
DME1737_REG_PWM(ix));
- data->pwm_freq[ix] = dme1737_read(client,
+ data->pwm_freq[ix] = dme1737_read(data,
DME1737_REG_PWM_FREQ(ix));
/* pwm_config and pwm_min exist only for pwm[1-3] */
if (ix < 3) {
- data->pwm_config[ix] = dme1737_read(client,
+ data->pwm_config[ix] = dme1737_read(data,
DME1737_REG_PWM_CONFIG(ix));
- data->pwm_min[ix] = dme1737_read(client,
+ data->pwm_min[ix] = dme1737_read(data,
DME1737_REG_PWM_MIN(ix));
}
}
for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) {
- data->pwm_rr[ix] = dme1737_read(client,
+ data->pwm_rr[ix] = dme1737_read(data,
DME1737_REG_PWM_RR(ix));
}
/* Thermal zone registers */
for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) {
- data->zone_low[ix] = dme1737_read(client,
+ data->zone_low[ix] = dme1737_read(data,
DME1737_REG_ZONE_LOW(ix));
- data->zone_abs[ix] = dme1737_read(client,
+ data->zone_abs[ix] = dme1737_read(data,
DME1737_REG_ZONE_ABS(ix));
}
- for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) {
- data->zone_hyst[ix] = dme1737_read(client,
+ if (data->type != sch5027) {
+ for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) {
+ data->zone_hyst[ix] = dme1737_read(data,
DME1737_REG_ZONE_HYST(ix));
+ }
}
/* Alarm registers */
- data->alarms = dme1737_read(client,
+ data->alarms = dme1737_read(data,
DME1737_REG_ALARM1);
/* Bit 7 tells us if the other alarm registers are non-zero and
* therefore also need to be read */
if (data->alarms & 0x80) {
- data->alarms |= dme1737_read(client,
+ data->alarms |= dme1737_read(data,
DME1737_REG_ALARM2) << 8;
- data->alarms |= dme1737_read(client,
+ data->alarms |= dme1737_read(data,
DME1737_REG_ALARM3) << 16;
}
+ /* The ISA chips require explicit clearing of alarm bits.
+ * Don't worry, an alarm will come back if the condition
+ * that causes it still exists */
+ if (!data->client) {
+ if (data->alarms & 0xff0000) {
+ dme1737_write(data, DME1737_REG_ALARM3,
+ 0xff);
+ }
+ if (data->alarms & 0xff00) {
+ dme1737_write(data, DME1737_REG_ALARM2,
+ 0xff);
+ }
+ if (data->alarms & 0xff) {
+ dme1737_write(data, DME1737_REG_ALARM1,
+ 0xff);
+ }
+ }
+
data->last_update = jiffies;
data->valid = 1;
}
switch (fn) {
case SYS_IN_INPUT:
- res = IN_FROM_REG(data->in[ix], ix, 16);
+ res = IN_FROM_REG(data->in[ix], data->in_nominal[ix], 16);
break;
case SYS_IN_MIN:
- res = IN_FROM_REG(data->in_min[ix], ix, 8);
+ res = IN_FROM_REG(data->in_min[ix], data->in_nominal[ix], 8);
break;
case SYS_IN_MAX:
- res = IN_FROM_REG(data->in_max[ix], ix, 8);
+ res = IN_FROM_REG(data->in_max[ix], data->in_nominal[ix], 8);
break;
case SYS_IN_ALARM:
res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01;
const char *buf, size_t count)
{
struct dme1737_data *data = dev_get_drvdata(dev);
- struct i2c_client *client = &data->client;
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
mutex_lock(&data->update_lock);
switch (fn) {
case SYS_IN_MIN:
- data->in_min[ix] = IN_TO_REG(val, ix);
- dme1737_write(client, DME1737_REG_IN_MIN(ix),
+ data->in_min[ix] = IN_TO_REG(val, data->in_nominal[ix]);
+ dme1737_write(data, DME1737_REG_IN_MIN(ix),
data->in_min[ix]);
break;
case SYS_IN_MAX:
- data->in_max[ix] = IN_TO_REG(val, ix);
- dme1737_write(client, DME1737_REG_IN_MAX(ix),
+ data->in_max[ix] = IN_TO_REG(val, data->in_nominal[ix]);
+ dme1737_write(data, DME1737_REG_IN_MAX(ix),
data->in_max[ix]);
break;
default:
const char *buf, size_t count)
{
struct dme1737_data *data = dev_get_drvdata(dev);
- struct i2c_client *client = &data->client;
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
switch (fn) {
case SYS_TEMP_MIN:
data->temp_min[ix] = TEMP_TO_REG(val);
- dme1737_write(client, DME1737_REG_TEMP_MIN(ix),
+ dme1737_write(data, DME1737_REG_TEMP_MIN(ix),
data->temp_min[ix]);
break;
case SYS_TEMP_MAX:
data->temp_max[ix] = TEMP_TO_REG(val);
- dme1737_write(client, DME1737_REG_TEMP_MAX(ix),
+ dme1737_write(data, DME1737_REG_TEMP_MAX(ix),
data->temp_max[ix]);
break;
case SYS_TEMP_OFFSET:
data->temp_offset[ix] = TEMP_TO_REG(val);
- dme1737_write(client, DME1737_REG_TEMP_OFFSET(ix),
+ dme1737_write(data, DME1737_REG_TEMP_OFFSET(ix),
data->temp_offset[ix]);
break;
default:
const char *buf, size_t count)
{
struct dme1737_data *data = dev_get_drvdata(dev);
- struct i2c_client *client = &data->client;
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
switch (fn) {
case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
/* Refresh the cache */
- data->zone_low[ix] = dme1737_read(client,
+ data->zone_low[ix] = dme1737_read(data,
DME1737_REG_ZONE_LOW(ix));
/* Modify the temp hyst value */
data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG(
TEMP_FROM_REG(data->zone_low[ix], 8) -
- val, ix, dme1737_read(client,
+ val, ix, dme1737_read(data,
DME1737_REG_ZONE_HYST(ix == 2)));
- dme1737_write(client, DME1737_REG_ZONE_HYST(ix == 2),
+ dme1737_write(data, DME1737_REG_ZONE_HYST(ix == 2),
data->zone_hyst[ix == 2]);
break;
case SYS_ZONE_AUTO_POINT1_TEMP:
data->zone_low[ix] = TEMP_TO_REG(val);
- dme1737_write(client, DME1737_REG_ZONE_LOW(ix),
+ dme1737_write(data, DME1737_REG_ZONE_LOW(ix),
data->zone_low[ix]);
break;
case SYS_ZONE_AUTO_POINT2_TEMP:
/* Refresh the cache */
- data->zone_low[ix] = dme1737_read(client,
+ data->zone_low[ix] = dme1737_read(data,
DME1737_REG_ZONE_LOW(ix));
/* Modify the temp range value (which is stored in the upper
* nibble of the pwm_freq register) */
data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val -
TEMP_FROM_REG(data->zone_low[ix], 8),
- dme1737_read(client,
+ dme1737_read(data,
DME1737_REG_PWM_FREQ(ix)));
- dme1737_write(client, DME1737_REG_PWM_FREQ(ix),
+ dme1737_write(data, DME1737_REG_PWM_FREQ(ix),
data->pwm_freq[ix]);
break;
case SYS_ZONE_AUTO_POINT3_TEMP:
data->zone_abs[ix] = TEMP_TO_REG(val);
- dme1737_write(client, DME1737_REG_ZONE_ABS(ix),
+ dme1737_write(data, DME1737_REG_ZONE_ABS(ix),
data->zone_abs[ix]);
break;
default:
const char *buf, size_t count)
{
struct dme1737_data *data = dev_get_drvdata(dev);
- struct i2c_client *client = &data->client;
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
data->fan_min[ix] = FAN_TO_REG(val, 0);
} else {
/* Refresh the cache */
- data->fan_opt[ix] = dme1737_read(client,
+ data->fan_opt[ix] = dme1737_read(data,
DME1737_REG_FAN_OPT(ix));
/* Modify the fan min value */
data->fan_min[ix] = FAN_TO_REG(val,
FAN_TPC_FROM_REG(data->fan_opt[ix]));
}
- dme1737_write(client, DME1737_REG_FAN_MIN(ix),
+ dme1737_write(data, DME1737_REG_FAN_MIN(ix),
data->fan_min[ix] & 0xff);
- dme1737_write(client, DME1737_REG_FAN_MIN(ix) + 1,
+ dme1737_write(data, DME1737_REG_FAN_MIN(ix) + 1,
data->fan_min[ix] >> 8);
break;
case SYS_FAN_MAX:
/* Only valid for fan[5-6] */
data->fan_max[ix - 4] = FAN_MAX_TO_REG(val);
- dme1737_write(client, DME1737_REG_FAN_MAX(ix),
+ dme1737_write(data, DME1737_REG_FAN_MAX(ix),
data->fan_max[ix - 4]);
break;
case SYS_FAN_TYPE:
/* Only valid for fan[1-4] */
if (!(val == 1 || val == 2 || val == 4)) {
count = -EINVAL;
- dev_warn(&client->dev, "Fan type value %ld not "
+ dev_warn(dev, "Fan type value %ld not "
"supported. Choose one of 1, 2, or 4.\n",
val);
goto exit;
}
- data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(client,
+ data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(data,
DME1737_REG_FAN_OPT(ix)));
- dme1737_write(client, DME1737_REG_FAN_OPT(ix),
+ dme1737_write(data, DME1737_REG_FAN_OPT(ix),
data->fan_opt[ix]);
break;
default:
res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]);
break;
case SYS_PWM_ENABLE:
- if (ix > 3) {
+ if (ix >= 3) {
res = 1; /* pwm[5-6] hard-wired to manual mode */
} else {
res = PWM_EN_FROM_REG(data->pwm_config[ix]);
return sprintf(buf, "%d\n", res);
}
-static struct attribute *dme1737_attr_pwm[];
+static struct attribute *dme1737_pwm_chmod_attr[];
static void dme1737_chmod_file(struct device*, struct attribute*, mode_t);
static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct dme1737_data *data = dev_get_drvdata(dev);
- struct i2c_client *client = &data->client;
struct sensor_device_attribute_2
*sensor_attr_2 = to_sensor_dev_attr_2(attr);
int ix = sensor_attr_2->index;
switch (fn) {
case SYS_PWM:
data->pwm[ix] = SENSORS_LIMIT(val, 0, 255);
- dme1737_write(client, DME1737_REG_PWM(ix), data->pwm[ix]);
+ dme1737_write(data, DME1737_REG_PWM(ix), data->pwm[ix]);
break;
case SYS_PWM_FREQ:
- data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(client,
+ data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(data,
DME1737_REG_PWM_FREQ(ix)));
- dme1737_write(client, DME1737_REG_PWM_FREQ(ix),
+ dme1737_write(data, DME1737_REG_PWM_FREQ(ix),
data->pwm_freq[ix]);
break;
case SYS_PWM_ENABLE:
/* Only valid for pwm[1-3] */
if (val < 0 || val > 2) {
count = -EINVAL;
- dev_warn(&client->dev, "PWM enable %ld not "
+ dev_warn(dev, "PWM enable %ld not "
"supported. Choose one of 0, 1, or 2.\n",
val);
goto exit;
}
/* Refresh the cache */
- data->pwm_config[ix] = dme1737_read(client,
+ data->pwm_config[ix] = dme1737_read(data,
DME1737_REG_PWM_CONFIG(ix));
if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) {
/* Bail out if no change */
data->pwm_acz[ix] = PWM_ACZ_FROM_REG(
data->pwm_config[ix]);
/* Save the current ramp rate state and disable it */
- data->pwm_rr[ix > 0] = dme1737_read(client,
+ data->pwm_rr[ix > 0] = dme1737_read(data,
DME1737_REG_PWM_RR(ix > 0));
data->pwm_rr_en &= ~(1 << ix);
if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) {
data->pwm_rr_en |= (1 << ix);
data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix,
data->pwm_rr[ix > 0]);
- dme1737_write(client,
+ dme1737_write(data,
DME1737_REG_PWM_RR(ix > 0),
data->pwm_rr[ix > 0]);
}
switch (val) {
case 0:
/* Change permissions of pwm[ix] to read-only */
- dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
+ dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
S_IRUGO);
/* Turn fan fully on */
data->pwm_config[ix] = PWM_EN_TO_REG(0,
data->pwm_config[ix]);
- dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
+ dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
data->pwm_config[ix]);
break;
case 1:
/* Turn on manual mode */
data->pwm_config[ix] = PWM_EN_TO_REG(1,
data->pwm_config[ix]);
- dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
+ dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
data->pwm_config[ix]);
/* Change permissions of pwm[ix] to read-writeable */
- dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
+ dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
S_IRUGO | S_IWUSR);
break;
case 2:
/* Change permissions of pwm[ix] to read-only */
- dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
+ dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix],
S_IRUGO);
/* Turn on auto mode using the saved zone channel
* assignment */
data->pwm_config[ix] = PWM_ACZ_TO_REG(
data->pwm_acz[ix],
data->pwm_config[ix]);
- dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
+ dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
data->pwm_config[ix]);
/* Enable PWM ramp rate if previously enabled */
if (data->pwm_rr_en & (1 << ix)) {
data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix,
- dme1737_read(client,
+ dme1737_read(data,
DME1737_REG_PWM_RR(ix > 0)));
- dme1737_write(client,
+ dme1737_write(data,
DME1737_REG_PWM_RR(ix > 0),
data->pwm_rr[ix > 0]);
}
case SYS_PWM_RAMP_RATE:
/* Only valid for pwm[1-3] */
/* Refresh the cache */
- data->pwm_config[ix] = dme1737_read(client,
+ data->pwm_config[ix] = dme1737_read(data,
DME1737_REG_PWM_CONFIG(ix));
- data->pwm_rr[ix > 0] = dme1737_read(client,
+ data->pwm_rr[ix > 0] = dme1737_read(data,
DME1737_REG_PWM_RR(ix > 0));
/* Set the ramp rate value */
if (val > 0) {
data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix,
data->pwm_rr[ix > 0]);
}
- dme1737_write(client, DME1737_REG_PWM_RR(ix > 0),
+ dme1737_write(data, DME1737_REG_PWM_RR(ix > 0),
data->pwm_rr[ix > 0]);
break;
case SYS_PWM_AUTO_CHANNELS_ZONE:
if (!(val == 1 || val == 2 || val == 4 ||
val == 6 || val == 7)) {
count = -EINVAL;
- dev_warn(&client->dev, "PWM auto channels zone %ld "
+ dev_warn(dev, "PWM auto channels zone %ld "
"not supported. Choose one of 1, 2, 4, 6, "
"or 7.\n", val);
goto exit;
}
/* Refresh the cache */
- data->pwm_config[ix] = dme1737_read(client,
+ data->pwm_config[ix] = dme1737_read(data,
DME1737_REG_PWM_CONFIG(ix));
if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
/* PWM is already in auto mode so update the temp
* channel assignment */
data->pwm_config[ix] = PWM_ACZ_TO_REG(val,
data->pwm_config[ix]);
- dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
+ dme1737_write(data, DME1737_REG_PWM_CONFIG(ix),
data->pwm_config[ix]);
} else {
/* PWM is not in auto mode so we save the temp
case SYS_PWM_AUTO_PWM_MIN:
/* Only valid for pwm[1-3] */
/* Refresh the cache */
- data->pwm_min[ix] = dme1737_read(client,
+ data->pwm_min[ix] = dme1737_read(data,
DME1737_REG_PWM_MIN(ix));
/* There are only 2 values supported for the auto_pwm_min
* value: 0 or auto_point1_pwm. So if the temperature drops
* off or runs at auto_point1_pwm duty-cycle. */
if (val > ((data->pwm_min[ix] + 1) / 2)) {
data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix,
- dme1737_read(client,
+ dme1737_read(data,
DME1737_REG_PWM_RR(0)));
} else {
data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix,
- dme1737_read(client,
+ dme1737_read(data,
DME1737_REG_PWM_RR(0)));
}
- dme1737_write(client, DME1737_REG_PWM_RR(0),
+ dme1737_write(data, DME1737_REG_PWM_RR(0),
data->pwm_rr[0]);
break;
case SYS_PWM_AUTO_POINT1_PWM:
/* Only valid for pwm[1-3] */
data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255);
- dme1737_write(client, DME1737_REG_PWM_MIN(ix),
+ dme1737_write(data, DME1737_REG_PWM_MIN(ix),
data->pwm_min[ix]);
break;
default:
return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
}
+static ssize_t show_name(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct dme1737_data *data = dev_get_drvdata(dev);
+
+ return sprintf(buf, "%s\n", data->name);
+}
+
/* ---------------------------------------------------------------------
* Sysfs device attribute defines and structs
* --------------------------------------------------------------------- */
/* PWMs 5-6 */
#define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \
-static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO | S_IWUSR, \
+static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
show_pwm, set_pwm, SYS_PWM, ix-1); \
-static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO | S_IWUSR, \
+static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
show_pwm, NULL, SYS_PWM_ENABLE, ix-1)
static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm);
static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
-
-#define SENSOR_DEV_ATTR_IN(ix) \
-&sensor_dev_attr_in##ix##_input.dev_attr.attr, \
-&sensor_dev_attr_in##ix##_min.dev_attr.attr, \
-&sensor_dev_attr_in##ix##_max.dev_attr.attr, \
-&sensor_dev_attr_in##ix##_alarm.dev_attr.attr
-
-/* These attributes are read-writeable only if the chip is *not* locked */
-#define SENSOR_DEV_ATTR_TEMP_LOCK(ix) \
-&sensor_dev_attr_temp##ix##_offset.dev_attr.attr
-
-#define SENSOR_DEV_ATTR_TEMP(ix) \
-SENSOR_DEV_ATTR_TEMP_LOCK(ix), \
-&sensor_dev_attr_temp##ix##_input.dev_attr.attr, \
-&sensor_dev_attr_temp##ix##_min.dev_attr.attr, \
-&sensor_dev_attr_temp##ix##_max.dev_attr.attr, \
-&sensor_dev_attr_temp##ix##_alarm.dev_attr.attr, \
-&sensor_dev_attr_temp##ix##_fault.dev_attr.attr
-
-/* These attributes are read-writeable only if the chip is *not* locked */
-#define SENSOR_DEV_ATTR_ZONE_LOCK(ix) \
-&sensor_dev_attr_zone##ix##_auto_point1_temp_hyst.dev_attr.attr, \
-&sensor_dev_attr_zone##ix##_auto_point1_temp.dev_attr.attr, \
-&sensor_dev_attr_zone##ix##_auto_point2_temp.dev_attr.attr, \
-&sensor_dev_attr_zone##ix##_auto_point3_temp.dev_attr.attr
-
-#define SENSOR_DEV_ATTR_ZONE(ix) \
-SENSOR_DEV_ATTR_ZONE_LOCK(ix), \
-&sensor_dev_attr_zone##ix##_auto_channels_temp.dev_attr.attr
-
-#define SENSOR_DEV_ATTR_FAN_1TO4(ix) \
-&sensor_dev_attr_fan##ix##_input.dev_attr.attr, \
-&sensor_dev_attr_fan##ix##_min.dev_attr.attr, \
-&sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \
-&sensor_dev_attr_fan##ix##_type.dev_attr.attr
-
-#define SENSOR_DEV_ATTR_FAN_5TO6(ix) \
-&sensor_dev_attr_fan##ix##_input.dev_attr.attr, \
-&sensor_dev_attr_fan##ix##_min.dev_attr.attr, \
-&sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \
-&sensor_dev_attr_fan##ix##_max.dev_attr.attr
-
-/* These attributes are read-writeable only if the chip is *not* locked */
-#define SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix) \
-&sensor_dev_attr_pwm##ix##_freq.dev_attr.attr, \
-&sensor_dev_attr_pwm##ix##_enable.dev_attr.attr, \
-&sensor_dev_attr_pwm##ix##_ramp_rate.dev_attr.attr, \
-&sensor_dev_attr_pwm##ix##_auto_channels_zone.dev_attr.attr, \
-&sensor_dev_attr_pwm##ix##_auto_pwm_min.dev_attr.attr, \
-&sensor_dev_attr_pwm##ix##_auto_point1_pwm.dev_attr.attr
-
-#define SENSOR_DEV_ATTR_PWM_1TO3(ix) \
-SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix), \
-&sensor_dev_attr_pwm##ix.dev_attr.attr, \
-&sensor_dev_attr_pwm##ix##_auto_point2_pwm.dev_attr.attr
-
-/* These attributes are read-writeable only if the chip is *not* locked */
-#define SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix) \
-&sensor_dev_attr_pwm##ix.dev_attr.attr, \
-&sensor_dev_attr_pwm##ix##_freq.dev_attr.attr
-
-#define SENSOR_DEV_ATTR_PWM_5TO6(ix) \
-SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix), \
-&sensor_dev_attr_pwm##ix##_enable.dev_attr.attr
+static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */
/* This struct holds all the attributes that are always present and need to be
* created unconditionally. The attributes that need modification of their
* on the fly when required */
static struct attribute *dme1737_attr[] ={
/* Voltages */
- SENSOR_DEV_ATTR_IN(0),
- SENSOR_DEV_ATTR_IN(1),
- SENSOR_DEV_ATTR_IN(2),
- SENSOR_DEV_ATTR_IN(3),
- SENSOR_DEV_ATTR_IN(4),
- SENSOR_DEV_ATTR_IN(5),
- SENSOR_DEV_ATTR_IN(6),
+ &sensor_dev_attr_in0_input.dev_attr.attr,
+ &sensor_dev_attr_in0_min.dev_attr.attr,
+ &sensor_dev_attr_in0_max.dev_attr.attr,
+ &sensor_dev_attr_in0_alarm.dev_attr.attr,
+ &sensor_dev_attr_in1_input.dev_attr.attr,
+ &sensor_dev_attr_in1_min.dev_attr.attr,
+ &sensor_dev_attr_in1_max.dev_attr.attr,
+ &sensor_dev_attr_in1_alarm.dev_attr.attr,
+ &sensor_dev_attr_in2_input.dev_attr.attr,
+ &sensor_dev_attr_in2_min.dev_attr.attr,
+ &sensor_dev_attr_in2_max.dev_attr.attr,
+ &sensor_dev_attr_in2_alarm.dev_attr.attr,
+ &sensor_dev_attr_in3_input.dev_attr.attr,
+ &sensor_dev_attr_in3_min.dev_attr.attr,
+ &sensor_dev_attr_in3_max.dev_attr.attr,
+ &sensor_dev_attr_in3_alarm.dev_attr.attr,
+ &sensor_dev_attr_in4_input.dev_attr.attr,
+ &sensor_dev_attr_in4_min.dev_attr.attr,
+ &sensor_dev_attr_in4_max.dev_attr.attr,
+ &sensor_dev_attr_in4_alarm.dev_attr.attr,
+ &sensor_dev_attr_in5_input.dev_attr.attr,
+ &sensor_dev_attr_in5_min.dev_attr.attr,
+ &sensor_dev_attr_in5_max.dev_attr.attr,
+ &sensor_dev_attr_in5_alarm.dev_attr.attr,
+ &sensor_dev_attr_in6_input.dev_attr.attr,
+ &sensor_dev_attr_in6_min.dev_attr.attr,
+ &sensor_dev_attr_in6_max.dev_attr.attr,
+ &sensor_dev_attr_in6_alarm.dev_attr.attr,
/* Temperatures */
- SENSOR_DEV_ATTR_TEMP(1),
- SENSOR_DEV_ATTR_TEMP(2),
- SENSOR_DEV_ATTR_TEMP(3),
+ &sensor_dev_attr_temp1_input.dev_attr.attr,
+ &sensor_dev_attr_temp1_min.dev_attr.attr,
+ &sensor_dev_attr_temp1_max.dev_attr.attr,
+ &sensor_dev_attr_temp1_alarm.dev_attr.attr,
+ &sensor_dev_attr_temp1_fault.dev_attr.attr,
+ &sensor_dev_attr_temp2_input.dev_attr.attr,
+ &sensor_dev_attr_temp2_min.dev_attr.attr,
+ &sensor_dev_attr_temp2_max.dev_attr.attr,
+ &sensor_dev_attr_temp2_alarm.dev_attr.attr,
+ &sensor_dev_attr_temp2_fault.dev_attr.attr,
+ &sensor_dev_attr_temp3_input.dev_attr.attr,
+ &sensor_dev_attr_temp3_min.dev_attr.attr,
+ &sensor_dev_attr_temp3_max.dev_attr.attr,
+ &sensor_dev_attr_temp3_alarm.dev_attr.attr,
+ &sensor_dev_attr_temp3_fault.dev_attr.attr,
/* Zones */
- SENSOR_DEV_ATTR_ZONE(1),
- SENSOR_DEV_ATTR_ZONE(2),
- SENSOR_DEV_ATTR_ZONE(3),
- /* Misc */
- &dev_attr_vrm.attr,
- &dev_attr_cpu0_vid.attr,
+ &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr,
+ &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr,
+ &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr,
+ &sensor_dev_attr_zone1_auto_channels_temp.dev_attr.attr,
+ &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr,
+ &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr,
+ &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr,
+ &sensor_dev_attr_zone2_auto_channels_temp.dev_attr.attr,
+ &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr,
+ &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr,
+ &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr,
+ &sensor_dev_attr_zone3_auto_channels_temp.dev_attr.attr,
NULL
};
.attrs = dme1737_attr,
};
+/* The following struct holds misc attributes, which are not available in all
+ * chips. Their creation depends on the chip type which is determined during
+ * module load. */
+static struct attribute *dme1737_misc_attr[] = {
+ /* Temperatures */
+ &sensor_dev_attr_temp1_offset.dev_attr.attr,
+ &sensor_dev_attr_temp2_offset.dev_attr.attr,
+ &sensor_dev_attr_temp3_offset.dev_attr.attr,
+ /* Zones */
+ &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr,
+ &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr,
+ &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr,
+ NULL
+};
+
+static const struct attribute_group dme1737_misc_group = {
+ .attrs = dme1737_misc_attr,
+};
+
+/* The following struct holds VID-related attributes. Their creation
+ depends on the chip type which is determined during module load. */
+static struct attribute *dme1737_vid_attr[] = {
+ &dev_attr_vrm.attr,
+ &dev_attr_cpu0_vid.attr,
+ NULL
+};
+
+static const struct attribute_group dme1737_vid_group = {
+ .attrs = dme1737_vid_attr,
+};
+
/* The following structs hold the PWM attributes, some of which are optional.
* Their creation depends on the chip configuration which is determined during
* module load. */
-static struct attribute *dme1737_attr_pwm1[] = {
- SENSOR_DEV_ATTR_PWM_1TO3(1),
+static struct attribute *dme1737_pwm1_attr[] = {
+ &sensor_dev_attr_pwm1.dev_attr.attr,
+ &sensor_dev_attr_pwm1_freq.dev_attr.attr,
+ &sensor_dev_attr_pwm1_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr,
+ &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr,
+ &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
+ &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
NULL
};
-static struct attribute *dme1737_attr_pwm2[] = {
- SENSOR_DEV_ATTR_PWM_1TO3(2),
+static struct attribute *dme1737_pwm2_attr[] = {
+ &sensor_dev_attr_pwm2.dev_attr.attr,
+ &sensor_dev_attr_pwm2_freq.dev_attr.attr,
+ &sensor_dev_attr_pwm2_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr,
+ &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr,
+ &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
+ &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
NULL
};
-static struct attribute *dme1737_attr_pwm3[] = {
- SENSOR_DEV_ATTR_PWM_1TO3(3),
+static struct attribute *dme1737_pwm3_attr[] = {
+ &sensor_dev_attr_pwm3.dev_attr.attr,
+ &sensor_dev_attr_pwm3_freq.dev_attr.attr,
+ &sensor_dev_attr_pwm3_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr,
+ &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr,
+ &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
+ &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
NULL
};
-static struct attribute *dme1737_attr_pwm5[] = {
- SENSOR_DEV_ATTR_PWM_5TO6(5),
+static struct attribute *dme1737_pwm5_attr[] = {
+ &sensor_dev_attr_pwm5.dev_attr.attr,
+ &sensor_dev_attr_pwm5_freq.dev_attr.attr,
+ &sensor_dev_attr_pwm5_enable.dev_attr.attr,
NULL
};
-static struct attribute *dme1737_attr_pwm6[] = {
- SENSOR_DEV_ATTR_PWM_5TO6(6),
+static struct attribute *dme1737_pwm6_attr[] = {
+ &sensor_dev_attr_pwm6.dev_attr.attr,
+ &sensor_dev_attr_pwm6_freq.dev_attr.attr,
+ &sensor_dev_attr_pwm6_enable.dev_attr.attr,
NULL
};
static const struct attribute_group dme1737_pwm_group[] = {
- { .attrs = dme1737_attr_pwm1 },
- { .attrs = dme1737_attr_pwm2 },
- { .attrs = dme1737_attr_pwm3 },
+ { .attrs = dme1737_pwm1_attr },
+ { .attrs = dme1737_pwm2_attr },
+ { .attrs = dme1737_pwm3_attr },
{ .attrs = NULL },
- { .attrs = dme1737_attr_pwm5 },
- { .attrs = dme1737_attr_pwm6 },
+ { .attrs = dme1737_pwm5_attr },
+ { .attrs = dme1737_pwm6_attr },
+};
+
+/* The following struct holds misc PWM attributes, which are not available in
+ * all chips. Their creation depends on the chip type which is determined
+ * during module load. */
+static struct attribute *dme1737_pwm_misc_attr[] = {
+ &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr,
+ &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr,
+ &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr,
};
/* The following structs hold the fan attributes, some of which are optional.
* Their creation depends on the chip configuration which is determined during
* module load. */
-static struct attribute *dme1737_attr_fan1[] = {
- SENSOR_DEV_ATTR_FAN_1TO4(1),
+static struct attribute *dme1737_fan1_attr[] = {
+ &sensor_dev_attr_fan1_input.dev_attr.attr,
+ &sensor_dev_attr_fan1_min.dev_attr.attr,
+ &sensor_dev_attr_fan1_alarm.dev_attr.attr,
+ &sensor_dev_attr_fan1_type.dev_attr.attr,
NULL
};
-static struct attribute *dme1737_attr_fan2[] = {
- SENSOR_DEV_ATTR_FAN_1TO4(2),
+static struct attribute *dme1737_fan2_attr[] = {
+ &sensor_dev_attr_fan2_input.dev_attr.attr,
+ &sensor_dev_attr_fan2_min.dev_attr.attr,
+ &sensor_dev_attr_fan2_alarm.dev_attr.attr,
+ &sensor_dev_attr_fan2_type.dev_attr.attr,
NULL
};
-static struct attribute *dme1737_attr_fan3[] = {
- SENSOR_DEV_ATTR_FAN_1TO4(3),
+static struct attribute *dme1737_fan3_attr[] = {
+ &sensor_dev_attr_fan3_input.dev_attr.attr,
+ &sensor_dev_attr_fan3_min.dev_attr.attr,
+ &sensor_dev_attr_fan3_alarm.dev_attr.attr,
+ &sensor_dev_attr_fan3_type.dev_attr.attr,
NULL
};
-static struct attribute *dme1737_attr_fan4[] = {
- SENSOR_DEV_ATTR_FAN_1TO4(4),
+static struct attribute *dme1737_fan4_attr[] = {
+ &sensor_dev_attr_fan4_input.dev_attr.attr,
+ &sensor_dev_attr_fan4_min.dev_attr.attr,
+ &sensor_dev_attr_fan4_alarm.dev_attr.attr,
+ &sensor_dev_attr_fan4_type.dev_attr.attr,
NULL
};
-static struct attribute *dme1737_attr_fan5[] = {
- SENSOR_DEV_ATTR_FAN_5TO6(5),
+static struct attribute *dme1737_fan5_attr[] = {
+ &sensor_dev_attr_fan5_input.dev_attr.attr,
+ &sensor_dev_attr_fan5_min.dev_attr.attr,
+ &sensor_dev_attr_fan5_alarm.dev_attr.attr,
+ &sensor_dev_attr_fan5_max.dev_attr.attr,
NULL
};
-static struct attribute *dme1737_attr_fan6[] = {
- SENSOR_DEV_ATTR_FAN_5TO6(6),
+static struct attribute *dme1737_fan6_attr[] = {
+ &sensor_dev_attr_fan6_input.dev_attr.attr,
+ &sensor_dev_attr_fan6_min.dev_attr.attr,
+ &sensor_dev_attr_fan6_alarm.dev_attr.attr,
+ &sensor_dev_attr_fan6_max.dev_attr.attr,
NULL
};
static const struct attribute_group dme1737_fan_group[] = {
- { .attrs = dme1737_attr_fan1 },
- { .attrs = dme1737_attr_fan2 },
- { .attrs = dme1737_attr_fan3 },
- { .attrs = dme1737_attr_fan4 },
- { .attrs = dme1737_attr_fan5 },
- { .attrs = dme1737_attr_fan6 },
+ { .attrs = dme1737_fan1_attr },
+ { .attrs = dme1737_fan2_attr },
+ { .attrs = dme1737_fan3_attr },
+ { .attrs = dme1737_fan4_attr },
+ { .attrs = dme1737_fan5_attr },
+ { .attrs = dme1737_fan6_attr },
};
-/* The permissions of all of the following attributes are changed to read-
+/* The permissions of the following zone attributes are changed to read-
* writeable if the chip is *not* locked. Otherwise they stay read-only. */
-static struct attribute *dme1737_attr_lock[] = {
- /* Temperatures */
- SENSOR_DEV_ATTR_TEMP_LOCK(1),
- SENSOR_DEV_ATTR_TEMP_LOCK(2),
- SENSOR_DEV_ATTR_TEMP_LOCK(3),
- /* Zones */
- SENSOR_DEV_ATTR_ZONE_LOCK(1),
- SENSOR_DEV_ATTR_ZONE_LOCK(2),
- SENSOR_DEV_ATTR_ZONE_LOCK(3),
+static struct attribute *dme1737_zone_chmod_attr[] = {
+ &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr,
+ &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr,
+ &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr,
+ &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr,
+ &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr,
+ &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr,
+ &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr,
+ &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr,
+ &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr,
NULL
};
-static const struct attribute_group dme1737_lock_group = {
- .attrs = dme1737_attr_lock,
+static const struct attribute_group dme1737_zone_chmod_group = {
+ .attrs = dme1737_zone_chmod_attr,
};
/* The permissions of the following PWM attributes are changed to read-
* writeable if the chip is *not* locked and the respective PWM is available.
* Otherwise they stay read-only. */
-static struct attribute *dme1737_attr_pwm1_lock[] = {
- SENSOR_DEV_ATTR_PWM_1TO3_LOCK(1),
+static struct attribute *dme1737_pwm1_chmod_attr[] = {
+ &sensor_dev_attr_pwm1_freq.dev_attr.attr,
+ &sensor_dev_attr_pwm1_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr,
+ &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr,
+ &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
NULL
};
-static struct attribute *dme1737_attr_pwm2_lock[] = {
- SENSOR_DEV_ATTR_PWM_1TO3_LOCK(2),
+static struct attribute *dme1737_pwm2_chmod_attr[] = {
+ &sensor_dev_attr_pwm2_freq.dev_attr.attr,
+ &sensor_dev_attr_pwm2_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr,
+ &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr,
+ &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
NULL
};
-static struct attribute *dme1737_attr_pwm3_lock[] = {
- SENSOR_DEV_ATTR_PWM_1TO3_LOCK(3),
+static struct attribute *dme1737_pwm3_chmod_attr[] = {
+ &sensor_dev_attr_pwm3_freq.dev_attr.attr,
+ &sensor_dev_attr_pwm3_enable.dev_attr.attr,
+ &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr,
+ &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr,
+ &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
NULL
};
-static struct attribute *dme1737_attr_pwm5_lock[] = {
- SENSOR_DEV_ATTR_PWM_5TO6_LOCK(5),
+static struct attribute *dme1737_pwm5_chmod_attr[] = {
+ &sensor_dev_attr_pwm5.dev_attr.attr,
+ &sensor_dev_attr_pwm5_freq.dev_attr.attr,
NULL
};
-static struct attribute *dme1737_attr_pwm6_lock[] = {
- SENSOR_DEV_ATTR_PWM_5TO6_LOCK(6),
+static struct attribute *dme1737_pwm6_chmod_attr[] = {
+ &sensor_dev_attr_pwm6.dev_attr.attr,
+ &sensor_dev_attr_pwm6_freq.dev_attr.attr,
NULL
};
-static const struct attribute_group dme1737_pwm_lock_group[] = {
- { .attrs = dme1737_attr_pwm1_lock },
- { .attrs = dme1737_attr_pwm2_lock },
- { .attrs = dme1737_attr_pwm3_lock },
+static const struct attribute_group dme1737_pwm_chmod_group[] = {
+ { .attrs = dme1737_pwm1_chmod_attr },
+ { .attrs = dme1737_pwm2_chmod_attr },
+ { .attrs = dme1737_pwm3_chmod_attr },
{ .attrs = NULL },
- { .attrs = dme1737_attr_pwm5_lock },
- { .attrs = dme1737_attr_pwm6_lock },
+ { .attrs = dme1737_pwm5_chmod_attr },
+ { .attrs = dme1737_pwm6_chmod_attr },
};
/* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the
* chip is not locked. Otherwise they are read-only. */
-static struct attribute *dme1737_attr_pwm[] = {
+static struct attribute *dme1737_pwm_chmod_attr[] = {
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm2.dev_attr.attr,
&sensor_dev_attr_pwm3.dev_attr.attr,
outb(val, sio_cip + 1);
}
-static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data)
-{
- int err = 0, reg;
- u16 addr;
-
- dme1737_sio_enter(sio_cip);
-
- /* Check device ID
- * The DME1737 can return either 0x78 or 0x77 as its device ID. */
- reg = dme1737_sio_inb(sio_cip, 0x20);
- if (!(reg == 0x77 || reg == 0x78)) {
- err = -ENODEV;
- goto exit;
- }
-
- /* Select logical device A (runtime registers) */
- dme1737_sio_outb(sio_cip, 0x07, 0x0a);
-
- /* Get the base address of the runtime registers */
- if (!(addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
- dme1737_sio_inb(sio_cip, 0x61))) {
- err = -ENODEV;
- goto exit;
- }
-
- /* Read the runtime registers to determine which optional features
- * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set
- * to '10' if the respective feature is enabled. */
- if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */
- data->has_fan |= (1 << 5);
- }
- if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */
- data->has_pwm |= (1 << 5);
- }
- if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */
- data->has_fan |= (1 << 4);
- }
- if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */
- data->has_pwm |= (1 << 4);
- }
-
-exit:
- dme1737_sio_exit(sio_cip);
-
- return err;
-}
-
/* ---------------------------------------------------------------------
- * Device detection, registration and initialization
+ * Device initialization
* --------------------------------------------------------------------- */
-static struct i2c_driver dme1737_i2c_driver;
+static int dme1737_i2c_get_features(int, struct dme1737_data*);
static void dme1737_chmod_file(struct device *dev,
struct attribute *attr, mode_t mode)
if (data->has_pwm & (1 << ix)) {
sysfs_remove_group(&dev->kobj,
&dme1737_pwm_group[ix]);
+ if (data->type != sch5027 && ix < 3) {
+ sysfs_remove_file(&dev->kobj,
+ dme1737_pwm_misc_attr[ix]);
+ }
}
}
+ if (data->type != sch5027) {
+ sysfs_remove_group(&dev->kobj, &dme1737_misc_group);
+ }
+ if (data->type == dme1737) {
+ sysfs_remove_group(&dev->kobj, &dme1737_vid_group);
+ }
+
sysfs_remove_group(&dev->kobj, &dme1737_group);
+
+ if (!data->client) {
+ sysfs_remove_file(&dev->kobj, &dev_attr_name.attr);
+ }
}
static int dme1737_create_files(struct device *dev)
struct dme1737_data *data = dev_get_drvdata(dev);
int err, ix;
+ /* Create a name attribute for ISA devices */
+ if (!data->client &&
+ (err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr))) {
+ goto exit;
+ }
+
/* Create standard sysfs attributes */
if ((err = sysfs_create_group(&dev->kobj, &dme1737_group))) {
- goto exit;
+ goto exit_remove;
+ }
+
+ /* Create misc sysfs attributes */
+ if ((data->type != sch5027) &&
+ (err = sysfs_create_group(&dev->kobj,
+ &dme1737_misc_group))) {
+ goto exit_remove;
+ }
+
+ /* Create VID-related sysfs attributes */
+ if ((data->type == dme1737) &&
+ (err = sysfs_create_group(&dev->kobj,
+ &dme1737_vid_group))) {
+ goto exit_remove;
}
/* Create fan sysfs attributes */
&dme1737_pwm_group[ix]))) {
goto exit_remove;
}
+ if (data->type != sch5027 && ix < 3 &&
+ (err = sysfs_create_file(&dev->kobj,
+ dme1737_pwm_misc_attr[ix]))) {
+ goto exit_remove;
+ }
}
}
dev_info(dev, "Device is locked. Some attributes "
"will be read-only.\n");
} else {
- /* Change permissions of standard attributes */
- dme1737_chmod_group(dev, &dme1737_lock_group,
+ /* Change permissions of zone sysfs attributes */
+ dme1737_chmod_group(dev, &dme1737_zone_chmod_group,
S_IRUGO | S_IWUSR);
- /* Change permissions of PWM attributes */
- for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_lock_group); ix++) {
+ /* Change permissions of misc sysfs attributes */
+ if (data->type != sch5027) {
+ dme1737_chmod_group(dev, &dme1737_misc_group,
+ S_IRUGO | S_IWUSR);
+ }
+
+ /* Change permissions of PWM sysfs attributes */
+ for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_chmod_group); ix++) {
if (data->has_pwm & (1 << ix)) {
dme1737_chmod_group(dev,
- &dme1737_pwm_lock_group[ix],
+ &dme1737_pwm_chmod_group[ix],
S_IRUGO | S_IWUSR);
+ if (data->type != sch5027 && ix < 3) {
+ dme1737_chmod_file(dev,
+ dme1737_pwm_misc_attr[ix],
+ S_IRUGO | S_IWUSR);
+ }
}
}
if ((data->has_pwm & (1 << ix)) &&
(PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) {
dme1737_chmod_file(dev,
- dme1737_attr_pwm[ix],
+ dme1737_pwm_chmod_attr[ix],
S_IRUGO | S_IWUSR);
}
}
static int dme1737_init_device(struct device *dev)
{
struct dme1737_data *data = dev_get_drvdata(dev);
- struct i2c_client *client = &data->client;
+ struct i2c_client *client = data->client;
int ix;
u8 reg;
- data->config = dme1737_read(client, DME1737_REG_CONFIG);
+ /* Point to the right nominal voltages array */
+ data->in_nominal = IN_NOMINAL(data->type);
+
+ data->config = dme1737_read(data, DME1737_REG_CONFIG);
/* Inform if part is not monitoring/started */
if (!(data->config & 0x01)) {
if (!force_start) {
/* Force monitoring */
data->config |= 0x01;
- dme1737_write(client, DME1737_REG_CONFIG, data->config);
+ dme1737_write(data, DME1737_REG_CONFIG, data->config);
}
/* Inform if part is not ready */
if (!(data->config & 0x04)) {
return -EFAULT;
}
- data->config2 = dme1737_read(client, DME1737_REG_CONFIG2);
- /* Check if optional fan3 input is enabled */
- if (data->config2 & 0x04) {
- data->has_fan |= (1 << 2);
- }
+ /* Determine which optional fan and pwm features are enabled/present */
+ if (client) { /* I2C chip */
+ data->config2 = dme1737_read(data, DME1737_REG_CONFIG2);
+ /* Check if optional fan3 input is enabled */
+ if (data->config2 & 0x04) {
+ data->has_fan |= (1 << 2);
+ }
- /* Fan4 and pwm3 are only available if the client's I2C address
- * is the default 0x2e. Otherwise the I/Os associated with these
- * functions are used for addr enable/select. */
- if (client->addr == 0x2e) {
- data->has_fan |= (1 << 3);
- data->has_pwm |= (1 << 2);
- }
+ /* Fan4 and pwm3 are only available if the client's I2C address
+ * is the default 0x2e. Otherwise the I/Os associated with
+ * these functions are used for addr enable/select. */
+ if (client->addr == 0x2e) {
+ data->has_fan |= (1 << 3);
+ data->has_pwm |= (1 << 2);
+ }
- /* Determine if the optional fan[5-6] and/or pwm[5-6] are enabled.
- * For this, we need to query the runtime registers through the
- * Super-IO LPC interface. Try both config ports 0x2e and 0x4e. */
- if (dme1737_i2c_get_features(0x2e, data) &&
- dme1737_i2c_get_features(0x4e, data)) {
- dev_warn(dev, "Failed to query Super-IO for optional "
- "features.\n");
+ /* Determine which of the optional fan[5-6] and pwm[5-6]
+ * features are enabled. For this, we need to query the runtime
+ * registers through the Super-IO LPC interface. Try both
+ * config ports 0x2e and 0x4e. */
+ if (dme1737_i2c_get_features(0x2e, data) &&
+ dme1737_i2c_get_features(0x4e, data)) {
+ dev_warn(dev, "Failed to query Super-IO for optional "
+ "features.\n");
+ }
+ } else { /* ISA chip */
+ /* Fan3 and pwm3 are always available. Fan[4-5] and pwm[5-6]
+ * don't exist in the ISA chip. */
+ data->has_fan |= (1 << 2);
+ data->has_pwm |= (1 << 2);
}
/* Fan1, fan2, pwm1, and pwm2 are always present */
(data->has_fan & (1 << 4)) ? "yes" : "no",
(data->has_fan & (1 << 5)) ? "yes" : "no");
- reg = dme1737_read(client, DME1737_REG_TACH_PWM);
+ reg = dme1737_read(data, DME1737_REG_TACH_PWM);
/* Inform if fan-to-pwm mapping differs from the default */
- if (reg != 0xa4) {
+ if (client && reg != 0xa4) { /* I2C chip */
dev_warn(dev, "Non-standard fan to pwm mapping: "
"fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, "
"fan4->pwm%d. Please report to the driver "
"maintainer.\n",
(reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1);
+ } else if (!client && reg != 0x24) { /* ISA chip */
+ dev_warn(dev, "Non-standard fan to pwm mapping: "
+ "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. "
+ "Please report to the driver maintainer.\n",
+ (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
+ ((reg >> 4) & 0x03) + 1);
}
/* Switch pwm[1-3] to manual mode if they are currently disabled and
* disabled). */
if (!(data->config & 0x02)) {
for (ix = 0; ix < 3; ix++) {
- data->pwm_config[ix] = dme1737_read(client,
+ data->pwm_config[ix] = dme1737_read(data,
DME1737_REG_PWM_CONFIG(ix));
if ((data->has_pwm & (1 << ix)) &&
(PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) {
"manual mode.\n", ix + 1);
data->pwm_config[ix] = PWM_EN_TO_REG(1,
data->pwm_config[ix]);
- dme1737_write(client, DME1737_REG_PWM(ix), 0);
- dme1737_write(client,
+ dme1737_write(data, DME1737_REG_PWM(ix), 0);
+ dme1737_write(data,
DME1737_REG_PWM_CONFIG(ix),
data->pwm_config[ix]);
}
data->pwm_acz[2] = 4; /* pwm3 -> zone3 */
/* Set VRM */
- data->vrm = vid_which_vrm();
+ if (data->type == dme1737) {
+ data->vrm = vid_which_vrm();
+ }
return 0;
}
-static int dme1737_i2c_detect(struct i2c_adapter *adapter, int address,
- int kind)
+/* ---------------------------------------------------------------------
+ * I2C device detection and registration
+ * --------------------------------------------------------------------- */
+
+static struct i2c_driver dme1737_i2c_driver;
+
+static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data)
{
- u8 company, verstep = 0;
- struct i2c_client *client;
- struct dme1737_data *data;
- struct device *dev;
- int err = 0;
- const char *name;
+ int err = 0, reg;
+ u16 addr;
- if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
+ dme1737_sio_enter(sio_cip);
+
+ /* Check device ID
+ * The DME1737 can return either 0x78 or 0x77 as its device ID.
+ * The SCH5027 returns 0x89 as its device ID. */
+ reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
+ if (!(reg == 0x77 || reg == 0x78 || reg == 0x89)) {
+ err = -ENODEV;
goto exit;
}
- if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) {
- err = -ENOMEM;
+ /* Select logical device A (runtime registers) */
+ dme1737_sio_outb(sio_cip, 0x07, 0x0a);
+
+ /* Get the base address of the runtime registers */
+ if (!(addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
+ dme1737_sio_inb(sio_cip, 0x61))) {
+ err = -ENODEV;
goto exit;
}
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &dme1737_i2c_driver;
- dev = &client->dev;
+ /* Read the runtime registers to determine which optional features
+ * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set
+ * to '10' if the respective feature is enabled. */
+ if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */
+ data->has_fan |= (1 << 5);
+ }
+ if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */
+ data->has_pwm |= (1 << 5);
+ }
+ if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */
+ data->has_fan |= (1 << 4);
+ }
+ if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */
+ data->has_pwm |= (1 << 4);
+ }
- /* A negative kind means that the driver was loaded with no force
- * parameter (default), so we must identify the chip. */
- if (kind < 0) {
- company = dme1737_read(client, DME1737_REG_COMPANY);
- verstep = dme1737_read(client, DME1737_REG_VERSTEP);
+exit:
+ dme1737_sio_exit(sio_cip);
- if (!((company == DME1737_COMPANY_SMSC) &&
- ((verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP))) {
- err = -ENODEV;
- goto exit_kfree;
- }
+ return err;
+}
+
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int dme1737_i2c_detect(struct i2c_client *client,
+ struct i2c_board_info *info)
+{
+ struct i2c_adapter *adapter = client->adapter;
+ struct device *dev = &adapter->dev;
+ u8 company, verstep = 0;
+ const char *name;
+
+ if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
+ return -ENODEV;
}
- kind = dme1737;
- name = "dme1737";
+ company = i2c_smbus_read_byte_data(client, DME1737_REG_COMPANY);
+ verstep = i2c_smbus_read_byte_data(client, DME1737_REG_VERSTEP);
- /* Fill in the remaining client fields and put it into the global
- * list */
- strlcpy(client->name, name, I2C_NAME_SIZE);
- mutex_init(&data->update_lock);
+ if (company == DME1737_COMPANY_SMSC &&
+ verstep == SCH5027_VERSTEP) {
+ name = "sch5027";
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client))) {
- goto exit_kfree;
+ } else if (company == DME1737_COMPANY_SMSC &&
+ (verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP) {
+ name = "dme1737";
+ } else {
+ return -ENODEV;
}
- dev_info(dev, "Found a DME1737 chip at 0x%02x (rev 0x%02x).\n",
+ dev_info(dev, "Found a %s chip at 0x%02x (rev 0x%02x).\n",
+ verstep == SCH5027_VERSTEP ? "SCH5027" : "DME1737",
client->addr, verstep);
+ strlcpy(info->type, name, I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int dme1737_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct dme1737_data *data;
+ struct device *dev = &client->dev;
+ int err;
+
+ data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(client, data);
+ data->type = id->driver_data;
+ data->client = client;
+ data->name = client->name;
+ mutex_init(&data->update_lock);
/* Initialize the DME1737 chip */
if ((err = dme1737_init_device(dev))) {
dev_err(dev, "Failed to initialize device.\n");
- goto exit_detach;
+ goto exit_kfree;
}
/* Create sysfs files */
if ((err = dme1737_create_files(dev))) {
dev_err(dev, "Failed to create sysfs files.\n");
- goto exit_detach;
+ goto exit_kfree;
}
/* Register device */
- data->class_dev = hwmon_device_register(dev);
- if (IS_ERR(data->class_dev)) {
+ data->hwmon_dev = hwmon_device_register(dev);
+ if (IS_ERR(data->hwmon_dev)) {
dev_err(dev, "Failed to register device.\n");
- err = PTR_ERR(data->class_dev);
+ err = PTR_ERR(data->hwmon_dev);
goto exit_remove;
}
exit_remove:
dme1737_remove_files(dev);
-exit_detach:
- i2c_detach_client(client);
exit_kfree:
kfree(data);
exit:
return err;
}
-static int dme1737_i2c_attach_adapter(struct i2c_adapter *adapter)
+static int dme1737_i2c_remove(struct i2c_client *client)
{
- if (!(adapter->class & I2C_CLASS_HWMON)) {
- return 0;
+ struct dme1737_data *data = i2c_get_clientdata(client);
+
+ hwmon_device_unregister(data->hwmon_dev);
+ dme1737_remove_files(&client->dev);
+
+ kfree(data);
+ return 0;
+}
+
+static const struct i2c_device_id dme1737_id[] = {
+ { "dme1737", dme1737 },
+ { "sch5027", sch5027 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, dme1737_id);
+
+static struct i2c_driver dme1737_i2c_driver = {
+ .class = I2C_CLASS_HWMON,
+ .driver = {
+ .name = "dme1737",
+ },
+ .probe = dme1737_i2c_probe,
+ .remove = dme1737_i2c_remove,
+ .id_table = dme1737_id,
+ .detect = dme1737_i2c_detect,
+ .address_list = normal_i2c,
+};
+
+/* ---------------------------------------------------------------------
+ * ISA device detection and registration
+ * --------------------------------------------------------------------- */
+
+static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr)
+{
+ int err = 0, reg;
+ unsigned short base_addr;
+
+ dme1737_sio_enter(sio_cip);
+
+ /* Check device ID
+ * We currently know about SCH3112 (0x7c), SCH3114 (0x7d), and
+ * SCH3116 (0x7f). */
+ reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
+ if (!(reg == 0x7c || reg == 0x7d || reg == 0x7f)) {
+ err = -ENODEV;
+ goto exit;
}
- return i2c_probe(adapter, &addr_data, dme1737_i2c_detect);
+ /* Select logical device A (runtime registers) */
+ dme1737_sio_outb(sio_cip, 0x07, 0x0a);
+
+ /* Get the base address of the runtime registers */
+ if (!(base_addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
+ dme1737_sio_inb(sio_cip, 0x61))) {
+ printk(KERN_ERR "dme1737: Base address not set.\n");
+ err = -ENODEV;
+ goto exit;
+ }
+
+ /* Access to the hwmon registers is through an index/data register
+ * pair located at offset 0x70/0x71. */
+ *addr = base_addr + 0x70;
+
+exit:
+ dme1737_sio_exit(sio_cip);
+ return err;
}
-static int dme1737_i2c_detach_client(struct i2c_client *client)
+static int __init dme1737_isa_device_add(unsigned short addr)
{
- struct dme1737_data *data = i2c_get_clientdata(client);
+ struct resource res = {
+ .start = addr,
+ .end = addr + DME1737_EXTENT - 1,
+ .name = "dme1737",
+ .flags = IORESOURCE_IO,
+ };
int err;
- hwmon_device_unregister(data->class_dev);
- dme1737_remove_files(&client->dev);
+ err = acpi_check_resource_conflict(&res);
+ if (err)
+ goto exit;
+
+ if (!(pdev = platform_device_alloc("dme1737", addr))) {
+ printk(KERN_ERR "dme1737: Failed to allocate device.\n");
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ if ((err = platform_device_add_resources(pdev, &res, 1))) {
+ printk(KERN_ERR "dme1737: Failed to add device resource "
+ "(err = %d).\n", err);
+ goto exit_device_put;
+ }
+
+ if ((err = platform_device_add(pdev))) {
+ printk(KERN_ERR "dme1737: Failed to add device (err = %d).\n",
+ err);
+ goto exit_device_put;
+ }
+
+ return 0;
+
+exit_device_put:
+ platform_device_put(pdev);
+ pdev = NULL;
+exit:
+ return err;
+}
+
+static int __devinit dme1737_isa_probe(struct platform_device *pdev)
+{
+ u8 company, device;
+ struct resource *res;
+ struct dme1737_data *data;
+ struct device *dev = &pdev->dev;
+ int err;
+
+ res = platform_get_resource(pdev, IORESOURCE_IO, 0);
+ if (!request_region(res->start, DME1737_EXTENT, "dme1737")) {
+ dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n",
+ (unsigned short)res->start,
+ (unsigned short)res->start + DME1737_EXTENT - 1);
+ err = -EBUSY;
+ goto exit;
+ }
+
+ if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) {
+ err = -ENOMEM;
+ goto exit_release_region;
+ }
- if ((err = i2c_detach_client(client))) {
- return err;
+ data->addr = res->start;
+ platform_set_drvdata(pdev, data);
+
+ /* Skip chip detection if module is loaded with force_id parameter */
+ if (!force_id) {
+ company = dme1737_read(data, DME1737_REG_COMPANY);
+ device = dme1737_read(data, DME1737_REG_DEVICE);
+
+ if (!((company == DME1737_COMPANY_SMSC) &&
+ (device == SCH311X_DEVICE))) {
+ err = -ENODEV;
+ goto exit_kfree;
+ }
}
+ data->type = sch311x;
+
+ /* Fill in the remaining client fields and initialize the mutex */
+ data->name = "sch311x";
+ mutex_init(&data->update_lock);
+ dev_info(dev, "Found a SCH311x chip at 0x%04x\n", data->addr);
+
+ /* Initialize the chip */
+ if ((err = dme1737_init_device(dev))) {
+ dev_err(dev, "Failed to initialize device.\n");
+ goto exit_kfree;
+ }
+
+ /* Create sysfs files */
+ if ((err = dme1737_create_files(dev))) {
+ dev_err(dev, "Failed to create sysfs files.\n");
+ goto exit_kfree;
+ }
+
+ /* Register device */
+ data->hwmon_dev = hwmon_device_register(dev);
+ if (IS_ERR(data->hwmon_dev)) {
+ dev_err(dev, "Failed to register device.\n");
+ err = PTR_ERR(data->hwmon_dev);
+ goto exit_remove_files;
+ }
+
+ return 0;
+
+exit_remove_files:
+ dme1737_remove_files(dev);
+exit_kfree:
+ platform_set_drvdata(pdev, NULL);
kfree(data);
+exit_release_region:
+ release_region(res->start, DME1737_EXTENT);
+exit:
+ return err;
+}
+
+static int __devexit dme1737_isa_remove(struct platform_device *pdev)
+{
+ struct dme1737_data *data = platform_get_drvdata(pdev);
+
+ hwmon_device_unregister(data->hwmon_dev);
+ dme1737_remove_files(&pdev->dev);
+ release_region(data->addr, DME1737_EXTENT);
+ platform_set_drvdata(pdev, NULL);
+ kfree(data);
+
return 0;
}
-static struct i2c_driver dme1737_i2c_driver = {
+static struct platform_driver dme1737_isa_driver = {
.driver = {
+ .owner = THIS_MODULE,
.name = "dme1737",
},
- .attach_adapter = dme1737_i2c_attach_adapter,
- .detach_client = dme1737_i2c_detach_client,
+ .probe = dme1737_isa_probe,
+ .remove = __devexit_p(dme1737_isa_remove),
};
+/* ---------------------------------------------------------------------
+ * Module initialization and cleanup
+ * --------------------------------------------------------------------- */
+
static int __init dme1737_init(void)
{
- return i2c_add_driver(&dme1737_i2c_driver);
+ int err;
+ unsigned short addr;
+
+ if ((err = i2c_add_driver(&dme1737_i2c_driver))) {
+ goto exit;
+ }
+
+ if (dme1737_isa_detect(0x2e, &addr) &&
+ dme1737_isa_detect(0x4e, &addr) &&
+ (!probe_all_addr ||
+ (dme1737_isa_detect(0x162e, &addr) &&
+ dme1737_isa_detect(0x164e, &addr)))) {
+ /* Return 0 if we didn't find an ISA device */
+ return 0;
+ }
+
+ if ((err = platform_driver_register(&dme1737_isa_driver))) {
+ goto exit_del_i2c_driver;
+ }
+
+ /* Sets global pdev as a side effect */
+ if ((err = dme1737_isa_device_add(addr))) {
+ goto exit_del_isa_driver;
+ }
+
+ return 0;
+
+exit_del_isa_driver:
+ platform_driver_unregister(&dme1737_isa_driver);
+exit_del_i2c_driver:
+ i2c_del_driver(&dme1737_i2c_driver);
+exit:
+ return err;
}
static void __exit dme1737_exit(void)
{
+ if (pdev) {
+ platform_device_unregister(pdev);
+ platform_driver_unregister(&dme1737_isa_driver);
+ }
+
i2c_del_driver(&dme1737_i2c_driver);
}
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff