drm/i915: correct FBC update when pipe base update occurs

[safe/jmp/linux-2.6] / drivers / gpu / drm / i915 / intel_display.c

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f9fe989..cb0f4f9 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1260,6 +1260,9 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
                I915_READ(dspbase);
        }
 
+       if (I915_HAS_FBC(dev) && (IS_I965G(dev) || plane == 0))
+               intel_update_fbc(crtc, &crtc->mode);
+
        intel_wait_for_vblank(dev);
 
        if (old_fb) {
@@ -1286,9 +1289,6 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
                master_priv->sarea_priv->pipeA_y = y;
        }
 
-       if (I915_HAS_FBC(dev) && (IS_I965G(dev) || plane == 0))
-               intel_update_fbc(crtc, &crtc->mode);
-
        return 0;
 }
 
@@ -2119,7 +2119,14 @@ static unsigned long intel_calculate_wm(unsigned long clock_in_khz,
 {
        long entries_required, wm_size;
 
-       entries_required = (clock_in_khz * pixel_size * latency_ns) / 1000000;
+       /*
+        * Note: we need to make sure we don't overflow for various clock &
+        * latency values.
+        * clocks go from a few thousand to several hundred thousand.
+        * latency is usually a few thousand
+        */
+       entries_required = ((clock_in_khz / 1000) * pixel_size * latency_ns) /
+               1000;
        entries_required /= wm->cacheline_size;
 
        DRM_DEBUG("FIFO entries required for mode: %d\n", entries_required);
@@ -2184,14 +2191,13 @@ static struct cxsr_latency *intel_get_cxsr_latency(int is_desktop, int fsb,
        for (i = 0; i < ARRAY_SIZE(cxsr_latency_table); i++) {
                latency = &cxsr_latency_table[i];
                if (is_desktop == latency->is_desktop &&
-                       fsb == latency->fsb_freq && mem == latency->mem_freq)
-                       break;
+                   fsb == latency->fsb_freq && mem == latency->mem_freq)
+                       return latency;
        }
-       if (i >= ARRAY_SIZE(cxsr_latency_table)) {
-               DRM_DEBUG("Unknown FSB/MEM found, disable CxSR\n");
-               return NULL;
-       }
-       return latency;
+
+       DRM_DEBUG("Unknown FSB/MEM found, disable CxSR\n");
+
+       return NULL;
 }
 
 static void igd_disable_cxsr(struct drm_device *dev)