drm/i915: Save and restore the GM45 FBC regs on suspend and resume.

[safe/jmp/linux-2.6] / drivers / gpu / drm / i915 / i915_suspend.c

diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index bd6d8d9..660c5f3 100644 (file)
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -437,10 +437,14 @@ void i915_save_display(struct drm_device *dev)
        /* FIXME: save TV & SDVO state */
 
        /* FBC state */
-       dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE);
-       dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE);
-       dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2);
-       dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL);
+       if (IS_GM45(dev)) {
+               dev_priv->saveDPFC_CB_BASE = I915_READ(DPFC_CB_BASE);
+       } else {
+               dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE);
+               dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE);
+               dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2);
+               dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL);
+       }
 
        /* VGA state */
        dev_priv->saveVGA0 = I915_READ(VGA0);
@@ -511,10 +515,16 @@ void i915_restore_display(struct drm_device *dev)
        /* FIXME: restore TV & SDVO state */
 
        /* FBC info */
-       I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE);
-       I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE);
-       I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2);
-       I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL);
+       if (IS_GM45(dev)) {
+               g4x_disable_fbc(dev);
+               I915_WRITE(DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE);
+       } else {
+               i8xx_disable_fbc(dev);
+               I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE);
+               I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE);
+               I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2);
+               I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL);
+       }
 
        /* VGA state */
        I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);