drm/i915: warn if Pineview CxSR can't be enabled

[safe/jmp/linux-2.6] / drivers / gpu / drm / ati_pcigart.c

diff --git a/drivers/gpu/drm/ati_pcigart.c b/drivers/gpu/drm/ati_pcigart.c
index 2cd827a..628eae3 100644 (file)
--- a/drivers/gpu/drm/ati_pcigart.c
+++ b/drivers/gpu/drm/ati_pcigart.c
@@ -77,7 +77,7 @@ int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info
                        if (!entry->busaddr[i])
                                break;
                        pci_unmap_page(dev->pdev, entry->busaddr[i],
-                                        PAGE_SIZE, PCI_DMA_TODEVICE);
+                                        PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
                }
 
                if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
@@ -99,10 +99,10 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
        struct drm_sg_mem *entry = dev->sg;
        void *address = NULL;
        unsigned long pages;
-       u32 *pci_gart, page_base, gart_idx;
+       u32 *pci_gart = NULL, page_base, gart_idx;
        dma_addr_t bus_address = 0;
        int i, j, ret = 0;
-       int max_pages;
+       int max_ati_pages, max_real_pages;
 
        if (!entry) {
                DRM_ERROR("no scatter/gather memory!\n");
@@ -118,6 +118,7 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
                        goto done;
                }
 
+               pci_gart = gart_info->table_handle->vaddr;
                address = gart_info->table_handle->vaddr;
                bus_address = gart_info->table_handle->busaddr;
        } else {
@@ -128,24 +129,23 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
                          (unsigned long)address);
        }
 
-       pci_gart = (u32 *) address;
 
-       max_pages = (gart_info->table_size / sizeof(u32));
-       pages = (entry->pages <= max_pages)
-           ? entry->pages : max_pages;
+       max_ati_pages = (gart_info->table_size / sizeof(u32));
+       max_real_pages = max_ati_pages / (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE);
+       pages = (entry->pages <= max_real_pages)
+           ? entry->pages : max_real_pages;
 
        if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
-               memset(pci_gart, 0, max_pages * sizeof(u32));
+               memset(pci_gart, 0, max_ati_pages * sizeof(u32));
        } else {
-               for (gart_idx = 0; gart_idx < max_pages; gart_idx++)
-                       DRM_WRITE32(map, gart_idx * sizeof(u32), 0);
+               memset_io((void __iomem *)map->handle, 0, max_ati_pages * sizeof(u32));
        }
 
        gart_idx = 0;
        for (i = 0; i < pages; i++) {
                /* we need to support large memory configurations */
                entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i],
-                                                0, PAGE_SIZE, PCI_DMA_TODEVICE);
+                                                0, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
                if (entry->busaddr[i] == 0) {
                        DRM_ERROR("unable to map PCIGART pages!\n");
                        drm_ati_pcigart_cleanup(dev, gart_info);