#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/workqueue.h>
-#include <linux/version.h>
#define EDAC_MC_LABEL_LEN 31
#define EDAC_DEVICE_NAME_LEN 31
#define edac_debug_printk(level, fmt, arg...) \
do { \
if (level <= edac_debug_level) \
- edac_printk(KERN_EMERG, EDAC_DEBUG, fmt, ##arg); \
+ edac_printk(KERN_DEBUG, EDAC_DEBUG, fmt, ##arg); \
} while(0)
#define debugf0( ... ) edac_debug_printk(0, __VA_ARGS__ )
#endif /* !CONFIG_EDAC_DEBUG */
-#define BIT(x) (1 << (x))
-
#define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, \
PCI_DEVICE_ID_ ## vend ## _ ## dev
-#define dev_name(dev) (dev)->dev_name
+#define edac_dev_name(dev) (dev)->dev_name
/* memory devices */
enum dev_type {
MEM_DDR2, /* DDR2 RAM */
MEM_FB_DDR2, /* fully buffered DDR2 */
MEM_RDDR2, /* Registered DDR2 RAM */
+ MEM_XDR, /* Rambus XDR */
};
#define MEM_FLAG_EMPTY BIT(MEM_EMPTY)
#define MEM_FLAG_DDR2 BIT(MEM_DDR2)
#define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2)
#define MEM_FLAG_RDDR2 BIT(MEM_RDDR2)
+#define MEM_FLAG_XDR BIT(MEM_XDR)
/* chipset Error Detection and Correction capabilities and mode */
enum edac_type {
struct mem_ctl_info *mci; /* the parent */
struct kobject kobj; /* sysfs kobject for this csrow */
- struct completion kobj_complete;
- /* FIXME the number of CHANNELs might need to become dynamic */
+ /* channel information for this csrow */
u32 nr_channels;
struct channel_info *channels;
};
*/
struct mem_ctl_info {
struct list_head link; /* for global list of mem_ctl_info structs */
+
+ struct module *owner; /* Module owner of this control struct */
+
unsigned long mtype_cap; /* memory types supported by mc */
unsigned long edac_ctl_cap; /* Mem controller EDAC capabilities */
unsigned long edac_cap; /* configuration capabilities - this is
/* edac sysfs device control */
struct kobject edac_mci_kobj;
- struct completion kobj_complete;
/* Additional top controller level attributes, but specified
* by the low level driver.
};
/* edac_dev_sysfs_block_attribute structure
+ *
* used in leaf 'block' nodes for adding controls/attributes
+ *
+ * each block in each instance of the containing control structure
+ * can have an array of the following. The show and store functions
+ * will be filled in with the show/store function in the
+ * low level driver.
+ *
+ * The 'value' field will be the actual value field used for
+ * counting
*/
struct edac_dev_sysfs_block_attribute {
struct attribute attr;
const char *, size_t);
struct edac_device_block *block;
- /* low driver use */
- void *arg;
unsigned int value;
};
/* edac sysfs device control */
struct kobject kobj;
- struct completion kobj_complete;
};
/* device instance control structure */
/* edac sysfs device control */
struct kobject kobj;
- struct completion kobj_complete;
};
/* for global list of edac_device_ctl_info structs */
struct list_head link;
+ struct module *owner; /* Module owner of this control struct */
+
int dev_idx;
/* Per instance controls for this edac_device */
* NMI handlers may be traversing list
*/
struct rcu_head rcu;
- struct completion complete;
+ struct completion removal_complete;
/* sysfs top name under 'edac' directory
* and instance name:
* device this structure controls
*/
struct kobject kobj;
- struct completion kobj_complete;
};
/* To get from the instance's wq to the beginning of the ctl structure */
char *edac_block_name, unsigned nr_blocks,
unsigned offset_value,
struct edac_dev_sysfs_block_attribute *block_attributes,
- unsigned nr_attribs);
+ unsigned nr_attribs,
+ int device_index);
/* The offset value can be:
* -1 indicating no offset value
#endif /* CONFIG_PCI */
+extern struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
+ unsigned nr_chans, int edac_index);
+extern int edac_mc_add_mc(struct mem_ctl_info *mci);
+extern void edac_mc_free(struct mem_ctl_info *mci);
extern struct mem_ctl_info *edac_mc_find(int idx);
-extern int edac_mc_add_mc(struct mem_ctl_info *mci, int mc_idx);
extern struct mem_ctl_info *edac_mc_del_mc(struct device *dev);
extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,
unsigned long page);
/*
* edac_device APIs
*/
-extern struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
- unsigned nr_chans);
-extern void edac_mc_free(struct mem_ctl_info *mci);
-extern int edac_device_add_device(struct edac_device_ctl_info *edac_dev,
- int edac_idx);
+extern int edac_device_add_device(struct edac_device_ctl_info *edac_dev);
extern struct edac_device_ctl_info *edac_device_del_device(struct device *dev);
extern void edac_device_handle_ue(struct edac_device_ctl_info *edac_dev,
- int inst_nr, int block_nr, const char *msg);
+ int inst_nr, int block_nr, const char *msg);
extern void edac_device_handle_ce(struct edac_device_ctl_info *edac_dev,
- int inst_nr, int block_nr, const char *msg);
+ int inst_nr, int block_nr, const char *msg);
/*
* edac_pci APIs
*/
-extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt, const char
- *edac_pci_name);
+extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
+ const char *edac_pci_name);
extern void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci);
-extern void
-edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci, unsigned long value);
+extern void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci,
+ unsigned long value);
extern int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx);
extern struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev);
-extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev, const char
- *mod_name);
+extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(
+ struct device *dev,
+ const char *mod_name);
extern void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci);
extern int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci);