staging: Add framebuffer driver for XGI chipsets

[safe/jmp/linux-2.6] / drivers / dma / shdma.h

diff --git a/drivers/dma/shdma.h b/drivers/dma/shdma.h
index 7e227f3..4021275 100644 (file)
--- a/drivers/dma/shdma.h
+++ b/drivers/dma/shdma.h
@@ -17,24 +17,10 @@
 #include <linux/interrupt.h>
 #include <linux/list.h>
 
+#define SH_DMAC_MAX_CHANNELS 6
+#define SH_DMA_SLAVE_NUMBER 256
 #define SH_DMA_TCR_MAX 0x00FFFFFF      /* 16MB */
 
-struct sh_dmae_regs {
-       u32 sar; /* SAR / source address */
-       u32 dar; /* DAR / destination address */
-       u32 tcr; /* TCR / transfer count */
-};
-
-struct sh_desc {
-       struct sh_dmae_regs hw;
-       struct list_head node;
-       struct dma_async_tx_descriptor async_tx;
-       enum dma_data_direction direction;
-       dma_cookie_t cookie;
-       int chunks;
-       int mark;
-};
-
 struct device;
 
 struct sh_dmae_chan {
@@ -47,14 +33,18 @@ struct sh_dmae_chan {
        struct tasklet_struct tasklet;  /* Tasklet */
        int descs_allocated;            /* desc count */
        int xmit_shift;                 /* log_2(bytes_per_xfer) */
+       int irq;
        int id;                         /* Raw id of this channel */
+       u32 __iomem *base;
        char dev_id[16];                /* unique name per DMAC of channel */
 };
 
 struct sh_dmae_device {
        struct dma_device common;
-       struct sh_dmae_chan *chan[MAX_DMA_CHANNELS];
-       struct sh_dmae_pdata pdata;
+       struct sh_dmae_chan *chan[SH_DMAC_MAX_CHANNELS];
+       struct sh_dmae_pdata *pdata;
+       u32 __iomem *chan_reg;
+       u16 __iomem *dmars;
 };
 
 #define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common)