MODULE_DESCRIPTION("Solos PCI driver");
MODULE_VERSION(VERSION);
MODULE_LICENSE("GPL");
+MODULE_FIRMWARE("solos-FPGA.bin");
+MODULE_FIRMWARE("solos-Firmware.bin");
+MODULE_FIRMWARE("solos-db-FPGA.bin");
MODULE_PARM_DESC(reset, "Reset Solos chips on startup");
MODULE_PARM_DESC(atmdebug, "Print ATM data");
MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade");
}
snr = next_string(skb);
- if (!str)
+ if (!snr)
return -EIO;
attn = next_string(skb);
if (!attn)
int numblocks = 0;
int offset;
- if (chip == 0) {
+ switch (chip) {
+ case 0:
fw_name = "solos-FPGA.bin";
blocksize = FPGA_BLOCK;
- }
-
- if (chip == 1) {
+ break;
+ case 1:
fw_name = "solos-Firmware.bin";
blocksize = SOLOS_BLOCK;
- }
-
- if (chip == 2){
+ break;
+ case 2:
if (card->fpga_version > LEGACY_BUFFERS){
fw_name = "solos-db-FPGA.bin";
blocksize = FPGA_BLOCK;
} else {
- dev_info(&card->dev->dev, "FPGA version doesn't support daughter board upgrades\n");
+ dev_info(&card->dev->dev, "FPGA version doesn't support"
+ " daughter board upgrades\n");
return -EPERM;
}
- }
-
- if (chip == 3){
+ break;
+ case 3:
if (card->fpga_version > LEGACY_BUFFERS){
fw_name = "solos-Firmware.bin";
blocksize = SOLOS_BLOCK;
} else {
- dev_info(&card->dev->dev, "FPGA version doesn't support daughter board upgrades\n");
- return -EPERM;
+ dev_info(&card->dev->dev, "FPGA version doesn't support"
+ " daughter board upgrades\n");
+ return -EPERM;
}
+ break;
+ default:
+ return -ENODEV;
}
if (request_firmware(&fw, fw_name, &card->dev->dev))
memcpy_fromio(header, RX_BUF(card, port), sizeof(*header));
size = le16_to_cpu(header->size);
+ if (size > (card->buffer_size - sizeof(*header))){
+ dev_warn(&card->dev->dev, "Invalid buffer size\n");
+ continue;
+ }
skb = alloc_skb(size + 1, GFP_ATOMIC);
if (!skb) {
goto out;
}
- err = pci_set_dma_mask(dev, DMA_32BIT_MASK);
+ err = pci_set_dma_mask(dev, DMA_BIT_MASK(32));
if (err) {
dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n");
goto out;
out_release_regions:
pci_release_regions(dev);
out:
+ kfree(card);
return err;
}