ahci: add "em_buffer" attribute for AHCI hosts

[safe/jmp/linux-2.6] / drivers / ata / sata_inic162x.c

diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c
index 8c1f06a..27dc6c8 100644 (file)
--- a/drivers/ata/sata_inic162x.c
+++ b/drivers/ata/sata_inic162x.c
@@ -10,15 +10,36 @@
  * right.  Documentation is available at initio's website but it only
  * documents registers (not programming model).
  *
- * - ATA disks work.
- * - Hotplug works.
- * - ATAPI read works but burning doesn't.  This thing is really
- *   peculiar about ATAPI and I couldn't figure out how ATAPI PIO and
- *   ATAPI DMA WRITE should be programmed.  If you've got a clue, be
- *   my guest.
- * - Both STR and STD work.
+ * This driver has interesting history.  The first version was written
+ * from the documentation and a 2.4 IDE driver posted on a Taiwan
+ * company, which didn't use any IDMA features and couldn't handle
+ * LBA48.  The resulting driver couldn't handle LBA48 devices either
+ * making it pretty useless.
+ *
+ * After a while, initio picked the driver up, renamed it to
+ * sata_initio162x, updated it to use IDMA for ATA DMA commands and
+ * posted it on their website.  It only used ATA_PROT_DMA for IDMA and
+ * attaching both devices and issuing IDMA and !IDMA commands
+ * simultaneously broke it due to PIRQ masking interaction but it did
+ * show how to use the IDMA (ADMA + some initio specific twists)
+ * engine.
+ *
+ * Then, I picked up their changes again and here's the usable driver
+ * which uses IDMA for everything.  Everything works now including
+ * LBA48, CD/DVD burning, suspend/resume and hotplug.  There are some
+ * issues tho.  Result Tf is not resported properly, NCQ isn't
+ * supported yet and CD/DVD writing works with DMA assisted PIO
+ * protocol (which, for native SATA devices, shouldn't cause any
+ * noticeable difference).
+ *
+ * Anyways, so, here's finally a working driver for inic162x.  Enjoy!
+ *
+ * initio: If you guys wanna improve the driver regarding result TF
+ * access and other stuff, please feel free to contact me.  I'll be
+ * happy to assist.
  */
 
+#include <linux/gfp.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/pci.h>
@@ -28,7 +49,7 @@
 #include <scsi/scsi_device.h>
 
 #define DRV_NAME       "sata_inic162x"
-#define DRV_VERSION    "0.3"
+#define DRV_VERSION    "0.4"
 
 enum {
        MMIO_BAR_PCI            = 5,
@@ -76,6 +97,7 @@ enum {
        PORT_SCR                = 0x20,
 
        /* HOST_CTL bits */
+       HCTL_LEDEN              = (1 << 3),  /* enable LED operation */
        HCTL_IRQOFF             = (1 << 8),  /* global IRQ off */
        HCTL_FTHD0              = (1 << 10), /* fifo threshold 0 */
        HCTL_FTHD1              = (1 << 11), /* fifo threshold 1*/
@@ -248,9 +270,9 @@ static void inic_reset_port(void __iomem *port_base)
        writeb(0xff, port_base + PORT_IRQ_STAT);
 }
 
-static int inic_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val)
+static int inic_scr_read(struct ata_link *link, unsigned sc_reg, u32 *val)
 {
-       void __iomem *scr_addr = inic_port_base(ap) + PORT_SCR;
+       void __iomem *scr_addr = inic_port_base(link->ap) + PORT_SCR;
        void __iomem *addr;
 
        if (unlikely(sc_reg >= ARRAY_SIZE(scr_map)))
@@ -265,9 +287,9 @@ static int inic_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val)
        return 0;
 }
 
-static int inic_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val)
+static int inic_scr_write(struct ata_link *link, unsigned sc_reg, u32 val)
 {
-       void __iomem *scr_addr = inic_port_base(ap) + PORT_SCR;
+       void __iomem *scr_addr = inic_port_base(link->ap) + PORT_SCR;
 
        if (unlikely(sc_reg >= ARRAY_SIZE(scr_map)))
                return -EINVAL;
@@ -384,7 +406,7 @@ static irqreturn_t inic_interrupt(int irq, void *dev_instance)
        struct ata_host *host = dev_instance;
        struct inic_host_priv *hpriv = host->private_data;
        u16 host_irq_stat;
-       int i, handled = 0;;
+       int i, handled = 0;
 
        host_irq_stat = readw(hpriv->mmio_base + HOST_IRQ_STAT);
 
@@ -520,7 +542,7 @@ static unsigned int inic_qc_issue(struct ata_queued_cmd *qc)
        void __iomem *port_base = inic_port_base(ap);
 
        /* fire up the ADMA engine */
-       writew(HCTL_FTHD0, port_base + HOST_CTL);
+       writew(HCTL_FTHD0 | HCTL_LEDEN, port_base + HOST_CTL);
        writew(IDMA_CTL_GO, port_base + PORT_IDMA_CTL);
        writeb(0, port_base + PORT_CPB_PTQFIFO);
 
@@ -723,8 +745,8 @@ static struct ata_port_operations inic_port_ops = {
 
 static struct ata_port_info inic_port_info = {
        .flags                  = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA,
-       .pio_mask               = 0x1f, /* pio0-4 */
-       .mwdma_mask             = 0x07, /* mwdma0-2 */
+       .pio_mask               = ATA_PIO4,
+       .mwdma_mask             = ATA_MWDMA2,
        .udma_mask              = ATA_UDMA6,
        .port_ops               = &inic_port_ops
 };
@@ -840,14 +862,14 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
        }
 
        /* Set dma_mask.  This devices doesn't support 64bit addressing. */
-       rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
+       rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
        if (rc) {
                dev_printk(KERN_ERR, &pdev->dev,
                           "32-bit DMA enable failed\n");
                return rc;
        }
 
-       rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
+       rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
        if (rc) {
                dev_printk(KERN_ERR, &pdev->dev,
                           "32-bit consistent DMA enable failed\n");