*
* and in part on the documentation and errata sheet
*/
-
+
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/libata.h>
#define DRV_NAME "pata_sl82c105"
-#define DRV_VERSION "0.2.2"
+#define DRV_VERSION "0.2.3"
enum {
/*
*
* Set up cable type and use generic probe init
*/
-
+
static int sl82c105_pre_reset(struct ata_port *ap)
{
static const struct pci_bits sl82c105_enable_bits[] = {
};
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- if (ap->port_no && !pci_test_config_bits(pdev, &sl82c105_enable_bits[ap->port_no])) {
- ata_port_disable(ap);
- dev_printk(KERN_INFO, &pdev->dev, "port disabled. ignoring.\n");
- return 0;
- }
+ if (ap->port_no && !pci_test_config_bits(pdev, &sl82c105_enable_bits[ap->port_no]))
+ return -ENOENT;
ap->cbl = ATA_CBL_PATA40;
return ata_std_prereset(ap);
}
* so a configure_dmamode call will undo any work we do here and vice
* versa
*/
-
+
static void sl82c105_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
};
u16 dummy;
int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno);
-
+
pci_write_config_word(pdev, timing, pio_timing[pio]);
/* Can we lose this oddity of the old driver */
pci_read_config_word(pdev, timing, &dummy);
* Called to do the PIO mode setup. Our timing registers are shared
* but we want to set the PIO timing by default.
*/
-
+
static void sl82c105_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
sl82c105_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
* Load DMA cycle times into the chip ready for a DMA transfer
* to occur.
*/
-
+
static void sl82c105_configure_dmamode(struct ata_port *ap, struct ata_device *adev)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
u16 dummy;
int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno);
int dma = adev->dma_mode - XFER_MW_DMA_0;
-
+
pci_write_config_word(pdev, timing, dma_timing[dma]);
/* Can we lose this oddity of the old driver */
pci_read_config_word(pdev, timing, &dummy);
* for the device in question. Set appropriate PIO timings not DMA
* timings at this point.
*/
-
+
static void sl82c105_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
switch(adev->dma_mode) {
break;
default:
BUG();
- }
+ }
}
/**
* @ap: ATA interface
*
* The sl82c105 has some serious problems with the DMA engine
- * when transfers don't run as expected or ATAPI is used. The
+ * when transfers don't run as expected or ATAPI is used. The
* recommended fix is to reset the engine each use using a chip
* test register.
*/
-
+
static void sl82c105_reset_engine(struct ata_port *ap)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
u16 val;
-
+
pci_read_config_word(pdev, 0x7E, &val);
pci_write_config_word(pdev, 0x7E, val | 4);
pci_write_config_word(pdev, 0x7E, val & ~4);
* @qc: ATA command
*
* Reset the DMA engine each use as recommended by the errata
- * document.
+ * document.
*
* FIXME: if we switch clock at BMDMA start/end we might get better
* PIO performance on DMA capable devices.
*/
-
+
static void sl82c105_bmdma_start(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
sl82c105_reset_engine(ap);
-
+
/* Set the clocks for DMA */
sl82c105_configure_dmamode(ap, qc->dev);
- /* Activate DMA */
+ /* Activate DMA */
ata_bmdma_start(qc);
}
* We assume bmdma_stop is always called if bmdma_start as called. If
* not then we may need to wrap qc_issue.
*/
-
+
static void sl82c105_bmdma_stop(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
ata_bmdma_stop(qc);
sl82c105_reset_engine(ap);
-
+
/* This will redo the initial setup of the DMA device to matching
PIO timings */
sl82c105_set_dmamode(ap, qc->dev);
.can_queue = ATA_DEF_QUEUE,
.this_id = ATA_SHT_THIS_ID,
.sg_tablesize = LIBATA_MAX_PRD,
- .max_sectors = ATA_MAX_SECTORS,
.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
.emulated = ATA_SHT_EMULATED,
.use_clustering = ATA_SHT_USE_CLUSTERING,
.proc_name = DRV_NAME,
.dma_boundary = ATA_DMA_BOUNDARY,
.slave_configure = ata_scsi_slave_config,
+ .slave_destroy = ata_scsi_slave_destroy,
.bios_param = ata_std_bios_param,
};
.qc_prep = ata_qc_prep,
.qc_issue = ata_qc_issue_prot,
- .eng_timeout = ata_eng_timeout,
+
.data_xfer = ata_pio_data_xfer,
.irq_handler = ata_interrupt,
.irq_clear = ata_bmdma_irq_clear,
-
+
.port_start = ata_port_start,
.port_stop = ata_port_stop,
.host_stop = ata_host_stop
-};
+};
/**
* sl82c105_bridge_revision - find bridge version
* providing it is a Winbond 553 reports the revision. If it cannot
* find a revision or the right device it returns -1
*/
-
+
static int sl82c105_bridge_revision(struct pci_dev *pdev)
{
struct pci_dev *bridge;
return rev;
}
-
+
static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
static struct ata_port_info info_dma = {
int rev;
rev = sl82c105_bridge_revision(dev);
-
+
if (rev == -1)
dev_printk(KERN_WARNING, &dev->dev, "pata_sl82c105: Unable to find bridge, disabling DMA.\n");
else if (rev <= 5)
port_info[0] = &info_dma;
port_info[1] = &info_dma;
}
-
+
pci_read_config_dword(dev, 0x40, &val);
val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
pci_write_config_dword(dev, 0x40, val);
return ata_pci_init_one(dev, port_info, 1); /* For now */
}
-static struct pci_device_id sl82c105[] = {
- { PCI_DEVICE(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105), },
- { 0, },
+static const struct pci_device_id sl82c105[] = {
+ { PCI_VDEVICE(WINBOND, PCI_DEVICE_ID_WINBOND_82C105), },
+
+ { },
};
static struct pci_driver sl82c105_pci_driver = {
return pci_register_driver(&sl82c105_pci_driver);
}
-
static void __exit sl82c105_exit(void)
{
pci_unregister_driver(&sl82c105_pci_driver);
}
-
MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("low-level driver for Sl82c105");
MODULE_LICENSE("GPL");
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff