/*
* pata-legacy.c - Legacy port PATA/SATA controller driver.
- * Copyright 2005/2006 Red Hat <alan@redhat.com>, all rights reserved.
+ * Copyright 2005/2006 Red Hat, all rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
*
* Unsupported but docs exist:
* Appian/Adaptec AIC25VL01/Cirrus Logic PD7220
- * Winbond W83759A
*
* This driver handles legacy (that is "ISA/VLB side") IDE ports found
* on PC class systems. There are three hybrid devices that are exceptions
* the MPIIX where the tuning is PCI side but the IDE is "ISA side".
*
* Specific support is included for the ht6560a/ht6560b/opti82c611a/
- * opti82c465mv/promise 20230c/20630
+ * opti82c465mv/promise 20230c/20630/winbond83759A
*
* Use the autospeed and pio_mask options with:
* Appian ADI/2 aka CLPD7220 or AIC25VL01.
* For now use autospeed and pio_mask as above with the W83759A. This may
* change.
*
- * TODO
- * Merge existing pata_qdi driver
- *
*/
#include <linux/kernel.h>
#include <linux/platform_device.h>
#define DRV_NAME "pata_legacy"
-#define DRV_VERSION "0.5.5"
+#define DRV_VERSION "0.6.5"
#define NR_HOST 6
QDI6500 = 7,
QDI6580 = 8,
QDI6580DP = 9, /* Dual channel mode is different */
+ W83759A = 10,
UNKNOWN = -1
};
struct ata_port_operations *ops;
unsigned int pio_mask;
unsigned int flags;
- int (*setup)(struct legacy_probe *probe, struct legacy_data *data);
+ int (*setup)(struct platform_device *, struct legacy_probe *probe,
+ struct legacy_data *data);
};
static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
static int opti82c611a; /* Opti82c611A on primary 1, sec 2, both 3 */
static int opti82c46x; /* Opti 82c465MV present(pri/sec autodetect) */
static int qdi; /* Set to probe QDI controllers */
+static int winbond; /* Set to probe Winbond controllers,
+ give I/O port if non standard */
static int autospeed; /* Chip present which snoops speed changes */
static int pio_mask = 0x1F; /* PIO range for autospeed devices */
static int iordy_mask = 0xFFFFFFFF; /* Use iordy if available */
{
struct ata_device *dev;
- ata_link_for_each_dev(dev, link) {
- if (ata_dev_enabled(dev)) {
- ata_dev_printk(dev, KERN_INFO,
- "configured for PIO\n");
- dev->pio_mode = XFER_PIO_0;
- dev->xfer_mode = XFER_PIO_0;
- dev->xfer_shift = ATA_SHIFT_PIO;
- dev->flags |= ATA_DFLAG_PIO;
- }
+ ata_for_each_dev(dev, link, ENABLED) {
+ ata_dev_printk(dev, KERN_INFO, "configured for PIO\n");
+ dev->pio_mode = XFER_PIO_0;
+ dev->xfer_mode = XFER_PIO_0;
+ dev->xfer_shift = ATA_SHIFT_PIO;
+ dev->flags |= ATA_DFLAG_PIO;
}
return 0;
}
static struct scsi_host_template legacy_sht = {
- .module = THIS_MODULE,
- .name = DRV_NAME,
- .ioctl = ata_scsi_ioctl,
- .queuecommand = ata_scsi_queuecmd,
- .can_queue = ATA_DEF_QUEUE,
- .this_id = ATA_SHT_THIS_ID,
- .sg_tablesize = LIBATA_MAX_PRD,
- .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
- .emulated = ATA_SHT_EMULATED,
- .use_clustering = ATA_SHT_USE_CLUSTERING,
- .proc_name = DRV_NAME,
- .dma_boundary = ATA_DMA_BOUNDARY,
- .slave_configure = ata_scsi_slave_config,
- .slave_destroy = ata_scsi_slave_destroy,
- .bios_param = ata_std_bios_param,
+ ATA_PIO_SHT(DRV_NAME),
+};
+
+static const struct ata_port_operations legacy_base_port_ops = {
+ .inherits = &ata_sff_port_ops,
+ .cable_detect = ata_cable_40wire,
};
/*
*/
static struct ata_port_operations simple_port_ops = {
- .tf_load = ata_tf_load,
- .tf_read = ata_tf_read,
- .check_status = ata_check_status,
- .exec_command = ata_exec_command,
- .dev_select = ata_std_dev_select,
-
- .freeze = ata_bmdma_freeze,
- .thaw = ata_bmdma_thaw,
- .error_handler = ata_bmdma_error_handler,
- .post_internal_cmd = ata_bmdma_post_internal_cmd,
- .cable_detect = ata_cable_40wire,
-
- .qc_prep = ata_qc_prep,
- .qc_issue = ata_qc_issue_prot,
-
- .data_xfer = ata_data_xfer_noirq,
-
- .irq_handler = ata_interrupt,
- .irq_clear = ata_bmdma_irq_clear,
- .irq_on = ata_irq_on,
-
- .port_start = ata_sff_port_start,
+ .inherits = &legacy_base_port_ops,
+ .sff_data_xfer = ata_sff_data_xfer_noirq,
};
static struct ata_port_operations legacy_port_ops = {
+ .inherits = &legacy_base_port_ops,
+ .sff_data_xfer = ata_sff_data_xfer_noirq,
.set_mode = legacy_set_mode,
-
- .tf_load = ata_tf_load,
- .tf_read = ata_tf_read,
- .check_status = ata_check_status,
- .exec_command = ata_exec_command,
- .dev_select = ata_std_dev_select,
- .cable_detect = ata_cable_40wire,
-
- .freeze = ata_bmdma_freeze,
- .thaw = ata_bmdma_thaw,
- .error_handler = ata_bmdma_error_handler,
- .post_internal_cmd = ata_bmdma_post_internal_cmd,
-
- .qc_prep = ata_qc_prep,
- .qc_issue = ata_qc_issue_prot,
-
- .data_xfer = ata_data_xfer_noirq,
-
- .irq_handler = ata_interrupt,
- .irq_clear = ata_bmdma_irq_clear,
- .irq_on = ata_irq_on,
-
- .port_start = ata_sff_port_start,
};
/*
iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
if (unlikely(slop)) {
- u32 pad;
+ __le32 pad;
if (rw == READ) {
pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
memcpy(buf + buflen - slop, &pad, slop);
}
local_irq_restore(flags);
} else
- buflen = ata_data_xfer_noirq(dev, buf, buflen, rw);
+ buflen = ata_sff_data_xfer_noirq(dev, buf, buflen, rw);
return buflen;
}
static struct ata_port_operations pdc20230_port_ops = {
+ .inherits = &legacy_base_port_ops,
.set_piomode = pdc20230_set_piomode,
-
- .tf_load = ata_tf_load,
- .tf_read = ata_tf_read,
- .check_status = ata_check_status,
- .exec_command = ata_exec_command,
- .dev_select = ata_std_dev_select,
-
- .freeze = ata_bmdma_freeze,
- .thaw = ata_bmdma_thaw,
- .error_handler = ata_bmdma_error_handler,
- .post_internal_cmd = ata_bmdma_post_internal_cmd,
- .cable_detect = ata_cable_40wire,
-
- .qc_prep = ata_qc_prep,
- .qc_issue = ata_qc_issue_prot,
-
- .data_xfer = pdc_data_xfer_vlb,
-
- .irq_handler = ata_interrupt,
- .irq_clear = ata_bmdma_irq_clear,
- .irq_on = ata_irq_on,
-
- .port_start = ata_sff_port_start,
+ .sff_data_xfer = pdc_data_xfer_vlb,
};
/*
/* Get the timing data in cycles. For now play safe at 50Mhz */
ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
- active = FIT(t.active, 2, 15);
- recover = FIT(t.recover, 4, 15);
+ active = clamp_val(t.active, 2, 15);
+ recover = clamp_val(t.recover, 4, 15);
inb(0x3E6);
inb(0x3E6);
}
static struct ata_port_operations ht6560a_port_ops = {
+ .inherits = &legacy_base_port_ops,
.set_piomode = ht6560a_set_piomode,
-
- .tf_load = ata_tf_load,
- .tf_read = ata_tf_read,
- .check_status = ata_check_status,
- .exec_command = ata_exec_command,
- .dev_select = ata_std_dev_select,
-
- .freeze = ata_bmdma_freeze,
- .thaw = ata_bmdma_thaw,
- .error_handler = ata_bmdma_error_handler,
- .post_internal_cmd = ata_bmdma_post_internal_cmd,
- .cable_detect = ata_cable_40wire,
-
- .qc_prep = ata_qc_prep,
- .qc_issue = ata_qc_issue_prot,
-
- .data_xfer = ata_data_xfer, /* Check vlb/noirq */
-
- .irq_handler = ata_interrupt,
- .irq_clear = ata_bmdma_irq_clear,
- .irq_on = ata_irq_on,
-
- .port_start = ata_sff_port_start,
};
/*
/* Get the timing data in cycles. For now play safe at 50Mhz */
ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
- active = FIT(t.active, 2, 15);
- recover = FIT(t.recover, 2, 16);
+ active = clamp_val(t.active, 2, 15);
+ recover = clamp_val(t.recover, 2, 16);
recover &= 0x15;
inb(0x3E6);
}
static struct ata_port_operations ht6560b_port_ops = {
+ .inherits = &legacy_base_port_ops,
.set_piomode = ht6560b_set_piomode,
-
- .tf_load = ata_tf_load,
- .tf_read = ata_tf_read,
- .check_status = ata_check_status,
- .exec_command = ata_exec_command,
- .dev_select = ata_std_dev_select,
-
- .freeze = ata_bmdma_freeze,
- .thaw = ata_bmdma_thaw,
- .error_handler = ata_bmdma_error_handler,
- .post_internal_cmd = ata_bmdma_post_internal_cmd,
- .cable_detect = ata_cable_40wire,
-
- .qc_prep = ata_qc_prep,
- .qc_issue = ata_qc_issue_prot,
-
- .data_xfer = ata_data_xfer, /* FIXME: Check 32bit and noirq */
-
- .irq_handler = ata_interrupt,
- .irq_clear = ata_bmdma_irq_clear,
- .irq_on = ata_irq_on,
-
- .port_start = ata_sff_port_start,
};
/*
ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
}
- active = FIT(t.active, 2, 17) - 2;
- recover = FIT(t.recover, 1, 16) - 1;
- setup = FIT(t.setup, 1, 4) - 1;
+ active = clamp_val(t.active, 2, 17) - 2;
+ recover = clamp_val(t.recover, 1, 16) - 1;
+ setup = clamp_val(t.setup, 1, 4) - 1;
/* Select the right timing bank for write timing */
rc = ioread8(ap->ioaddr.lbal_addr);
static struct ata_port_operations opti82c611a_port_ops = {
+ .inherits = &legacy_base_port_ops,
.set_piomode = opti82c611a_set_piomode,
-
- .tf_load = ata_tf_load,
- .tf_read = ata_tf_read,
- .check_status = ata_check_status,
- .exec_command = ata_exec_command,
- .dev_select = ata_std_dev_select,
-
- .freeze = ata_bmdma_freeze,
- .thaw = ata_bmdma_thaw,
- .error_handler = ata_bmdma_error_handler,
- .post_internal_cmd = ata_bmdma_post_internal_cmd,
- .cable_detect = ata_cable_40wire,
-
- .qc_prep = ata_qc_prep,
- .qc_issue = ata_qc_issue_prot,
-
- .data_xfer = ata_data_xfer,
-
- .irq_handler = ata_interrupt,
- .irq_clear = ata_bmdma_irq_clear,
- .irq_on = ata_irq_on,
-
- .port_start = ata_sff_port_start,
};
/*
ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
}
- active = FIT(t.active, 2, 17) - 2;
- recover = FIT(t.recover, 1, 16) - 1;
- setup = FIT(t.setup, 1, 4) - 1;
+ active = clamp_val(t.active, 2, 17) - 2;
+ recover = clamp_val(t.recover, 1, 16) - 1;
+ setup = clamp_val(t.setup, 1, 4) - 1;
/* Select the right timing bank for write timing */
rc = ioread8(ap->ioaddr.lbal_addr);
}
/**
- * opt82c465mv_qc_issue_prot - command issue
+ * opt82c465mv_qc_issue - command issue
* @qc: command pending
*
* Called when the libata layer is about to issue a command. We wrap
* FIXME: dual channel needs ->serialize support
*/
-static unsigned int opti82c46x_qc_issue_prot(struct ata_queued_cmd *qc)
+static unsigned int opti82c46x_qc_issue(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
struct ata_device *adev = qc->dev;
&& ap->host->private_data != NULL)
opti82c46x_set_piomode(ap, adev);
- return ata_qc_issue_prot(qc);
+ return ata_sff_qc_issue(qc);
}
static struct ata_port_operations opti82c46x_port_ops = {
+ .inherits = &legacy_base_port_ops,
.set_piomode = opti82c46x_set_piomode,
-
- .tf_load = ata_tf_load,
- .tf_read = ata_tf_read,
- .check_status = ata_check_status,
- .exec_command = ata_exec_command,
- .dev_select = ata_std_dev_select,
-
- .freeze = ata_bmdma_freeze,
- .thaw = ata_bmdma_thaw,
- .error_handler = ata_bmdma_error_handler,
- .post_internal_cmd = ata_bmdma_post_internal_cmd,
- .cable_detect = ata_cable_40wire,
-
- .qc_prep = ata_qc_prep,
- .qc_issue = opti82c46x_qc_issue_prot,
-
- .data_xfer = ata_data_xfer,
-
- .irq_handler = ata_interrupt,
- .irq_clear = ata_bmdma_irq_clear,
- .irq_on = ata_irq_on,
-
- .port_start = ata_sff_port_start,
+ .qc_issue = opti82c46x_qc_issue,
};
static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
struct ata_timing t;
- struct legacy_data *qdi = ap->host->private_data;
+ struct legacy_data *ld_qdi = ap->host->private_data;
int active, recovery;
u8 timing;
/* Get the timing data in cycles */
ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
- if (qdi->fast) {
- active = 8 - FIT(t.active, 1, 8);
- recovery = 18 - FIT(t.recover, 3, 18);
+ if (ld_qdi->fast) {
+ active = 8 - clamp_val(t.active, 1, 8);
+ recovery = 18 - clamp_val(t.recover, 3, 18);
} else {
- active = 9 - FIT(t.active, 2, 9);
- recovery = 15 - FIT(t.recover, 0, 15);
+ active = 9 - clamp_val(t.active, 2, 9);
+ recovery = 15 - clamp_val(t.recover, 0, 15);
}
timing = (recovery << 4) | active | 0x08;
- qdi->clock[adev->devno] = timing;
+ ld_qdi->clock[adev->devno] = timing;
- outb(timing, qdi->timing);
+ outb(timing, ld_qdi->timing);
}
/**
* qdi6580dp_set_piomode - PIO setup for dual channel
* @ap: Port
* @adev: Device
- * @irq: interrupt line
*
* In dual channel mode the 6580 has one clock per channel and we have
- * to software clockswitch in qc_issue_prot.
+ * to software clockswitch in qc_issue.
*/
static void qdi6580dp_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
struct ata_timing t;
- struct legacy_data *qdi = ap->host->private_data;
+ struct legacy_data *ld_qdi = ap->host->private_data;
int active, recovery;
u8 timing;
/* Get the timing data in cycles */
ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
- if (qdi->fast) {
- active = 8 - FIT(t.active, 1, 8);
- recovery = 18 - FIT(t.recover, 3, 18);
+ if (ld_qdi->fast) {
+ active = 8 - clamp_val(t.active, 1, 8);
+ recovery = 18 - clamp_val(t.recover, 3, 18);
} else {
- active = 9 - FIT(t.active, 2, 9);
- recovery = 15 - FIT(t.recover, 0, 15);
+ active = 9 - clamp_val(t.active, 2, 9);
+ recovery = 15 - clamp_val(t.recover, 0, 15);
}
timing = (recovery << 4) | active | 0x08;
- qdi->clock[adev->devno] = timing;
+ ld_qdi->clock[adev->devno] = timing;
- outb(timing, qdi->timing + 2 * ap->port_no);
+ outb(timing, ld_qdi->timing + 2 * ap->port_no);
/* Clear the FIFO */
if (adev->class != ATA_DEV_ATA)
- outb(0x5F, qdi->timing + 3);
+ outb(0x5F, ld_qdi->timing + 3);
}
/**
static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
struct ata_timing t;
- struct legacy_data *qdi = ap->host->private_data;
+ struct legacy_data *ld_qdi = ap->host->private_data;
int active, recovery;
u8 timing;
/* Get the timing data in cycles */
ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
- if (qdi->fast) {
- active = 8 - FIT(t.active, 1, 8);
- recovery = 18 - FIT(t.recover, 3, 18);
+ if (ld_qdi->fast) {
+ active = 8 - clamp_val(t.active, 1, 8);
+ recovery = 18 - clamp_val(t.recover, 3, 18);
} else {
- active = 9 - FIT(t.active, 2, 9);
- recovery = 15 - FIT(t.recover, 0, 15);
+ active = 9 - clamp_val(t.active, 2, 9);
+ recovery = 15 - clamp_val(t.recover, 0, 15);
}
timing = (recovery << 4) | active | 0x08;
- qdi->clock[adev->devno] = timing;
- outb(timing, qdi->timing + 2 * adev->devno);
+ ld_qdi->clock[adev->devno] = timing;
+ outb(timing, ld_qdi->timing + 2 * adev->devno);
/* Clear the FIFO */
if (adev->class != ATA_DEV_ATA)
- outb(0x5F, qdi->timing + 3);
+ outb(0x5F, ld_qdi->timing + 3);
}
/**
- * qdi_qc_issue_prot - command issue
+ * qdi_qc_issue - command issue
* @qc: command pending
*
* Called when the libata layer is about to issue a command. We wrap
* this interface so that we can load the correct ATA timings.
*/
-static unsigned int qdi_qc_issue_prot(struct ata_queued_cmd *qc)
+static unsigned int qdi_qc_issue(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
struct ata_device *adev = qc->dev;
- struct legacy_data *qdi = ap->host->private_data;
+ struct legacy_data *ld_qdi = ap->host->private_data;
- if (qdi->clock[adev->devno] != qdi->last) {
+ if (ld_qdi->clock[adev->devno] != ld_qdi->last) {
if (adev->pio_mode) {
- qdi->last = qdi->clock[adev->devno];
- outb(qdi->clock[adev->devno], qdi->timing +
+ ld_qdi->last = ld_qdi->clock[adev->devno];
+ outb(ld_qdi->clock[adev->devno], ld_qdi->timing +
2 * ap->port_no);
}
}
- return ata_qc_issue_prot(qc);
+ return ata_sff_qc_issue(qc);
}
-/* For the 6580 can we flip the FIFO on/off at this point ? */
-
-static unsigned int qdi_data_xfer(struct ata_device *adev, unsigned char *buf,
+static unsigned int vlb32_data_xfer(struct ata_device *adev, unsigned char *buf,
unsigned int buflen, int rw)
{
struct ata_port *ap = adev->link->ap;
ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
if (unlikely(slop)) {
- u32 pad;
+ __le32 pad;
if (rw == WRITE) {
memcpy(&pad, buf + buflen - slop, slop);
- pad = le32_to_cpu(pad);
- iowrite32(pad, ap->ioaddr.data_addr);
+ iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
} else {
- pad = ioread32(ap->ioaddr.data_addr);
- pad = cpu_to_le32(pad);
+ pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
memcpy(buf + buflen - slop, &pad, slop);
}
}
return (buflen + 3) & ~3;
} else
- return ata_data_xfer(adev, buf, buflen, rw);
+ return ata_sff_data_xfer(adev, buf, buflen, rw);
+}
+
+static int qdi_port(struct platform_device *dev,
+ struct legacy_probe *lp, struct legacy_data *ld)
+{
+ if (devm_request_region(&dev->dev, lp->private, 4, "qdi") == NULL)
+ return -EBUSY;
+ ld->timing = lp->private;
+ return 0;
}
static struct ata_port_operations qdi6500_port_ops = {
+ .inherits = &legacy_base_port_ops,
.set_piomode = qdi6500_set_piomode,
-
- .tf_load = ata_tf_load,
- .tf_read = ata_tf_read,
- .check_status = ata_check_status,
- .exec_command = ata_exec_command,
- .dev_select = ata_std_dev_select,
-
- .freeze = ata_bmdma_freeze,
- .thaw = ata_bmdma_thaw,
- .error_handler = ata_bmdma_error_handler,
- .post_internal_cmd = ata_bmdma_post_internal_cmd,
- .cable_detect = ata_cable_40wire,
-
- .qc_prep = ata_qc_prep,
- .qc_issue = qdi_qc_issue_prot,
-
- .data_xfer = qdi_data_xfer,
-
- .irq_handler = ata_interrupt,
- .irq_clear = ata_bmdma_irq_clear,
- .irq_on = ata_irq_on,
-
- .port_start = ata_sff_port_start,
+ .qc_issue = qdi_qc_issue,
+ .sff_data_xfer = vlb32_data_xfer,
};
static struct ata_port_operations qdi6580_port_ops = {
+ .inherits = &legacy_base_port_ops,
.set_piomode = qdi6580_set_piomode,
+ .sff_data_xfer = vlb32_data_xfer,
+};
- .tf_load = ata_tf_load,
- .tf_read = ata_tf_read,
- .check_status = ata_check_status,
- .exec_command = ata_exec_command,
- .dev_select = ata_std_dev_select,
+static struct ata_port_operations qdi6580dp_port_ops = {
+ .inherits = &legacy_base_port_ops,
+ .set_piomode = qdi6580dp_set_piomode,
+ .sff_data_xfer = vlb32_data_xfer,
+};
- .freeze = ata_bmdma_freeze,
- .thaw = ata_bmdma_thaw,
- .error_handler = ata_bmdma_error_handler,
- .post_internal_cmd = ata_bmdma_post_internal_cmd,
- .cable_detect = ata_cable_40wire,
+static DEFINE_SPINLOCK(winbond_lock);
- .qc_prep = ata_qc_prep,
- .qc_issue = ata_qc_issue_prot,
+static void winbond_writecfg(unsigned long port, u8 reg, u8 val)
+{
+ unsigned long flags;
+ spin_lock_irqsave(&winbond_lock, flags);
+ outb(reg, port + 0x01);
+ outb(val, port + 0x02);
+ spin_unlock_irqrestore(&winbond_lock, flags);
+}
- .data_xfer = qdi_data_xfer,
+static u8 winbond_readcfg(unsigned long port, u8 reg)
+{
+ u8 val;
- .irq_handler = ata_interrupt,
- .irq_clear = ata_bmdma_irq_clear,
- .irq_on = ata_irq_on,
+ unsigned long flags;
+ spin_lock_irqsave(&winbond_lock, flags);
+ outb(reg, port + 0x01);
+ val = inb(port + 0x02);
+ spin_unlock_irqrestore(&winbond_lock, flags);
- .port_start = ata_sff_port_start,
-};
+ return val;
+}
-static struct ata_port_operations qdi6580dp_port_ops = {
- .set_piomode = qdi6580dp_set_piomode,
+static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ struct ata_timing t;
+ struct legacy_data *ld_winbond = ap->host->private_data;
+ int active, recovery;
+ u8 reg;
+ int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2);
- .tf_load = ata_tf_load,
- .tf_read = ata_tf_read,
- .check_status = ata_check_status,
- .exec_command = ata_exec_command,
- .dev_select = ata_std_dev_select,
+ reg = winbond_readcfg(ld_winbond->timing, 0x81);
- .freeze = ata_bmdma_freeze,
- .thaw = ata_bmdma_thaw,
- .error_handler = ata_bmdma_error_handler,
- .post_internal_cmd = ata_bmdma_post_internal_cmd,
- .cable_detect = ata_cable_40wire,
+ /* Get the timing data in cycles */
+ if (reg & 0x40) /* Fast VLB bus, assume 50MHz */
+ ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
+ else
+ ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
- .qc_prep = ata_qc_prep,
- .qc_issue = qdi_qc_issue_prot,
+ active = (clamp_val(t.active, 3, 17) - 1) & 0x0F;
+ recovery = (clamp_val(t.recover, 1, 15) + 1) & 0x0F;
+ timing = (active << 4) | recovery;
+ winbond_writecfg(ld_winbond->timing, timing, reg);
- .data_xfer = qdi_data_xfer,
+ /* Load the setup timing */
- .irq_handler = ata_interrupt,
- .irq_clear = ata_bmdma_irq_clear,
- .irq_on = ata_irq_on,
+ reg = 0x35;
+ if (adev->class != ATA_DEV_ATA)
+ reg |= 0x08; /* FIFO off */
+ if (!ata_pio_need_iordy(adev))
+ reg |= 0x02; /* IORDY off */
+ reg |= (clamp_val(t.setup, 0, 3) << 6);
+ winbond_writecfg(ld_winbond->timing, timing + 1, reg);
+}
- .port_start = ata_sff_port_start,
+static int winbond_port(struct platform_device *dev,
+ struct legacy_probe *lp, struct legacy_data *ld)
+{
+ if (devm_request_region(&dev->dev, lp->private, 4, "winbond") == NULL)
+ return -EBUSY;
+ ld->timing = lp->private;
+ return 0;
+}
+
+static struct ata_port_operations winbond_port_ops = {
+ .inherits = &legacy_base_port_ops,
+ .set_piomode = winbond_set_piomode,
+ .sff_data_xfer = vlb32_data_xfer,
};
static struct legacy_controller controllers[] = {
{"OPTI82C46X", &opti82c46x_port_ops, 0x0F,
0 , NULL },
{"QDI6500", &qdi6500_port_ops, 0x07,
- ATA_FLAG_NO_IORDY, NULL },
+ ATA_FLAG_NO_IORDY, qdi_port },
{"QDI6580", &qdi6580_port_ops, 0x1F,
- 0 , NULL },
+ 0 , qdi_port },
{"QDI6580DP", &qdi6580dp_port_ops, 0x1F,
- 0 , NULL }
+ 0 , qdi_port },
+ {"W83759A", &winbond_port_ops, 0x1F,
+ 0 , winbond_port }
};
/**
* check if the controller appears to be driveless at this point.
*/
-static int probe_chip_type(struct legacy_probe *probe)
+static __init int probe_chip_type(struct legacy_probe *probe)
{
int mask = 1 << probe->slot;
+ if (winbond && (probe->port == 0x1F0 || probe->port == 0x170)) {
+ u8 reg = winbond_readcfg(winbond, 0x81);
+ reg |= 0x80; /* jumpered mode off */
+ winbond_writecfg(winbond, 0x81, reg);
+ reg = winbond_readcfg(winbond, 0x83);
+ reg |= 0xF0; /* local control */
+ winbond_writecfg(winbond, 0x83, reg);
+ reg = winbond_readcfg(winbond, 0x85);
+ reg |= 0xF0; /* programmable timing */
+ winbond_writecfg(winbond, 0x85, reg);
+
+ reg = winbond_readcfg(winbond, 0x81);
+
+ if (reg & mask)
+ return W83759A;
+ }
if (probe->port == 0x1F0) {
unsigned long flags;
local_irq_save(flags);
if (!io_addr || !ctrl_addr)
goto fail;
if (controller->setup)
- if (controller->setup(probe, ld) < 0)
+ if (controller->setup(pdev, probe, ld) < 0)
goto fail;
host = ata_host_alloc(&pdev->dev, 1);
if (!host)
ap->ioaddr.cmd_addr = io_addr;
ap->ioaddr.altstatus_addr = ctrl_addr;
ap->ioaddr.ctl_addr = ctrl_addr;
- ata_std_ports(&ap->ioaddr);
- ap->private_data = ld;
+ ata_sff_std_ports(&ap->ioaddr);
+ ap->host->private_data = ld;
ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io, io + 0x0206);
- ret = ata_host_activate(host, probe->irq, ata_interrupt, 0,
- &legacy_sht);
+ ret = ata_host_activate(host, probe->irq, ata_sff_interrupt, 0,
+ &legacy_sht);
if (ret)
goto fail;
ld->platform_dev = pdev;
/* Nothing found means we drop the port as its probably not there */
ret = -ENODEV;
- ata_link_for_each_dev(dev, &ap->link) {
+ ata_for_each_dev(dev, &ap->link, ALL) {
if (!ata_dev_absent(dev)) {
legacy_host[probe->slot] = host;
ld->platform_dev = pdev;
}
}
fail:
- if (host)
- ata_host_detach(host);
- /* FIXME: use devm for this */
- if (ld->timing)
- release_region(ld->timing, 2);
platform_device_unregister(pdev);
return ret;
}
* is the right driver anyway.
*/
-static void legacy_check_special_cases(struct pci_dev *p, int *primary,
+static void __init legacy_check_special_cases(struct pci_dev *p, int *primary,
int *secondary)
{
/* Cyrix CS5510 pre SFF MWDMA ATA on the bridge */
/* Check card type */
if ((r & 0xF0) == 0xC0) {
/* QD6500: single channel */
- if (r & 8) {
+ if (r & 8)
/* Disabled ? */
- release_region(port, 2);
return;
- }
legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),
QDI6500, port);
}
/* port + 0x02, r & 0x04 */
legacy_probe_add(0x170, 15, QDI6580DP, port + 2);
}
+ release_region(port + 2, 2);
}
}
r = inb(port + 1);
udelay(1);
/* Check port agrees with port set */
- if ((r & 2) >> 1 != i) {
- release_region(port, 2);
- continue;
- }
- qdi65_identify_port(r, res, port);
+ if ((r & 2) >> 1 == i)
+ qdi65_identify_port(r, res, port);
+ release_region(port, 2);
}
}
}
pci_present = 1;
}
+ if (winbond == 1)
+ winbond = 0x130; /* Default port, alt is 1B0 */
+
if (primary == 0 || all)
legacy_probe_add(0x1F0, 14, UNKNOWN, 0);
if (secondary == 0 || all)
if (qdi)
probe_qdi_vlb();
-
for (i = 0; i < NR_HOST; i++, pl++) {
if (pl->port == 0)
continue;
struct legacy_data *ld = &legacy_data[i];
ata_host_detach(legacy_host[i]);
platform_device_unregister(ld->platform_dev);
- if (ld->timing)
- release_region(ld->timing, 2);
}
}
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff