* driven by AHCI in the usual configuration although
* this driver can handle other setups if we need it.
*
- * (c) 2006 Red Hat <alan@redhat.com>
+ * (c) 2006 Red Hat
*/
#include <linux/kernel.h>
#include <linux/ata.h>
#define DRV_NAME "pata_jmicron"
-#define DRV_VERSION "0.1.4"
+#define DRV_VERSION "0.1.5"
typedef enum {
PORT_PATA0 = 0,
/**
* jmicron_pre_reset - check for 40/80 pin
- * @ap: Port
+ * @link: ATA link
+ * @deadline: deadline jiffies for the operation
*
* Perform the PATA port setup we need.
-
+ *
* On the Jmicron 361/363 there is a single PATA port that can be mapped
* either as primary or secondary (or neither). We don't do any policy
* and setup here. We assume that has been done by init_one and the
* BIOS.
*/
-
-static int jmicron_pre_reset(struct ata_port *ap)
+static int jmicron_pre_reset(struct ata_link *link, unsigned long deadline)
{
+ struct ata_port *ap = link->ap;
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
u32 control;
u32 control5;
* actually do our cable checking etc. Thankfully we don't need
* to do the plumbing for other cases.
*/
- switch (port_map[port])
- {
+ switch (port_map[port]) {
case PORT_PATA0:
- if (control & (1 << 5))
- return 0;
+ if ((control & (1 << 5)) == 0)
+ return -ENOENT;
if (control & (1 << 3)) /* 40/80 pin primary */
ap->cbl = ATA_CBL_PATA40;
else
case PORT_PATA1:
/* Bit 21 is set if the port is enabled */
if ((control5 & (1 << 21)) == 0)
- return 0;
+ return -ENOENT;
if (control5 & (1 << 19)) /* 40/80 pin secondary */
ap->cbl = ATA_CBL_PATA40;
else
ap->cbl = ATA_CBL_SATA;
break;
}
- return ata_std_prereset(ap);
-}
-
-/**
- * jmicron_error_handler - Setup and error handler
- * @ap: Port to handle
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void jmicron_error_handler(struct ata_port *ap)
-{
- return ata_bmdma_drive_eh(ap, jmicron_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
+ return ata_sff_prereset(link, deadline);
}
/* No PIO or DMA methods needed for this device */
static struct scsi_host_template jmicron_sht = {
- .module = THIS_MODULE,
- .name = DRV_NAME,
- .ioctl = ata_scsi_ioctl,
- .queuecommand = ata_scsi_queuecmd,
- .can_queue = ATA_DEF_QUEUE,
- .this_id = ATA_SHT_THIS_ID,
- .sg_tablesize = LIBATA_MAX_PRD,
- .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
- .emulated = ATA_SHT_EMULATED,
- .use_clustering = ATA_SHT_USE_CLUSTERING,
- .proc_name = DRV_NAME,
- .dma_boundary = ATA_DMA_BOUNDARY,
- .slave_configure = ata_scsi_slave_config,
- .slave_destroy = ata_scsi_slave_destroy,
- /* Use standard CHS mapping rules */
- .bios_param = ata_std_bios_param,
-#ifdef CONFIG_PM
- .suspend = ata_scsi_device_suspend,
- .resume = ata_scsi_device_resume,
-#endif
+ ATA_BMDMA_SHT(DRV_NAME),
};
-static const struct ata_port_operations jmicron_ops = {
- .port_disable = ata_port_disable,
-
- /* Task file is PCI ATA format, use helpers */
- .tf_load = ata_tf_load,
- .tf_read = ata_tf_read,
- .check_status = ata_check_status,
- .exec_command = ata_exec_command,
- .dev_select = ata_std_dev_select,
-
- .freeze = ata_bmdma_freeze,
- .thaw = ata_bmdma_thaw,
- .error_handler = jmicron_error_handler,
- .post_internal_cmd = ata_bmdma_post_internal_cmd,
-
- /* BMDMA handling is PCI ATA format, use helpers */
- .bmdma_setup = ata_bmdma_setup,
- .bmdma_start = ata_bmdma_start,
- .bmdma_stop = ata_bmdma_stop,
- .bmdma_status = ata_bmdma_status,
- .qc_prep = ata_qc_prep,
- .qc_issue = ata_qc_issue_prot,
- .data_xfer = ata_data_xfer,
-
- /* IRQ-related hooks */
- .irq_handler = ata_interrupt,
- .irq_clear = ata_bmdma_irq_clear,
- .irq_on = ata_irq_on,
- .irq_ack = ata_irq_ack,
-
- /* Generic PATA PCI ATA helpers */
- .port_start = ata_port_start,
+static struct ata_port_operations jmicron_ops = {
+ .inherits = &ata_bmdma_port_ops,
+ .prereset = jmicron_pre_reset,
};
static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
{
- static struct ata_port_info info = {
- .sht = &jmicron_sht,
- .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
+ static const struct ata_port_info info = {
+ .flags = ATA_FLAG_SLAVE_POSS,
- .pio_mask = 0x1f,
- .mwdma_mask = 0x07,
- .udma_mask = 0x3f,
+ .pio_mask = ATA_PIO4,
+ .mwdma_mask = ATA_MWDMA2,
+ .udma_mask = ATA_UDMA5,
.port_ops = &jmicron_ops,
};
- struct ata_port_info *port_info[2] = { &info, &info };
+ const struct ata_port_info *ppi[] = { &info, NULL };
- return ata_pci_init_one(pdev, port_info, 2);
+ return ata_pci_sff_init_one(pdev, ppi, &jmicron_sht, NULL);
}
static const struct pci_device_id jmicron_pci_tbl[] = {
- { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361,
- PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 361 },
- { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363,
- PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 363 },
- { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365,
- PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 365 },
- { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366,
- PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 366 },
- { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368,
- PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 368 },
-
+ { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+ PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 },
{ } /* terminate list */
};
.id_table = jmicron_pci_tbl,
.probe = jmicron_init_one,
.remove = ata_pci_remove_one,
+#ifdef CONFIG_PM
.suspend = ata_pci_device_suspend,
.resume = ata_pci_device_resume,
+#endif
};
static int __init jmicron_init(void)