drm/radeon/kms: clear confusion in GART init/deinit path
[safe/jmp/linux-2.6] / arch / x86 / kernel / i8259.c
index 8b7eb0c..df89102 100644 (file)
 #include <linux/kernel_stat.h>
 #include <linux/sysdev.h>
 #include <linux/bitops.h>
+#include <linux/acpi.h>
+#include <linux/io.h>
+#include <linux/delay.h>
 
-#include <asm/acpi.h>
 #include <asm/atomic.h>
 #include <asm/system.h>
-#include <asm/io.h>
 #include <asm/timer.h>
 #include <asm/hw_irq.h>
 #include <asm/pgtable.h>
-#include <asm/delay.h>
 #include <asm/desc.h>
 #include <asm/apic.h>
-#include <asm/arch_hooks.h>
 #include <asm/i8259.h>
 
 /*
@@ -129,14 +128,14 @@ static inline int i8259A_irq_real(unsigned int irq)
        int irqmask = 1<<irq;
 
        if (irq < 8) {
-               outb(0x0B,PIC_MASTER_CMD);      /* ISR register */
+               outb(0x0B, PIC_MASTER_CMD);     /* ISR register */
                value = inb(PIC_MASTER_CMD) & irqmask;
-               outb(0x0A,PIC_MASTER_CMD);      /* back to the IRR register */
+               outb(0x0A, PIC_MASTER_CMD);     /* back to the IRR register */
                return value;
        }
-       outb(0x0B,PIC_SLAVE_CMD);       /* ISR register */
+       outb(0x0B, PIC_SLAVE_CMD);      /* ISR register */
        value = inb(PIC_SLAVE_CMD) & (irqmask >> 8);
-       outb(0x0A,PIC_SLAVE_CMD);       /* back to the IRR register */
+       outb(0x0A, PIC_SLAVE_CMD);      /* back to the IRR register */
        return value;
 }
 
@@ -175,24 +174,14 @@ handle_real_irq:
        if (irq & 8) {
                inb(PIC_SLAVE_IMR);     /* DUMMY - (do we need this?) */
                outb(cached_slave_mask, PIC_SLAVE_IMR);
-#ifndef CONFIG_X86_64
-               outb(0x60+(irq&7),PIC_SLAVE_CMD);/* 'Specific EOI' to slave */
-               outb(0x60+PIC_CASCADE_IR,PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */
-#else /* CONFIG_X86_64 */
                /* 'Specific EOI' to slave */
-               outb(0x60+(irq&7),PIC_SLAVE_CMD);
+               outb(0x60+(irq&7), PIC_SLAVE_CMD);
                 /* 'Specific EOI' to master-IRQ2 */
-               outb(0x60+PIC_CASCADE_IR,PIC_MASTER_CMD);
-#endif /* CONFIG_X86_64 */
+               outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD);
        } else {
                inb(PIC_MASTER_IMR);    /* DUMMY - (do we need this?) */
                outb(cached_master_mask, PIC_MASTER_IMR);
-#ifndef CONFIG_X86_64
-               outb(0x60+irq,PIC_MASTER_CMD);  /* 'Specific EOI to master */
-#else /* CONFIG_X86_64 */
-               /* 'Specific EOI' to master */
-               outb(0x60+irq,PIC_MASTER_CMD);
-#endif /* CONFIG_X86_64 */
+               outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */
        }
        spin_unlock_irqrestore(&i8259A_lock, flags);
        return;
@@ -215,12 +204,8 @@ spurious_8259A_irq:
                 * lets ACK and report it. [once per IRQ]
                 */
                if (!(spurious_irq_mask & irqmask)) {
-#ifndef CONFIG_X86_64
-                       printk(KERN_DEBUG "spurious 8259A interrupt: IRQ%d.\n", irq);
-#else /* CONFIG_X86_64 */
                        printk(KERN_DEBUG
                               "spurious 8259A interrupt: IRQ%d.\n", irq);
-#endif /* CONFIG_X86_64 */
                        spurious_irq_mask |= irqmask;
                }
                atomic_inc(&irq_err_count);
@@ -296,6 +281,30 @@ static int __init i8259A_init_sysfs(void)
 
 device_initcall(i8259A_init_sysfs);
 
+void mask_8259A(void)
+{
+       unsigned long flags;
+
+       spin_lock_irqsave(&i8259A_lock, flags);
+
+       outb(0xff, PIC_MASTER_IMR);     /* mask all of 8259A-1 */
+       outb(0xff, PIC_SLAVE_IMR);      /* mask all of 8259A-2 */
+
+       spin_unlock_irqrestore(&i8259A_lock, flags);
+}
+
+void unmask_8259A(void)
+{
+       unsigned long flags;
+
+       spin_lock_irqsave(&i8259A_lock, flags);
+
+       outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */
+       outb(cached_slave_mask, PIC_SLAVE_IMR);   /* restore slave IRQ mask */
+
+       spin_unlock_irqrestore(&i8259A_lock, flags);
+}
+
 void init_8259A(int auto_eoi)
 {
        unsigned long flags;
@@ -311,34 +320,28 @@ void init_8259A(int auto_eoi)
         * outb_pic - this has to work on a wide range of PC hardware.
         */
        outb_pic(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */
-#ifndef CONFIG_X86_64
-       outb_pic(0x20 + 0, PIC_MASTER_IMR);     /* ICW2: 8259A-1 IR0-7 mapped to 0x20-0x27 */
-       outb_pic(1U << PIC_CASCADE_IR, PIC_MASTER_IMR); /* 8259A-1 (the master) has a slave on IR2 */
-#else /* CONFIG_X86_64 */
-       /* ICW2: 8259A-1 IR0-7 mapped to 0x30-0x37 */
+
+       /* ICW2: 8259A-1 IR0-7 mapped to 0x30-0x37 on x86-64,
+          to 0x20-0x27 on i386 */
        outb_pic(IRQ0_VECTOR, PIC_MASTER_IMR);
+
        /* 8259A-1 (the master) has a slave on IR2 */
-       outb_pic(0x04, PIC_MASTER_IMR);
-#endif /* CONFIG_X86_64 */
+       outb_pic(1U << PIC_CASCADE_IR, PIC_MASTER_IMR);
+
        if (auto_eoi)   /* master does Auto EOI */
                outb_pic(MASTER_ICW4_DEFAULT | PIC_ICW4_AEOI, PIC_MASTER_IMR);
        else            /* master expects normal EOI */
                outb_pic(MASTER_ICW4_DEFAULT, PIC_MASTER_IMR);
 
        outb_pic(0x11, PIC_SLAVE_CMD);  /* ICW1: select 8259A-2 init */
-#ifndef CONFIG_X86_64
-       outb_pic(0x20 + 8, PIC_SLAVE_IMR);      /* ICW2: 8259A-2 IR0-7 mapped to 0x28-0x2f */
-       outb_pic(PIC_CASCADE_IR, PIC_SLAVE_IMR);        /* 8259A-2 is a slave on master's IR2 */
-       outb_pic(SLAVE_ICW4_DEFAULT, PIC_SLAVE_IMR); /* (slave's support for AEOI in flat mode is to be investigated) */
-#else /* CONFIG_X86_64 */
-       /* ICW2: 8259A-2 IR0-7 mapped to 0x38-0x3f */
+
+       /* ICW2: 8259A-2 IR0-7 mapped to IRQ8_VECTOR */
        outb_pic(IRQ8_VECTOR, PIC_SLAVE_IMR);
        /* 8259A-2 is a slave on master's IR2 */
        outb_pic(PIC_CASCADE_IR, PIC_SLAVE_IMR);
        /* (slave's support for AEOI in flat mode is to be investigated) */
        outb_pic(SLAVE_ICW4_DEFAULT, PIC_SLAVE_IMR);
 
-#endif /* CONFIG_X86_64 */
        if (auto_eoi)
                /*
                 * In AEOI mode we just have to mask the interrupt