x86: rename mpc_config_processor to mpc_cpu

[safe/jmp/linux-2.6] / arch / x86 / kernel / amd_iommu_init.c

diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 0cdcda3..fb85e8d 100644 (file)
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -28,6 +28,7 @@
 #include <asm/amd_iommu_types.h>
 #include <asm/amd_iommu.h>
 #include <asm/iommu.h>
+#include <asm/gart.h>
 
 /*
  * definitions for the ACPI scanning code
@@ -121,7 +122,7 @@ u16 amd_iommu_last_bdf;                     /* largest PCI device id we have
 LIST_HEAD(amd_iommu_unity_map);                /* a list of required unity mappings
                                           we find in ACPI */
 unsigned amd_iommu_aperture_order = 26; /* size of aperture in power of 2 */
-int amd_iommu_isolate;                 /* if 1, device isolation is enabled */
+int amd_iommu_isolate = 1;             /* if 1, device isolation is enabled */
 bool amd_iommu_unmap_flush;            /* if true, flush on every unmap */
 
 LIST_HEAD(amd_iommu_list);             /* list of all AMD IOMMUs in the
@@ -242,7 +243,7 @@ static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit)
 }
 
 /* Function to enable the hardware */
-void __init iommu_enable(struct amd_iommu *iommu)
+static void __init iommu_enable(struct amd_iommu *iommu)
 {
        printk(KERN_INFO "AMD IOMMU: Enabling IOMMU "
               "at %02x:%02x.%x cap 0x%hx\n",
@@ -255,7 +256,7 @@ void __init iommu_enable(struct amd_iommu *iommu)
 }
 
 /* Function to enable IOMMU event logging and event interrupts */
-void __init iommu_enable_event_logging(struct amd_iommu *iommu)
+static void __init iommu_enable_event_logging(struct amd_iommu *iommu)
 {
        iommu_feature_enable(iommu, CONTROL_EVT_LOG_EN);
        iommu_feature_enable(iommu, CONTROL_EVT_INT_EN);
@@ -427,6 +428,10 @@ static u8 * __init alloc_command_buffer(struct amd_iommu *iommu)
        memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET,
                        &entry, sizeof(entry));
 
+       /* set head and tail to zero manually */
+       writel(0x00, iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
+       writel(0x00, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
+
        iommu_feature_enable(iommu, CONTROL_CMDBUF_EN);
 
        return cmd_buf;
@@ -1074,7 +1079,8 @@ int __init amd_iommu_init(void)
                goto free;
 
        /* IOMMU rlookup table - find the IOMMU for a specific device */
-       amd_iommu_rlookup_table = (void *)__get_free_pages(GFP_KERNEL,
+       amd_iommu_rlookup_table = (void *)__get_free_pages(
+                       GFP_KERNEL | __GFP_ZERO,
                        get_order(rlookup_table_size));
        if (amd_iommu_rlookup_table == NULL)
                goto free;
@@ -1213,7 +1219,9 @@ static int __init parse_amd_iommu_options(char *str)
        for (; *str; ++str) {
                if (strncmp(str, "isolate", 7) == 0)
                        amd_iommu_isolate = 1;
-               if (strncmp(str, "fullflush", 11) == 0)
+               if (strncmp(str, "share", 5) == 0)
+                       amd_iommu_isolate = 0;
+               if (strncmp(str, "fullflush", 9) == 0)
                        amd_iommu_unmap_flush = true;
        }