x86, hweight: Use a 32-bit popcnt for __arch_hweight32()

[safe/jmp/linux-2.6] / arch / x86 / Kconfig.cpu

diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 924e156..a198293 100644 (file)
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -262,6 +262,15 @@ config MCORE2
          family in /proc/cpuinfo. Newer ones have 6 and older ones 15
          (not a typo)
 
+config MATOM
+       bool "Intel Atom"
+       ---help---
+
+         Select this for the Intel Atom platform. Intel Atom CPUs have an
+         in-order pipelining architecture and thus can benefit from
+         accordingly optimized code. Use a recent GCC with specific Atom
+         support in order to fully benefit from selecting this option.
+
 config GENERIC_CPU
        bool "Generic-x86-64"
        depends on X86_64
@@ -292,15 +301,11 @@ config X86_CPU
 
 #
 # Define implied options from the CPU selection here
-config X86_L1_CACHE_BYTES
+config X86_INTERNODE_CACHE_SHIFT
        int
-       default "128" if MPSC
-       default "64" if GENERIC_CPU || MK8 || MCORE2 || X86_32
-
-config X86_INTERNODE_CACHE_BYTES
-       int
-       default "4096" if X86_VSMP
-       default X86_L1_CACHE_BYTES if !X86_VSMP
+       default "12" if X86_VSMP
+       default "7" if NUMA
+       default X86_L1_CACHE_SHIFT
 
 config X86_CMPXCHG
        def_bool X86_64 || (X86_32 && !M386)
@@ -308,13 +313,13 @@ config X86_CMPXCHG
 config X86_L1_CACHE_SHIFT
        int
        default "7" if MPENTIUM4 || MPSC
+       default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
        default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
        default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
-       default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7 || X86_GENERIC || GENERIC_CPU
 
 config X86_XADD
        def_bool y
-       depends on X86_32 && !M386
+       depends on X86_64 || !M386
 
 config X86_PPRO_FENCE
        bool "PentiumPro memory ordering errata workaround"
@@ -359,7 +364,7 @@ config X86_INTEL_USERCOPY
 
 config X86_USE_PPRO_CHECKSUM
        def_bool y
-       depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX || MCORE2
+       depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
 
 config X86_USE_3DNOW
        def_bool y
@@ -387,22 +392,23 @@ config X86_P6_NOP
 
 config X86_TSC
        def_bool y
-       depends on ((MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ) || X86_64
+       depends on ((MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) && !X86_NUMAQ) || X86_64
 
 config X86_CMPXCHG64
        def_bool y
-       depends on X86_PAE || X86_64
+       depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM
 
 # this should be set for all -march=.. options where the compiler
 # generates cmov.
 config X86_CMOV
        def_bool y
-       depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64)
+       depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
 
 config X86_MINIMUM_CPU_FAMILY
        int
        default "64" if X86_64
        default "6" if X86_32 && X86_P6_NOP
+       default "5" if X86_32 && X86_CMPXCHG64
        default "4" if X86_32 && (X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK)
        default "3"
 
@@ -506,6 +512,7 @@ config X86_PTRACE_BTS
        bool "Branch Trace Store"
        default y
        depends on X86_DEBUGCTLMSR
+       depends on BROKEN
        ---help---
          This adds a ptrace interface to the hardware's branch trace store.