-/* $Id: irq.c,v 1.114 2002/01/11 08:45:38 davem Exp $
- * irq.c: UltraSparc IRQ handling/init/registry.
+/* irq.c: UltraSparc IRQ handling/init/registry.
*
- * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1997, 2007, 2008 David S. Miller (davem@davemloft.net)
* Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
* Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
*/
-#include <linux/config.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/ptrace.h>
#include <linux/delay.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
+#include <linux/bootmem.h>
+#include <linux/irq.h>
#include <asm/ptrace.h>
#include <asm/processor.h>
#include <asm/iommu.h>
#include <asm/upa.h>
#include <asm/oplib.h>
+#include <asm/prom.h>
#include <asm/timer.h>
#include <asm/smp.h>
#include <asm/starfire.h>
#include <asm/cache.h>
#include <asm/cpudata.h>
#include <asm/auxio.h>
+#include <asm/head.h>
+#include <asm/hypervisor.h>
+#include <asm/cacheflush.h>
-#ifdef CONFIG_SMP
-static void distribute_irqs(void);
-#endif
-
-/* UPA nodes send interrupt packet to UltraSparc with first data reg
- * value low 5 (7 on Starfire) bits holding the IRQ identifier being
- * delivered. We must translate this into a non-vector IRQ so we can
- * set the softint on this cpu.
- *
- * To make processing these packets efficient and race free we use
- * an array of irq buckets below. The interrupt vector handler in
- * entry.S feeds incoming packets into per-cpu pil-indexed lists.
- * The IVEC handler does not need to act atomically, the PIL dispatch
- * code uses CAS to get an atomic snapshot of the list and clear it
- * at the same time.
- */
+#include "entry.h"
-struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BYTES)));
+#define NUM_IVECS (IMAP_INR + 1)
-/* This has to be in the main kernel image, it cannot be
- * turned into per-cpu data. The reason is that the main
- * kernel image is locked into the TLB and this structure
- * is accessed from the vectored interrupt trap handler. If
- * access to this structure takes a TLB miss it could cause
- * the 5-level sparc v9 trap stack to overflow.
- */
-struct irq_work_struct {
- unsigned int irq_worklists[16];
-};
-struct irq_work_struct __irq_work[NR_CPUS];
-#define irq_work(__cpu, __pil) &(__irq_work[(__cpu)].irq_worklists[(__pil)])
-
-static struct irqaction *irq_action[NR_IRQS+1];
+struct ino_bucket *ivector_table;
+unsigned long ivector_table_pa;
-/* This only synchronizes entities which modify IRQ handler
- * state and some selected user-level spots that want to
- * read things in the table. IRQ handler processing orders
- * its' accesses such that no locking is needed.
+/* On several sun4u processors, it is illegal to mix bypass and
+ * non-bypass accesses. Therefore we access all INO buckets
+ * using bypass accesses only.
*/
-static DEFINE_SPINLOCK(irq_action_lock);
+static unsigned long bucket_get_chain_pa(unsigned long bucket_pa)
+{
+ unsigned long ret;
-static void register_irq_proc (unsigned int irq);
+ __asm__ __volatile__("ldxa [%1] %2, %0"
+ : "=&r" (ret)
+ : "r" (bucket_pa +
+ offsetof(struct ino_bucket,
+ __irq_chain_pa)),
+ "i" (ASI_PHYS_USE_EC));
-/*
- * Upper 2b of irqaction->flags holds the ino.
- * irqaction->mask holds the smp affinity information.
- */
-#define put_ino_in_irqaction(action, irq) \
- action->flags &= 0xffffffffffffUL; \
- if (__bucket(irq) == &pil0_dummy_bucket) \
- action->flags |= 0xdeadUL << 48; \
- else \
- action->flags |= __irq_ino(irq) << 48;
-#define get_ino_in_irqaction(action) (action->flags >> 48)
+ return ret;
+}
-#define put_smpaff_in_irqaction(action, smpaff) (action)->mask = (smpaff)
-#define get_smpaff_in_irqaction(action) ((action)->mask)
+static void bucket_clear_chain_pa(unsigned long bucket_pa)
+{
+ __asm__ __volatile__("stxa %%g0, [%0] %1"
+ : /* no outputs */
+ : "r" (bucket_pa +
+ offsetof(struct ino_bucket,
+ __irq_chain_pa)),
+ "i" (ASI_PHYS_USE_EC));
+}
-int show_interrupts(struct seq_file *p, void *v)
+static unsigned int bucket_get_virt_irq(unsigned long bucket_pa)
{
- unsigned long flags;
- int i = *(loff_t *) v;
- struct irqaction *action;
-#ifdef CONFIG_SMP
- int j;
-#endif
+ unsigned int ret;
- spin_lock_irqsave(&irq_action_lock, flags);
- if (i <= NR_IRQS) {
- if (!(action = *(i + irq_action)))
- goto out_unlock;
- seq_printf(p, "%3d: ", i);
-#ifndef CONFIG_SMP
- seq_printf(p, "%10u ", kstat_irqs(i));
-#else
- for (j = 0; j < NR_CPUS; j++) {
- if (!cpu_online(j))
- continue;
- seq_printf(p, "%10u ",
- kstat_cpu(j).irqs[i]);
- }
-#endif
- seq_printf(p, " %s:%lx", action->name,
- get_ino_in_irqaction(action));
- for (action = action->next; action; action = action->next) {
- seq_printf(p, ", %s:%lx", action->name,
- get_ino_in_irqaction(action));
- }
- seq_putc(p, '\n');
- }
-out_unlock:
- spin_unlock_irqrestore(&irq_action_lock, flags);
+ __asm__ __volatile__("lduwa [%1] %2, %0"
+ : "=&r" (ret)
+ : "r" (bucket_pa +
+ offsetof(struct ino_bucket,
+ __virt_irq)),
+ "i" (ASI_PHYS_USE_EC));
- return 0;
+ return ret;
}
-/* Now these are always passed a true fully specified sun4u INO. */
-void enable_irq(unsigned int irq)
+static void bucket_set_virt_irq(unsigned long bucket_pa,
+ unsigned int virt_irq)
{
- struct ino_bucket *bucket = __bucket(irq);
- unsigned long imap;
- unsigned long tid;
+ __asm__ __volatile__("stwa %0, [%1] %2"
+ : /* no outputs */
+ : "r" (virt_irq),
+ "r" (bucket_pa +
+ offsetof(struct ino_bucket,
+ __virt_irq)),
+ "i" (ASI_PHYS_USE_EC));
+}
- imap = bucket->imap;
- if (imap == 0UL)
- return;
+#define irq_work_pa(__cpu) &(trap_block[(__cpu)].irq_worklist_pa)
- preempt_disable();
+static struct {
+ unsigned int dev_handle;
+ unsigned int dev_ino;
+ unsigned int in_use;
+} virt_irq_table[NR_IRQS];
+static DEFINE_SPINLOCK(virt_irq_alloc_lock);
- if (tlb_type == cheetah || tlb_type == cheetah_plus) {
- unsigned long ver;
+unsigned char virt_irq_alloc(unsigned int dev_handle,
+ unsigned int dev_ino)
+{
+ unsigned long flags;
+ unsigned char ent;
- __asm__ ("rdpr %%ver, %0" : "=r" (ver));
- if ((ver >> 32) == 0x003e0016) {
- /* We set it to our JBUS ID. */
- __asm__ __volatile__("ldxa [%%g0] %1, %0"
- : "=r" (tid)
- : "i" (ASI_JBUS_CONFIG));
- tid = ((tid & (0x1fUL<<17)) << 9);
- tid &= IMAP_TID_JBUS;
- } else {
- /* We set it to our Safari AID. */
- __asm__ __volatile__("ldxa [%%g0] %1, %0"
- : "=r" (tid)
- : "i" (ASI_SAFARI_CONFIG));
- tid = ((tid & (0x3ffUL<<17)) << 9);
- tid &= IMAP_AID_SAFARI;
- }
- } else if (this_is_starfire == 0) {
- /* We set it to our UPA MID. */
- __asm__ __volatile__("ldxa [%%g0] %1, %0"
- : "=r" (tid)
- : "i" (ASI_UPA_CONFIG));
- tid = ((tid & UPA_CONFIG_MID) << 9);
- tid &= IMAP_TID_UPA;
+ BUILD_BUG_ON(NR_IRQS >= 256);
+
+ spin_lock_irqsave(&virt_irq_alloc_lock, flags);
+
+ for (ent = 1; ent < NR_IRQS; ent++) {
+ if (!virt_irq_table[ent].in_use)
+ break;
+ }
+ if (ent >= NR_IRQS) {
+ printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
+ ent = 0;
} else {
- tid = (starfire_translate(imap, smp_processor_id()) << 26);
- tid &= IMAP_TID_UPA;
+ virt_irq_table[ent].dev_handle = dev_handle;
+ virt_irq_table[ent].dev_ino = dev_ino;
+ virt_irq_table[ent].in_use = 1;
}
- /* NOTE NOTE NOTE, IGN and INO are read-only, IGN is a product
- * of this SYSIO's preconfigured IGN in the SYSIO Control
- * Register, the hardware just mirrors that value here.
- * However for Graphics and UPA Slave devices the full
- * IMAP_INR field can be set by the programmer here.
- *
- * Things like FFB can now be handled via the new IRQ mechanism.
- */
- upa_writel(tid | IMAP_VALID, imap);
+ spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
- preempt_enable();
+ return ent;
}
-/* This now gets passed true ino's as well. */
-void disable_irq(unsigned int irq)
+#ifdef CONFIG_PCI_MSI
+void virt_irq_free(unsigned int virt_irq)
{
- struct ino_bucket *bucket = __bucket(irq);
- unsigned long imap;
+ unsigned long flags;
- imap = bucket->imap;
- if (imap != 0UL) {
- u32 tmp;
+ if (virt_irq >= NR_IRQS)
+ return;
- /* NOTE: We do not want to futz with the IRQ clear registers
- * and move the state to IDLE, the SCSI code does call
- * disable_irq() to assure atomicity in the queue cmd
- * SCSI adapter driver code. Thus we'd lose interrupts.
- */
- tmp = upa_readl(imap);
- tmp &= ~IMAP_VALID;
- upa_writel(tmp, imap);
- }
-}
+ spin_lock_irqsave(&virt_irq_alloc_lock, flags);
-/* The timer is the one "weird" interrupt which is generated by
- * the CPU %tick register and not by some normal vectored interrupt
- * source. To handle this special case, we use this dummy INO bucket.
- */
-static struct irq_desc pil0_dummy_desc;
-static struct ino_bucket pil0_dummy_bucket = {
- .irq_info = &pil0_dummy_desc,
-};
+ virt_irq_table[virt_irq].in_use = 0;
-static void build_irq_error(const char *msg, unsigned int ino, int pil, int inofixup,
- unsigned long iclr, unsigned long imap,
- struct ino_bucket *bucket)
-{
- prom_printf("IRQ: INO %04x (%d:%016lx:%016lx) --> "
- "(%d:%d:%016lx:%016lx), halting...\n",
- ino, bucket->pil, bucket->iclr, bucket->imap,
- pil, inofixup, iclr, imap);
- prom_halt();
+ spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
}
+#endif
-unsigned int build_irq(int pil, int inofixup, unsigned long iclr, unsigned long imap)
-{
- struct ino_bucket *bucket;
- int ino;
+/*
+ * /proc/interrupts printing:
+ */
- if (pil == 0) {
- if (iclr != 0UL || imap != 0UL) {
- prom_printf("Invalid dummy bucket for PIL0 (%lx:%lx)\n",
- iclr, imap);
- prom_halt();
- }
- return __irq(&pil0_dummy_bucket);
- }
+int show_interrupts(struct seq_file *p, void *v)
+{
+ int i = *(loff_t *) v, j;
+ struct irqaction * action;
+ unsigned long flags;
- /* RULE: Both must be specified in all other cases. */
- if (iclr == 0UL || imap == 0UL) {
- prom_printf("Invalid build_irq %d %d %016lx %016lx\n",
- pil, inofixup, iclr, imap);
- prom_halt();
- }
-
- ino = (upa_readl(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
- if (ino > NUM_IVECS) {
- prom_printf("Invalid INO %04x (%d:%d:%016lx:%016lx)\n",
- ino, pil, inofixup, iclr, imap);
- prom_halt();
+ if (i == 0) {
+ seq_printf(p, " ");
+ for_each_online_cpu(j)
+ seq_printf(p, "CPU%d ",j);
+ seq_putc(p, '\n');
}
- bucket = &ivector_table[ino];
- if (bucket->flags & IBF_ACTIVE)
- build_irq_error("IRQ: Trying to build active INO bucket.\n",
- ino, pil, inofixup, iclr, imap, bucket);
-
- if (bucket->irq_info) {
- if (bucket->imap != imap || bucket->iclr != iclr)
- build_irq_error("IRQ: Trying to reinit INO bucket.\n",
- ino, pil, inofixup, iclr, imap, bucket);
+ if (i < NR_IRQS) {
+ spin_lock_irqsave(&irq_desc[i].lock, flags);
+ action = irq_desc[i].action;
+ if (!action)
+ goto skip;
+ seq_printf(p, "%3d: ",i);
+#ifndef CONFIG_SMP
+ seq_printf(p, "%10u ", kstat_irqs(i));
+#else
+ for_each_online_cpu(j)
+ seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+#endif
+ seq_printf(p, " %9s", irq_desc[i].chip->typename);
+ seq_printf(p, " %s", action->name);
- goto out;
- }
+ for (action=action->next; action; action = action->next)
+ seq_printf(p, ", %s", action->name);
- bucket->irq_info = kmalloc(sizeof(struct irq_desc), GFP_ATOMIC);
- if (!bucket->irq_info) {
- prom_printf("IRQ: Error, kmalloc(irq_desc) failed.\n");
- prom_halt();
+ seq_putc(p, '\n');
+skip:
+ spin_unlock_irqrestore(&irq_desc[i].lock, flags);
}
- memset(bucket->irq_info, 0, sizeof(struct irq_desc));
-
- /* Ok, looks good, set it up. Don't touch the irq_chain or
- * the pending flag.
- */
- bucket->imap = imap;
- bucket->iclr = iclr;
- bucket->pil = pil;
- bucket->flags = 0;
-
-out:
- return __irq(bucket);
+ return 0;
}
-static void atomic_bucket_insert(struct ino_bucket *bucket)
+static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
{
- unsigned long pstate;
- unsigned int *ent;
-
- __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate));
- __asm__ __volatile__("wrpr %0, %1, %%pstate"
- : : "r" (pstate), "i" (PSTATE_IE));
- ent = irq_work(smp_processor_id(), bucket->pil);
- bucket->irq_chain = *ent;
- *ent = __irq(bucket);
- __asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate));
-}
+ unsigned int tid;
-static int check_irq_sharing(int pil, unsigned long irqflags)
-{
- struct irqaction *action, *tmp;
+ if (this_is_starfire) {
+ tid = starfire_translate(imap, cpuid);
+ tid <<= IMAP_TID_SHIFT;
+ tid &= IMAP_TID_UPA;
+ } else {
+ if (tlb_type == cheetah || tlb_type == cheetah_plus) {
+ unsigned long ver;
+
+ __asm__ ("rdpr %%ver, %0" : "=r" (ver));
+ if ((ver >> 32UL) == __JALAPENO_ID ||
+ (ver >> 32UL) == __SERRANO_ID) {
+ tid = cpuid << IMAP_TID_SHIFT;
+ tid &= IMAP_TID_JBUS;
+ } else {
+ unsigned int a = cpuid & 0x1f;
+ unsigned int n = (cpuid >> 5) & 0x1f;
- action = *(irq_action + pil);
- if (action) {
- if ((action->flags & SA_SHIRQ) && (irqflags & SA_SHIRQ)) {
- for (tmp = action; tmp->next; tmp = tmp->next)
- ;
+ tid = ((a << IMAP_AID_SHIFT) |
+ (n << IMAP_NID_SHIFT));
+ tid &= (IMAP_AID_SAFARI |
+ IMAP_NID_SAFARI);;
+ }
} else {
- return -EBUSY;
+ tid = cpuid << IMAP_TID_SHIFT;
+ tid &= IMAP_TID_UPA;
}
}
- return 0;
+
+ return tid;
}
-static void append_irq_action(int pil, struct irqaction *action)
-{
- struct irqaction **pp = irq_action + pil;
+struct irq_handler_data {
+ unsigned long iclr;
+ unsigned long imap;
- while (*pp)
- pp = &((*pp)->next);
- *pp = action;
-}
+ void (*pre_handler)(unsigned int, void *, void *);
+ void *arg1;
+ void *arg2;
+};
-static struct irqaction *get_action_slot(struct ino_bucket *bucket)
+#ifdef CONFIG_SMP
+static int irq_choose_cpu(unsigned int virt_irq)
{
- struct irq_desc *desc = bucket->irq_info;
- int max_irq, i;
+ cpumask_t mask = irq_desc[virt_irq].affinity;
+ int cpuid;
- max_irq = 1;
- if (bucket->flags & IBF_PCI)
- max_irq = MAX_IRQ_DESC_ACTION;
- for (i = 0; i < max_irq; i++) {
- struct irqaction *p = &desc->action[i];
- u32 mask = (1 << i);
+ if (cpus_equal(mask, CPU_MASK_ALL)) {
+ static int irq_rover;
+ static DEFINE_SPINLOCK(irq_rover_lock);
+ unsigned long flags;
+
+ /* Round-robin distribution... */
+ do_round_robin:
+ spin_lock_irqsave(&irq_rover_lock, flags);
+
+ while (!cpu_online(irq_rover)) {
+ if (++irq_rover >= NR_CPUS)
+ irq_rover = 0;
+ }
+ cpuid = irq_rover;
+ do {
+ if (++irq_rover >= NR_CPUS)
+ irq_rover = 0;
+ } while (!cpu_online(irq_rover));
+
+ spin_unlock_irqrestore(&irq_rover_lock, flags);
+ } else {
+ cpumask_t tmp;
- if (desc->action_active_mask & mask)
- continue;
+ cpus_and(tmp, cpu_online_map, mask);
- desc->action_active_mask |= mask;
- return p;
+ if (cpus_empty(tmp))
+ goto do_round_robin;
+
+ cpuid = first_cpu(tmp);
}
- return NULL;
+
+ return cpuid;
+}
+#else
+static int irq_choose_cpu(unsigned int virt_irq)
+{
+ return real_hard_smp_processor_id();
}
+#endif
-int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_regs *),
- unsigned long irqflags, const char *name, void *dev_id)
+static void sun4u_irq_enable(unsigned int virt_irq)
{
- struct irqaction *action;
- struct ino_bucket *bucket = __bucket(irq);
- unsigned long flags;
- int pending = 0;
-
- if (unlikely(!handler))
- return -EINVAL;
-
- if (unlikely(!bucket->irq_info))
- return -ENODEV;
-
- if ((bucket != &pil0_dummy_bucket) && (irqflags & SA_SAMPLE_RANDOM)) {
- /*
- * This function might sleep, we want to call it first,
- * outside of the atomic block. In SA_STATIC_ALLOC case,
- * random driver's kmalloc will fail, but it is safe.
- * If already initialized, random driver will not reinit.
- * Yes, this might clear the entropy pool if the wrong
- * driver is attempted to be loaded, without actually
- * installing a new handler, but is this really a problem,
- * only the sysadmin is able to do this.
- */
- rand_initialize_irq(irq);
- }
+ struct irq_handler_data *data = get_irq_chip_data(virt_irq);
- spin_lock_irqsave(&irq_action_lock, flags);
+ if (likely(data)) {
+ unsigned long cpuid, imap, val;
+ unsigned int tid;
- if (check_irq_sharing(bucket->pil, irqflags)) {
- spin_unlock_irqrestore(&irq_action_lock, flags);
- return -EBUSY;
- }
+ cpuid = irq_choose_cpu(virt_irq);
+ imap = data->imap;
- action = get_action_slot(bucket);
- if (!action) {
- spin_unlock_irqrestore(&irq_action_lock, flags);
- return -ENOMEM;
- }
+ tid = sun4u_compute_tid(imap, cpuid);
- bucket->flags |= IBF_ACTIVE;
- pending = 0;
- if (bucket != &pil0_dummy_bucket) {
- pending = bucket->pending;
- if (pending)
- bucket->pending = 0;
+ val = upa_readq(imap);
+ val &= ~(IMAP_TID_UPA | IMAP_TID_JBUS |
+ IMAP_AID_SAFARI | IMAP_NID_SAFARI);
+ val |= tid | IMAP_VALID;
+ upa_writeq(val, imap);
+ upa_writeq(ICLR_IDLE, data->iclr);
}
+}
- action->handler = handler;
- action->flags = irqflags;
- action->name = name;
- action->next = NULL;
- action->dev_id = dev_id;
- put_ino_in_irqaction(action, irq);
- put_smpaff_in_irqaction(action, CPU_MASK_NONE);
+static void sun4u_set_affinity(unsigned int virt_irq, cpumask_t mask)
+{
+ sun4u_irq_enable(virt_irq);
+}
- append_irq_action(bucket->pil, action);
+static void sun4u_irq_disable(unsigned int virt_irq)
+{
+ struct irq_handler_data *data = get_irq_chip_data(virt_irq);
- enable_irq(irq);
+ if (likely(data)) {
+ unsigned long imap = data->imap;
+ unsigned long tmp = upa_readq(imap);
- /* We ate the IVEC already, this makes sure it does not get lost. */
- if (pending) {
- atomic_bucket_insert(bucket);
- set_softint(1 << bucket->pil);
+ tmp &= ~IMAP_VALID;
+ upa_writeq(tmp, imap);
}
+}
- spin_unlock_irqrestore(&irq_action_lock, flags);
+static void sun4u_irq_eoi(unsigned int virt_irq)
+{
+ struct irq_handler_data *data = get_irq_chip_data(virt_irq);
+ struct irq_desc *desc = irq_desc + virt_irq;
- if (bucket != &pil0_dummy_bucket)
- register_irq_proc(__irq_ino(irq));
+ if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ return;
-#ifdef CONFIG_SMP
- distribute_irqs();
-#endif
- return 0;
+ if (likely(data))
+ upa_writeq(ICLR_IDLE, data->iclr);
}
-EXPORT_SYMBOL(request_irq);
+static void sun4v_irq_enable(unsigned int virt_irq)
+{
+ unsigned int ino = virt_irq_table[virt_irq].dev_ino;
+ unsigned long cpuid = irq_choose_cpu(virt_irq);
+ int err;
+
+ err = sun4v_intr_settarget(ino, cpuid);
+ if (err != HV_EOK)
+ printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
+ "err(%d)\n", ino, cpuid, err);
+ err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
+ if (err != HV_EOK)
+ printk(KERN_ERR "sun4v_intr_setstate(%x): "
+ "err(%d)\n", ino, err);
+ err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
+ if (err != HV_EOK)
+ printk(KERN_ERR "sun4v_intr_setenabled(%x): err(%d)\n",
+ ino, err);
+}
-static struct irqaction *unlink_irq_action(unsigned int irq, void *dev_id)
+static void sun4v_set_affinity(unsigned int virt_irq, cpumask_t mask)
{
- struct ino_bucket *bucket = __bucket(irq);
- struct irqaction *action, **pp;
+ unsigned int ino = virt_irq_table[virt_irq].dev_ino;
+ unsigned long cpuid = irq_choose_cpu(virt_irq);
+ int err;
+
+ err = sun4v_intr_settarget(ino, cpuid);
+ if (err != HV_EOK)
+ printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
+ "err(%d)\n", ino, cpuid, err);
+}
- pp = irq_action + bucket->pil;
- action = *pp;
- if (unlikely(!action))
- return NULL;
+static void sun4v_irq_disable(unsigned int virt_irq)
+{
+ unsigned int ino = virt_irq_table[virt_irq].dev_ino;
+ int err;
- if (unlikely(!action->handler)) {
- printk("Freeing free IRQ %d\n", bucket->pil);
- return NULL;
- }
+ err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
+ if (err != HV_EOK)
+ printk(KERN_ERR "sun4v_intr_setenabled(%x): "
+ "err(%d)\n", ino, err);
+}
- while (action && action->dev_id != dev_id) {
- pp = &action->next;
- action = *pp;
- }
+static void sun4v_irq_eoi(unsigned int virt_irq)
+{
+ unsigned int ino = virt_irq_table[virt_irq].dev_ino;
+ struct irq_desc *desc = irq_desc + virt_irq;
+ int err;
- if (likely(action))
- *pp = action->next;
+ if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ return;
- return action;
+ err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
+ if (err != HV_EOK)
+ printk(KERN_ERR "sun4v_intr_setstate(%x): "
+ "err(%d)\n", ino, err);
}
-void free_irq(unsigned int irq, void *dev_id)
+static void sun4v_virq_enable(unsigned int virt_irq)
{
- struct irqaction *action;
- struct ino_bucket *bucket;
- unsigned long flags;
+ unsigned long cpuid, dev_handle, dev_ino;
+ int err;
+
+ cpuid = irq_choose_cpu(virt_irq);
+
+ dev_handle = virt_irq_table[virt_irq].dev_handle;
+ dev_ino = virt_irq_table[virt_irq].dev_ino;
+
+ err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
+ if (err != HV_EOK)
+ printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
+ "err(%d)\n",
+ dev_handle, dev_ino, cpuid, err);
+ err = sun4v_vintr_set_state(dev_handle, dev_ino,
+ HV_INTR_STATE_IDLE);
+ if (err != HV_EOK)
+ printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
+ "HV_INTR_STATE_IDLE): err(%d)\n",
+ dev_handle, dev_ino, err);
+ err = sun4v_vintr_set_valid(dev_handle, dev_ino,
+ HV_INTR_ENABLED);
+ if (err != HV_EOK)
+ printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
+ "HV_INTR_ENABLED): err(%d)\n",
+ dev_handle, dev_ino, err);
+}
- spin_lock_irqsave(&irq_action_lock, flags);
+static void sun4v_virt_set_affinity(unsigned int virt_irq, cpumask_t mask)
+{
+ unsigned long cpuid, dev_handle, dev_ino;
+ int err;
+
+ cpuid = irq_choose_cpu(virt_irq);
+
+ dev_handle = virt_irq_table[virt_irq].dev_handle;
+ dev_ino = virt_irq_table[virt_irq].dev_ino;
+
+ err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
+ if (err != HV_EOK)
+ printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
+ "err(%d)\n",
+ dev_handle, dev_ino, cpuid, err);
+}
- action = unlink_irq_action(irq, dev_id);
+static void sun4v_virq_disable(unsigned int virt_irq)
+{
+ unsigned long dev_handle, dev_ino;
+ int err;
+
+ dev_handle = virt_irq_table[virt_irq].dev_handle;
+ dev_ino = virt_irq_table[virt_irq].dev_ino;
+
+ err = sun4v_vintr_set_valid(dev_handle, dev_ino,
+ HV_INTR_DISABLED);
+ if (err != HV_EOK)
+ printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
+ "HV_INTR_DISABLED): err(%d)\n",
+ dev_handle, dev_ino, err);
+}
- spin_unlock_irqrestore(&irq_action_lock, flags);
+static void sun4v_virq_eoi(unsigned int virt_irq)
+{
+ struct irq_desc *desc = irq_desc + virt_irq;
+ unsigned long dev_handle, dev_ino;
+ int err;
- if (unlikely(!action))
+ if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
return;
- synchronize_irq(irq);
+ dev_handle = virt_irq_table[virt_irq].dev_handle;
+ dev_ino = virt_irq_table[virt_irq].dev_ino;
- spin_lock_irqsave(&irq_action_lock, flags);
+ err = sun4v_vintr_set_state(dev_handle, dev_ino,
+ HV_INTR_STATE_IDLE);
+ if (err != HV_EOK)
+ printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
+ "HV_INTR_STATE_IDLE): err(%d)\n",
+ dev_handle, dev_ino, err);
+}
- bucket = __bucket(irq);
- if (bucket != &pil0_dummy_bucket) {
- struct irq_desc *desc = bucket->irq_info;
- unsigned long imap = bucket->imap;
- int ent, i;
+static struct irq_chip sun4u_irq = {
+ .typename = "sun4u",
+ .enable = sun4u_irq_enable,
+ .disable = sun4u_irq_disable,
+ .eoi = sun4u_irq_eoi,
+ .set_affinity = sun4u_set_affinity,
+};
- for (i = 0; i < MAX_IRQ_DESC_ACTION; i++) {
- struct irqaction *p = &desc->action[i];
+static struct irq_chip sun4v_irq = {
+ .typename = "sun4v",
+ .enable = sun4v_irq_enable,
+ .disable = sun4v_irq_disable,
+ .eoi = sun4v_irq_eoi,
+ .set_affinity = sun4v_set_affinity,
+};
- if (p == action) {
- desc->action_active_mask &= ~(1 << i);
- break;
- }
- }
+static struct irq_chip sun4v_virq = {
+ .typename = "vsun4v",
+ .enable = sun4v_virq_enable,
+ .disable = sun4v_virq_disable,
+ .eoi = sun4v_virq_eoi,
+ .set_affinity = sun4v_virt_set_affinity,
+};
- if (!desc->action_active_mask) {
- /* This unique interrupt source is now inactive. */
- bucket->flags &= ~IBF_ACTIVE;
-
- /* See if any other buckets share this bucket's IMAP
- * and are still active.
- */
- for (ent = 0; ent < NUM_IVECS; ent++) {
- struct ino_bucket *bp = &ivector_table[ent];
- if (bp != bucket &&
- bp->imap == imap &&
- (bp->flags & IBF_ACTIVE) != 0)
- break;
- }
+static void pre_flow_handler(unsigned int virt_irq,
+ struct irq_desc *desc)
+{
+ struct irq_handler_data *data = get_irq_chip_data(virt_irq);
+ unsigned int ino = virt_irq_table[virt_irq].dev_ino;
- /* Only disable when no other sub-irq levels of
- * the same IMAP are active.
- */
- if (ent == NUM_IVECS)
- disable_irq(irq);
- }
- }
+ data->pre_handler(ino, data->arg1, data->arg2);
- spin_unlock_irqrestore(&irq_action_lock, flags);
+ handle_fasteoi_irq(virt_irq, desc);
}
-EXPORT_SYMBOL(free_irq);
-
-#ifdef CONFIG_SMP
-void synchronize_irq(unsigned int irq)
+void irq_install_pre_handler(int virt_irq,
+ void (*func)(unsigned int, void *, void *),
+ void *arg1, void *arg2)
{
- struct ino_bucket *bucket = __bucket(irq);
+ struct irq_handler_data *data = get_irq_chip_data(virt_irq);
+ struct irq_desc *desc = irq_desc + virt_irq;
-#if 0
- /* The following is how I wish I could implement this.
- * Unfortunately the ICLR registers are read-only, you can
- * only write ICLR_foo values to them. To get the current
- * IRQ status you would need to get at the IRQ diag registers
- * in the PCI/SBUS controller and the layout of those vary
- * from one controller to the next, sigh... -DaveM
- */
- unsigned long iclr = bucket->iclr;
-
- while (1) {
- u32 tmp = upa_readl(iclr);
-
- if (tmp == ICLR_TRANSMIT ||
- tmp == ICLR_PENDING) {
- cpu_relax();
- continue;
- }
- break;
- }
-#else
- /* So we have to do this with a INPROGRESS bit just like x86. */
- while (bucket->flags & IBF_INPROGRESS)
- cpu_relax();
-#endif
+ data->pre_handler = func;
+ data->arg1 = arg1;
+ data->arg2 = arg2;
+
+ desc->handle_irq = pre_flow_handler;
}
-#endif /* CONFIG_SMP */
-static void process_bucket(int irq, struct ino_bucket *bp, struct pt_regs *regs)
+unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
{
- struct irq_desc *desc = bp->irq_info;
- unsigned char flags = bp->flags;
- u32 action_mask, i;
- int random;
+ struct ino_bucket *bucket;
+ struct irq_handler_data *data;
+ unsigned int virt_irq;
+ int ino;
- bp->flags |= IBF_INPROGRESS;
+ BUG_ON(tlb_type == hypervisor);
- if (unlikely(!(flags & IBF_ACTIVE))) {
- bp->pending = 1;
- goto out;
+ ino = (upa_readq(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
+ bucket = &ivector_table[ino];
+ virt_irq = bucket_get_virt_irq(__pa(bucket));
+ if (!virt_irq) {
+ virt_irq = virt_irq_alloc(0, ino);
+ bucket_set_virt_irq(__pa(bucket), virt_irq);
+ set_irq_chip_and_handler_name(virt_irq,
+ &sun4u_irq,
+ handle_fasteoi_irq,
+ "IVEC");
}
- if (desc->pre_handler)
- desc->pre_handler(bp,
- desc->pre_handler_arg1,
- desc->pre_handler_arg2);
-
- action_mask = desc->action_active_mask;
- random = 0;
- for (i = 0; i < MAX_IRQ_DESC_ACTION; i++) {
- struct irqaction *p = &desc->action[i];
- u32 mask = (1 << i);
-
- if (!(action_mask & mask))
- continue;
+ data = get_irq_chip_data(virt_irq);
+ if (unlikely(data))
+ goto out;
- action_mask &= ~mask;
+ data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
+ if (unlikely(!data)) {
+ prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
+ prom_halt();
+ }
+ set_irq_chip_data(virt_irq, data);
- if (p->handler(__irq(bp), p->dev_id, regs) == IRQ_HANDLED)
- random |= p->flags;
+ data->imap = imap;
+ data->iclr = iclr;
- if (!action_mask)
- break;
- }
- if (bp->pil != 0) {
- upa_writel(ICLR_IDLE, bp->iclr);
- /* Test and add entropy */
- if (random & SA_SAMPLE_RANDOM)
- add_interrupt_randomness(irq);
- }
out:
- bp->flags &= ~IBF_INPROGRESS;
+ return virt_irq;
}
-void handler_irq(int irq, struct pt_regs *regs)
+static unsigned int sun4v_build_common(unsigned long sysino,
+ struct irq_chip *chip)
{
- struct ino_bucket *bp;
- int cpu = smp_processor_id();
+ struct ino_bucket *bucket;
+ struct irq_handler_data *data;
+ unsigned int virt_irq;
+
+ BUG_ON(tlb_type != hypervisor);
+
+ bucket = &ivector_table[sysino];
+ virt_irq = bucket_get_virt_irq(__pa(bucket));
+ if (!virt_irq) {
+ virt_irq = virt_irq_alloc(0, sysino);
+ bucket_set_virt_irq(__pa(bucket), virt_irq);
+ set_irq_chip_and_handler_name(virt_irq, chip,
+ handle_fasteoi_irq,
+ "IVEC");
+ }
-#ifndef CONFIG_SMP
- /*
- * Check for TICK_INT on level 14 softint.
- */
- {
- unsigned long clr_mask = 1 << irq;
- unsigned long tick_mask = tick_ops->softint_mask;
+ data = get_irq_chip_data(virt_irq);
+ if (unlikely(data))
+ goto out;
- if ((irq == 14) && (get_softint() & tick_mask)) {
- irq = 0;
- clr_mask = tick_mask;
- }
- clear_softint(clr_mask);
+ data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
+ if (unlikely(!data)) {
+ prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
+ prom_halt();
}
-#else
- clear_softint(1 << irq);
-#endif
+ set_irq_chip_data(virt_irq, data);
- irq_enter();
- kstat_this_cpu.irqs[irq]++;
-
- /* Sliiiick... */
-#ifndef CONFIG_SMP
- bp = ((irq != 0) ?
- __bucket(xchg32(irq_work(cpu, irq), 0)) :
- &pil0_dummy_bucket);
-#else
- bp = __bucket(xchg32(irq_work(cpu, irq), 0));
-#endif
- while (bp) {
- struct ino_bucket *nbp = __bucket(bp->irq_chain);
+ /* Catch accidental accesses to these things. IMAP/ICLR handling
+ * is done by hypervisor calls on sun4v platforms, not by direct
+ * register accesses.
+ */
+ data->imap = ~0UL;
+ data->iclr = ~0UL;
- bp->irq_chain = 0;
- process_bucket(irq, bp, regs);
- bp = nbp;
- }
- irq_exit();
+out:
+ return virt_irq;
}
-#ifdef CONFIG_BLK_DEV_FD
-extern irqreturn_t floppy_interrupt(int, void *, struct pt_regs *);;
+unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
+{
+ unsigned long sysino = sun4v_devino_to_sysino(devhandle, devino);
-/* XXX No easy way to include asm/floppy.h XXX */
-extern unsigned char *pdma_vaddr;
-extern unsigned long pdma_size;
-extern volatile int doing_pdma;
-extern unsigned long fdc_status;
+ return sun4v_build_common(sysino, &sun4v_irq);
+}
-irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie, struct pt_regs *regs)
+unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino)
{
- if (likely(doing_pdma)) {
- void __iomem *stat = (void __iomem *) fdc_status;
- unsigned char *vaddr = pdma_vaddr;
- unsigned long size = pdma_size;
- u8 val;
+ struct irq_handler_data *data;
+ unsigned long hv_err, cookie;
+ struct ino_bucket *bucket;
+ struct irq_desc *desc;
+ unsigned int virt_irq;
+
+ bucket = kzalloc(sizeof(struct ino_bucket), GFP_ATOMIC);
+ if (unlikely(!bucket))
+ return 0;
+ __flush_dcache_range((unsigned long) bucket,
+ ((unsigned long) bucket +
+ sizeof(struct ino_bucket)));
+
+ virt_irq = virt_irq_alloc(devhandle, devino);
+ bucket_set_virt_irq(__pa(bucket), virt_irq);
+
+ set_irq_chip_and_handler_name(virt_irq, &sun4v_virq,
+ handle_fasteoi_irq,
+ "IVEC");
+
+ data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
+ if (unlikely(!data))
+ return 0;
+
+ /* In order to make the LDC channel startup sequence easier,
+ * especially wrt. locking, we do not let request_irq() enable
+ * the interrupt.
+ */
+ desc = irq_desc + virt_irq;
+ desc->status |= IRQ_NOAUTOEN;
- while (size) {
- val = readb(stat);
- if (unlikely(!(val & 0x80))) {
- pdma_vaddr = vaddr;
- pdma_size = size;
- return IRQ_HANDLED;
- }
- if (unlikely(!(val & 0x20))) {
- pdma_vaddr = vaddr;
- pdma_size = size;
- doing_pdma = 0;
- goto main_interrupt;
- }
- if (val & 0x40) {
- /* read */
- *vaddr++ = readb(stat + 1);
- } else {
- unsigned char data = *vaddr++;
+ set_irq_chip_data(virt_irq, data);
- /* write */
- writeb(data, stat + 1);
- }
- size--;
- }
+ /* Catch accidental accesses to these things. IMAP/ICLR handling
+ * is done by hypervisor calls on sun4v platforms, not by direct
+ * register accesses.
+ */
+ data->imap = ~0UL;
+ data->iclr = ~0UL;
+
+ cookie = ~__pa(bucket);
+ hv_err = sun4v_vintr_set_cookie(devhandle, devino, cookie);
+ if (hv_err) {
+ prom_printf("IRQ: Fatal, cannot set cookie for [%x:%x] "
+ "err=%lu\n", devhandle, devino, hv_err);
+ prom_halt();
+ }
- pdma_vaddr = vaddr;
- pdma_size = size;
+ return virt_irq;
+}
- /* Send Terminal Count pulse to floppy controller. */
- val = readb(auxio_register);
- val |= AUXIO_AUX1_FTCNT;
- writeb(val, auxio_register);
- val &= ~AUXIO_AUX1_FTCNT;
- writeb(val, auxio_register);
+void ack_bad_irq(unsigned int virt_irq)
+{
+ unsigned int ino = virt_irq_table[virt_irq].dev_ino;
- doing_pdma = 0;
- }
+ if (!ino)
+ ino = 0xdeadbeef;
-main_interrupt:
- return floppy_interrupt(irq, dev_cookie, regs);
+ printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
+ ino, virt_irq);
}
-EXPORT_SYMBOL(sparc_floppy_irq);
-#endif
-/* We really don't need these at all on the Sparc. We only have
- * stubs here because they are exported to modules.
- */
-unsigned long probe_irq_on(void)
+void handler_irq(int irq, struct pt_regs *regs)
{
- return 0;
-}
+ unsigned long pstate, bucket_pa;
+ struct pt_regs *old_regs;
-EXPORT_SYMBOL(probe_irq_on);
+ clear_softint(1 << irq);
-int probe_irq_off(unsigned long mask)
-{
- return 0;
-}
+ old_regs = set_irq_regs(regs);
+ irq_enter();
-EXPORT_SYMBOL(probe_irq_off);
+ /* Grab an atomic snapshot of the pending IVECs. */
+ __asm__ __volatile__("rdpr %%pstate, %0\n\t"
+ "wrpr %0, %3, %%pstate\n\t"
+ "ldx [%2], %1\n\t"
+ "stx %%g0, [%2]\n\t"
+ "wrpr %0, 0x0, %%pstate\n\t"
+ : "=&r" (pstate), "=&r" (bucket_pa)
+ : "r" (irq_work_pa(smp_processor_id())),
+ "i" (PSTATE_IE)
+ : "memory");
-#ifdef CONFIG_SMP
-static int retarget_one_irq(struct irqaction *p, int goal_cpu)
-{
- struct ino_bucket *bucket = get_ino_in_irqaction(p) + ivector_table;
- unsigned long imap = bucket->imap;
- unsigned int tid;
+ while (bucket_pa) {
+ struct irq_desc *desc;
+ unsigned long next_pa;
+ unsigned int virt_irq;
- while (!cpu_online(goal_cpu)) {
- if (++goal_cpu >= NR_CPUS)
- goal_cpu = 0;
- }
+ next_pa = bucket_get_chain_pa(bucket_pa);
+ virt_irq = bucket_get_virt_irq(bucket_pa);
+ bucket_clear_chain_pa(bucket_pa);
- if (tlb_type == cheetah || tlb_type == cheetah_plus) {
- tid = goal_cpu << 26;
- tid &= IMAP_AID_SAFARI;
- } else if (this_is_starfire == 0) {
- tid = goal_cpu << 26;
- tid &= IMAP_TID_UPA;
- } else {
- tid = (starfire_translate(imap, goal_cpu) << 26);
- tid &= IMAP_TID_UPA;
- }
- upa_writel(tid | IMAP_VALID, imap);
+ desc = irq_desc + virt_irq;
- do {
- if (++goal_cpu >= NR_CPUS)
- goal_cpu = 0;
- } while (!cpu_online(goal_cpu));
+ desc->handle_irq(virt_irq, desc);
- return goal_cpu;
+ bucket_pa = next_pa;
+ }
+
+ irq_exit();
+ set_irq_regs(old_regs);
}
-/* Called from request_irq. */
-static void distribute_irqs(void)
+#ifdef CONFIG_HOTPLUG_CPU
+void fixup_irqs(void)
{
- unsigned long flags;
- int cpu, level;
+ unsigned int irq;
- spin_lock_irqsave(&irq_action_lock, flags);
- cpu = 0;
-
- /*
- * Skip the timer at [0], and very rare error/power intrs at [15].
- * Also level [12], it causes problems on Ex000 systems.
- */
- for (level = 1; level < NR_IRQS; level++) {
- struct irqaction *p = irq_action[level];
+ for (irq = 0; irq < NR_IRQS; irq++) {
+ unsigned long flags;
- if (level == 12)
- continue;
-
- while(p) {
- cpu = retarget_one_irq(p, cpu);
- p = p->next;
+ spin_lock_irqsave(&irq_desc[irq].lock, flags);
+ if (irq_desc[irq].action &&
+ !(irq_desc[irq].status & IRQ_PER_CPU)) {
+ if (irq_desc[irq].chip->set_affinity)
+ irq_desc[irq].chip->set_affinity(irq,
+ irq_desc[irq].affinity);
}
+ spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
}
- spin_unlock_irqrestore(&irq_action_lock, flags);
}
#endif
static void map_prom_timers(void)
{
- unsigned int addr[3];
- int tnode, err;
+ struct device_node *dp;
+ const unsigned int *addr;
/* PROM timer node hangs out in the top level of device siblings... */
- tnode = prom_finddevice("/counter-timer");
+ dp = of_find_node_by_path("/");
+ dp = dp->child;
+ while (dp) {
+ if (!strcmp(dp->name, "counter-timer"))
+ break;
+ dp = dp->sibling;
+ }
/* Assume if node is not present, PROM uses different tick mechanism
* which we should not care about.
*/
- if (tnode == 0 || tnode == -1) {
+ if (!dp) {
prom_timers = (struct sun5_timer *) 0;
return;
}
/* If PROM is really using this, it must be mapped by him. */
- err = prom_getproperty(tnode, "address", (char *)addr, sizeof(addr));
- if (err == -1) {
+ addr = of_get_property(dp, "address", NULL);
+ if (!addr) {
prom_printf("PROM does not have timer mapped, trying to continue.\n");
prom_timers = (struct sun5_timer *) 0;
return;
{
int cpu = hard_smp_processor_id();
- memset(__irq_work + cpu, 0, sizeof(struct irq_work_struct));
+ trap_block[cpu].irq_worklist_pa = 0UL;
}
-/* Only invoked on boot processor. */
-void __init init_IRQ(void)
+/* Please be very careful with register_one_mondo() and
+ * sun4v_register_mondo_queues().
+ *
+ * On SMP this gets invoked from the CPU trampoline before
+ * the cpu has fully taken over the trap table from OBP,
+ * and it's kernel stack + %g6 thread register state is
+ * not fully cooked yet.
+ *
+ * Therefore you cannot make any OBP calls, not even prom_printf,
+ * from these two routines.
+ */
+static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type, unsigned long qmask)
{
- map_prom_timers();
- kill_prom_timer();
- memset(&ivector_table[0], 0, sizeof(ivector_table));
+ unsigned long num_entries = (qmask + 1) / 64;
+ unsigned long status;
- /* We need to clear any IRQ's pending in the soft interrupt
- * registers, a spurious one could be left around from the
- * PROM timer which we just disabled.
- */
- clear_softint(get_softint());
+ status = sun4v_cpu_qconf(type, paddr, num_entries);
+ if (status != HV_EOK) {
+ prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
+ "err %lu\n", type, paddr, num_entries, status);
+ prom_halt();
+ }
+}
- /* Now that ivector table is initialized, it is safe
- * to receive IRQ vector traps. We will normally take
- * one or two right now, in case some device PROM used
- * to boot us wants to speak to us. We just ignore them.
- */
- __asm__ __volatile__("rdpr %%pstate, %%g1\n\t"
- "or %%g1, %0, %%g1\n\t"
- "wrpr %%g1, 0x0, %%pstate"
- : /* No outputs */
- : "i" (PSTATE_IE)
- : "g1");
+void __cpuinit sun4v_register_mondo_queues(int this_cpu)
+{
+ struct trap_per_cpu *tb = &trap_block[this_cpu];
+
+ register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO,
+ tb->cpu_mondo_qmask);
+ register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO,
+ tb->dev_mondo_qmask);
+ register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR,
+ tb->resum_qmask);
+ register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR,
+ tb->nonresum_qmask);
}
-static struct proc_dir_entry * root_irq_dir;
-static struct proc_dir_entry * irq_dir [NUM_IVECS];
+static void __init alloc_one_mondo(unsigned long *pa_ptr, unsigned long qmask)
+{
+ unsigned long size = PAGE_ALIGN(qmask + 1);
+ void *p = __alloc_bootmem(size, size, 0);
+ if (!p) {
+ prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
+ prom_halt();
+ }
-#ifdef CONFIG_SMP
+ *pa_ptr = __pa(p);
+}
-static int irq_affinity_read_proc (char *page, char **start, off_t off,
- int count, int *eof, void *data)
+static void __init alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask)
{
- struct ino_bucket *bp = ivector_table + (long)data;
- struct irq_desc *desc = bp->irq_info;
- struct irqaction *ap = desc->action;
- cpumask_t mask;
- int len;
+ unsigned long size = PAGE_ALIGN(qmask + 1);
+ void *p = __alloc_bootmem(size, size, 0);
- mask = get_smpaff_in_irqaction(ap);
- if (cpus_empty(mask))
- mask = cpu_online_map;
+ if (!p) {
+ prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
+ prom_halt();
+ }
- len = cpumask_scnprintf(page, count, mask);
- if (count - len < 2)
- return -EINVAL;
- len += sprintf(page + len, "\n");
- return len;
+ *pa_ptr = __pa(p);
}
-static inline void set_intr_affinity(int irq, cpumask_t hw_aff)
+static void __init init_cpu_send_mondo_info(struct trap_per_cpu *tb)
{
- struct ino_bucket *bp = ivector_table + irq;
- struct irq_desc *desc = bp->irq_info;
- struct irqaction *ap = desc->action;
+#ifdef CONFIG_SMP
+ void *page;
- /* Users specify affinity in terms of hw cpu ids.
- * As soon as we do this, handler_irq() might see and take action.
- */
- put_smpaff_in_irqaction(ap, hw_aff);
+ BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
- /* Migration is simply done by the next cpu to service this
- * interrupt.
- */
+ page = alloc_bootmem_pages(PAGE_SIZE);
+ if (!page) {
+ prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
+ prom_halt();
+ }
+
+ tb->cpu_mondo_block_pa = __pa(page);
+ tb->cpu_list_pa = __pa(page + 64);
+#endif
}
-static int irq_affinity_write_proc (struct file *file, const char __user *buffer,
- unsigned long count, void *data)
+/* Allocate mondo and error queues for all possible cpus. */
+static void __init sun4v_init_mondo_queues(void)
{
- int irq = (long) data, full_count = count, err;
- cpumask_t new_value;
+ int cpu;
- err = cpumask_parse(buffer, count, new_value);
+ for_each_possible_cpu(cpu) {
+ struct trap_per_cpu *tb = &trap_block[cpu];
- /*
- * Do not allow disabling IRQs completely - it's a too easy
- * way to make the system unusable accidentally :-) At least
- * one online CPU still has to be targeted.
- */
- cpus_and(new_value, new_value, cpu_online_map);
- if (cpus_empty(new_value))
- return -EINVAL;
+ alloc_one_mondo(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask);
+ alloc_one_mondo(&tb->dev_mondo_pa, tb->dev_mondo_qmask);
+ alloc_one_mondo(&tb->resum_mondo_pa, tb->resum_qmask);
+ alloc_one_kbuf(&tb->resum_kernel_buf_pa, tb->resum_qmask);
+ alloc_one_mondo(&tb->nonresum_mondo_pa, tb->nonresum_qmask);
+ alloc_one_kbuf(&tb->nonresum_kernel_buf_pa,
+ tb->nonresum_qmask);
- set_intr_affinity(irq, new_value);
+ init_cpu_send_mondo_info(tb);
+ }
- return full_count;
+ /* Load up the boot cpu's entries. */
+ sun4v_register_mondo_queues(hard_smp_processor_id());
}
-#endif
-
-#define MAX_NAMELEN 10
+static struct irqaction timer_irq_action = {
+ .name = "timer",
+};
-static void register_irq_proc (unsigned int irq)
+/* Only invoked on boot processor. */
+void __init init_IRQ(void)
{
- char name [MAX_NAMELEN];
+ unsigned long size;
- if (!root_irq_dir || irq_dir[irq])
- return;
+ map_prom_timers();
+ kill_prom_timer();
- memset(name, 0, MAX_NAMELEN);
- sprintf(name, "%x", irq);
+ size = sizeof(struct ino_bucket) * NUM_IVECS;
+ ivector_table = alloc_bootmem(size);
+ if (!ivector_table) {
+ prom_printf("Fatal error, cannot allocate ivector_table\n");
+ prom_halt();
+ }
+ __flush_dcache_range((unsigned long) ivector_table,
+ ((unsigned long) ivector_table) + size);
- /* create /proc/irq/1234 */
- irq_dir[irq] = proc_mkdir(name, root_irq_dir);
+ ivector_table_pa = __pa(ivector_table);
-#ifdef CONFIG_SMP
- /* XXX SMP affinity not supported on starfire yet. */
- if (this_is_starfire == 0) {
- struct proc_dir_entry *entry;
-
- /* create /proc/irq/1234/smp_affinity */
- entry = create_proc_entry("smp_affinity", 0600, irq_dir[irq]);
-
- if (entry) {
- entry->nlink = 1;
- entry->data = (void *)(long)irq;
- entry->read_proc = irq_affinity_read_proc;
- entry->write_proc = irq_affinity_write_proc;
- }
- }
-#endif
-}
+ if (tlb_type == hypervisor)
+ sun4v_init_mondo_queues();
-void init_irq_proc (void)
-{
- /* create /proc/irq */
- root_irq_dir = proc_mkdir("irq", NULL);
-}
+ /* We need to clear any IRQ's pending in the soft interrupt
+ * registers, a spurious one could be left around from the
+ * PROM timer which we just disabled.
+ */
+ clear_softint(get_softint());
+ /* Now that ivector table is initialized, it is safe
+ * to receive IRQ vector traps. We will normally take
+ * one or two right now, in case some device PROM used
+ * to boot us wants to speak to us. We just ignore them.
+ */
+ __asm__ __volatile__("rdpr %%pstate, %%g1\n\t"
+ "or %%g1, %0, %%g1\n\t"
+ "wrpr %%g1, 0x0, %%pstate"
+ : /* No outputs */
+ : "i" (PSTATE_IE)
+ : "g1");
+
+ irq_desc[0].action = &timer_irq_action;
+}
git://ftp.safe.ca / safe / jmp / linux-2.6 / blobdiff