* Copyright (C) 1997 Miguel de Icaza (miguel@nuclecu.unam.mx)
*/
-#include <linux/config.h>
#include <linux/version.h>
#include <linux/errno.h>
+#include <linux/threads.h>
#include <asm/thread_info.h>
#include <asm/asi.h>
#include <asm/pstate.h>
/* PROM cif handler code address is in %o4. */
sparc64_boot:
-1: rd %pc, %g7
- set 1b, %g1
- cmp %g1, %g7
- be,pn %xcc, sparc64_boot_after_remap
- mov %o4, %l7
+ mov %o4, %l7
/* We need to remap the kernel. Use position independant
* code to remap us to KERNBASE.
prom_unmap_name:
.asciz "unmap"
prom_sun4v_name:
- .asciz "SUNW,sun4v"
+ .asciz "sun4v"
.align 4
prom_root_compatible:
.skip 64
add %sp, (192 + 128), %sp
-sparc64_boot_after_remap:
sethi %hi(prom_root_compatible), %g1
or %g1, %lo(prom_root_compatible), %g1
sethi %hi(prom_sun4v_name), %g7
or %g7, %lo(prom_sun4v_name), %g7
- mov 10, %g3
+ mov 5, %g3
1: ldub [%g7], %g2
ldub [%g1], %g4
cmp %g2, %g4
nop
sun4u_init:
+ BRANCH_IF_SUN4V(g1, sun4v_init)
+
/* Set ctx 0 */
mov PRIMARY_CONTEXT, %g7
-
-661: stxa %g0, [%g7] ASI_DMMU
- .section .sun4v_1insn_patch, "ax"
- .word 661b
- stxa %g0, [%g7] ASI_MMU
- .previous
-
+ stxa %g0, [%g7] ASI_DMMU
membar #Sync
mov SECONDARY_CONTEXT, %g7
+ stxa %g0, [%g7] ASI_DMMU
+ membar #Sync
-661: stxa %g0, [%g7] ASI_DMMU
- .section .sun4v_1insn_patch, "ax"
- .word 661b
+ ba,pt %xcc, sun4u_continue
+ nop
+
+sun4v_init:
+ /* Set ctx 0 */
+ mov PRIMARY_CONTEXT, %g7
stxa %g0, [%g7] ASI_MMU
- .previous
+ membar #Sync
- membar #Sync
+ mov SECONDARY_CONTEXT, %g7
+ stxa %g0, [%g7] ASI_MMU
+ membar #Sync
+ ba,pt %xcc, niagara_tlb_fixup
+ nop
- BRANCH_IF_SUN4V(g1, niagara_tlb_fixup)
+sun4u_continue:
BRANCH_IF_ANY_CHEETAH(g1, g7, cheetah_tlb_fixup)
ba,pt %xcc, spitfire_tlb_fixup
/* Patch copy/clear ops. */
call niagara_patch_copyops
nop
+ call niagara_patch_bzero
+ nop
call niagara_patch_pageops
nop
call __bzero
sub %o1, %o0, %o1
+#ifdef CONFIG_LOCKDEP
+ /* We have this call this super early, as even prom_init can grab
+ * spinlocks and thus call into the lockdep code.
+ */
+ call lockdep_init
+ nop
+#endif
+
mov %l6, %o1 ! OpenPROM stack
call prom_init
mov %l7, %o0 ! OpenPROM cif handler
+ /* Initialize current_thread_info()->cpu as early as possible.
+ * In order to do that accurately we have to patch up the get_cpuid()
+ * assembler sequences. And that, in turn, requires that we know
+ * if we are on a Starfire box or not. While we're here, patch up
+ * the sun4v sequences as well.
+ */
+ call check_if_starfire
+ nop
+ call per_cpu_patch
+ nop
+ call sun4v_patch
+ nop
+
+#ifdef CONFIG_SMP
+ call hard_smp_processor_id
+ nop
+ cmp %o0, NR_CPUS
+ blu,pt %xcc, 1f
+ nop
+ call boot_cpu_id_too_large
+ nop
+ /* Not reached... */
+
+1:
+#else
+ mov 0, %o0
+#endif
+ stb %o0, [%g6 + TI_CPU]
+
/* Off we go.... */
call start_kernel
nop
save %sp, -192, %sp
/* Force interrupts to be disabled. */
- rdpr %pstate, %o1
- andn %o1, PSTATE_IE, %o1
+ rdpr %pstate, %l0
+ andn %l0, PSTATE_IE, %o1
wrpr %o1, 0x0, %pstate
+ rdpr %pil, %l1
wrpr %g0, 15, %pil
/* Make the firmware call to jump over to the Linux trap table. */
call init_irqwork_curcpu
nop
- /* Now we can turn interrupts back on. */
- rdpr %pstate, %o1
- or %o1, PSTATE_IE, %o1
- wrpr %o1, 0, %pstate
- wrpr %g0, 0x0, %pil
+ /* Now we can restore interrupt state. */
+ wrpr %l0, 0, %pstate
+ wrpr %l1, 0x0, %pil
ret
restore
restore
sparc64_boot_end:
-#include "systbls.S"
#include "ktlb.S"
#include "tsb.S"
#include "etrap.S"
#include "ttable.S"
+#include "systbls.S"
+
.data
.align 8
.globl prom_tba, tlb_type