Merge branch 'pm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/suspe...

[safe/jmp/linux-2.6] / arch / sh / include / cpu-sh4 / cpu / mmu_context.h

diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
index 9ea8eb2..5963124 100644 (file)
--- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h
+++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
@@ -14,21 +14,24 @@
 #define MMU_PTEL       0xFF000004      /* Page table entry register LOW */
 #define MMU_TTB                0xFF000008      /* Translation table base register */
 #define MMU_TEA                0xFF00000C      /* TLB Exception Address */
-#define MMU_PTEA       0xFF000034      /* Page table entry assistance register */
+#define MMU_PTEA       0xFF000034      /* PTE assistance register */
+#define MMU_PTEAEX     0xFF00007C      /* PTE ASID extension register */
 
 #define MMUCR          0xFF000010      /* MMU Control Register */
 
-#define MMU_ITLB_ADDRESS_ARRAY 0xF2000000
+#define MMU_ITLB_ADDRESS_ARRAY  0xF2000000
+#define MMU_ITLB_ADDRESS_ARRAY2        0xF2800000
 #define MMU_UTLB_ADDRESS_ARRAY 0xF6000000
+#define MMU_UTLB_ADDRESS_ARRAY2        0xF6800000
 #define MMU_PAGE_ASSOC_BIT     0x80
 
 #define MMUCR_TI               (1<<2)
 
-#ifdef CONFIG_X2TLB
-#define MMUCR_ME               (1 << 7)
-#else
-#define MMUCR_ME               (0)
-#endif
+#define MMUCR_URB              0x00FC0000
+#define MMUCR_URB_SHIFT                18
+#define MMUCR_URB_NENTRIES     64
+#define MMUCR_URC              0x0000FC00
+#define MMUCR_URC_SHIFT                10
 
 #if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40)
 #define MMUCR_SE               (1 << 4)
@@ -36,6 +39,18 @@
 #define MMUCR_SE               (0)
 #endif
 
+#ifdef CONFIG_CPU_HAS_PTEAEX
+#define MMUCR_AEX              (1 << 6)
+#else
+#define MMUCR_AEX              (0)
+#endif
+
+#ifdef CONFIG_X2TLB
+#define MMUCR_ME               (1 << 7)
+#else
+#define MMUCR_ME               (0)
+#endif
+
 #ifdef CONFIG_SH_STORE_QUEUES
 #define MMUCR_SQMD             (1 << 9)
 #else
@@ -43,17 +58,7 @@
 #endif
 
 #define MMU_NTLB_ENTRIES       64
-#define MMU_CONTROL_INIT       (0x05|MMUCR_SQMD|MMUCR_ME|MMUCR_SE)
-
-#define MMU_ITLB_DATA_ARRAY    0xF3000000
-#define MMU_UTLB_DATA_ARRAY    0xF7000000
-
-#define MMU_UTLB_ENTRIES          64
-#define MMU_U_ENTRY_SHIFT          8
-#define MMU_UTLB_VALID         0x100
-#define MMU_ITLB_ENTRIES           4
-#define MMU_I_ENTRY_SHIFT          8
-#define MMU_ITLB_VALID         0x100
+#define MMU_CONTROL_INIT       (0x05|MMUCR_SQMD|MMUCR_ME|MMUCR_SE|MMUCR_AEX)
 
 #define TRA    0xff000020
 #define EXPEVT 0xff000024